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* Make earlyclobber stuff work when virtual regsDale Johannesen2008-09-191-8/+26
| | | | | | have previously been assigned conflicting physreg. llvm-svn: 56364
* Re-materalized definition instructions may be dead. Whack them.Evan Cheng2008-09-192-7/+33
| | | | llvm-svn: 56352
* backing out my last commit, it was not intended to go on the trunkGabor Greif2008-09-193-510/+11
| | | | llvm-svn: 56349
* first shot at removing Use::ValGabor Greif2008-09-193-11/+510
| | | | | | untested, Use::swap() is definitely not done yet llvm-svn: 56348
* Remove the MarkModRef pass (use AddReadAttrs instead).Duncan Sands2008-09-191-69/+0
| | | | | | | | Unfortunately this means removing one regression test of GlobalsModRef because I couldn't work out how to perform it without MarkModRef. llvm-svn: 56342
* Add a new pass AddReadAttrs which works out which functionsDuncan Sands2008-09-191-0/+135
| | | | | | | | | can get the readnone/readonly attributes, and gives them it. The plan is to remove markmodref (which did the same thing by querying GlobalsModRef) and delete the analogous functionality from GlobalsModRef. llvm-svn: 56341
* Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen2008-09-193-73/+79
| | | | | | | and redo as linked list walk. Logic moved into RA. Per review feedback. llvm-svn: 56326
* splitLoop does not handle split condition EQ.Devang Patel2008-09-181-0/+6
| | | | | | Fixes PR 2805 llvm-svn: 56321
* Address-mode folding for X86FastISel. It's pretty basic, but itDan Gohman2008-09-181-18/+95
| | | | | | | | catches a fair number of common cases. Note that this currently causes Fast-ISel to leave behind lots of dead instructions. Those will be dealt with in subsequent commits. llvm-svn: 56320
* Decrementing the iterator here could be wrong if the worklist is empty after ↵Bill Wendling2008-09-181-4/+5
| | | | | | | | the "erase". Thanks to Ji Young Park for the patch! llvm-svn: 56316
* Try to place hoisted instructions befoe icmp instruction.Devang Patel2008-09-181-2/+23
| | | | llvm-svn: 56315
* Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.Evan Cheng2008-09-181-8/+6
| | | | llvm-svn: 56314
* Simplify this code. The FastISel class has its own TD member.Dan Gohman2008-09-181-4/+3
| | | | llvm-svn: 56311
* Don't consider instructions with implicit physical registerDan Gohman2008-09-181-1/+2
| | | | | | defs to be necessarily live. llvm-svn: 56310
* Add a new "fast" scheduler. This is currently basically just aDan Gohman2008-09-181-0/+654
| | | | | | | | | | | | | | | | copy of the BURRList scheduler, but with several parts ripped out, such as backtracking, online topological sort maintenance (needed by backtracking), the priority queue, and Sethi-Ullman number computation and maintenance (needed by the priority queue). As a result of all this, it generates somewhat lower quality code, but that's its tradeoff for running about 30% faster than list-burr in -fast mode in many cases. This is somewhat experimental. Moving forward, major pieces of this can be refactored with pieces in common with ScheduleDAGRRList.cpp. llvm-svn: 56307
* Preliminary support for systems which require changing JIT memory regions ↵Evan Cheng2008-09-185-1/+49
| | | | | | privilege from read / write to read / executable. llvm-svn: 56303
* Duh. Default to ARMCC::AL (always).Evan Cheng2008-09-181-23/+63
| | | | llvm-svn: 56301
* Clean up.Evan Cheng2008-09-181-4/+8
| | | | llvm-svn: 56300
* Cosmetic.Evan Cheng2008-09-181-3/+5
| | | | llvm-svn: 56299
* FastISel: For calls, prefer using the callee's address as a constantDan Gohman2008-09-171-10/+13
| | | | | | | | | | | | over having it in a register. And wait until after checking type legality before requesting that the callee address be placed in a register. Also, fix support for calls with void return type. This speeds up fast-isel isel time by about 15% and reduces instruction counts by about 3% overall on certain testcases. It also changes many indirect calls to direct calls. llvm-svn: 56292
* Add a bit to mark operands of asm's that conflictDale Johannesen2008-09-177-26/+140
| | | | | | | | | with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. llvm-svn: 56290
* Unallocatable registers do not have live intervals.Evan Cheng2008-09-171-1/+3
| | | | llvm-svn: 56287
* Do not hoist instruction above branch condition. The instruction may use ↵Devang Patel2008-09-171-9/+2
| | | | | | branch condition. llvm-svn: 56286
* Do not ignore iv uses outside the loop.Devang Patel2008-09-171-1/+21
| | | | | | This one slipped through cracks very well. llvm-svn: 56284
* Don't worry about clobbering physical register defs that aren't used.Dan Gohman2008-09-171-0/+2
| | | | llvm-svn: 56281
* Fix addrmode1 instruction encodings; fix bx_ret encoding.Evan Cheng2008-09-173-37/+49
| | | | llvm-svn: 56277
* Specify instruction encoding using range list to avoid endianess issues.Evan Cheng2008-09-171-25/+26
| | | | llvm-svn: 56276
* Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and drawDan Gohman2008-09-171-56/+48
| | | | | | | up some new ascii art to illustrate what it does. This change currently has no effect on generated code. llvm-svn: 56270
* Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman2008-09-171-0/+99
| | | | | | be used with fast-isel. llvm-svn: 56268
* Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"Bill Wendling2008-09-172-7/+50
| | | | | | function with appropriate parameters. This allows us to support blocks on PPC. llvm-svn: 56267
* When converting a CopyFromReg to a copy instruction, use the register class ↵Evan Cheng2008-09-161-5/+24
| | | | | | of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. llvm-svn: 56258
* Change SelectionDAG::getConstantPool to always set the alignment of theDan Gohman2008-09-162-7/+20
| | | | | | | | | | | | | | | | | | | | ConstantPoolSDNode, using the target's preferred alignment for the constant type. In LegalizeDAG, when performing loads from the constant pool, the ConstantPoolSDNode's alignment is used in the calls to getLoad and getExtLoad. This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly choosing the ABI alignment for constant pool loads when Alignment == 0. The incorrect alignment is only a performance issue when ABI alignment does not equal preferred alignment (i.e., on x86 it was generating MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI alignment for 128bit vectors is forced to 1 byte.) Patch by Paul Redmond! llvm-svn: 56253
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-1621-143/+130
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* Include the alignment value when displaying ConstantPoolSDNodes.Dan Gohman2008-09-161-0/+1
| | | | llvm-svn: 56250
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-1621-130/+143
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Fix these comments to reflect current reality. Surprisingly,Dan Gohman2008-09-161-1/+2
| | | | | | | MachineConstantPool::getConstantPoolIndex actually expects a log2-encoded alignment. llvm-svn: 56248
* Finally re-apply r46959. This is made feasible by the combinationDan Gohman2008-09-161-2/+2
| | | | | | of r56230, r56232, and r56246. llvm-svn: 56247
* Improve instcombine's handling of integer min and max in two ways:Dan Gohman2008-09-162-34/+115
| | | | | | | | | | | | | | | | - Recognize expressions like "x > -1 ? x : 0" as min/max and turn them into expressions like "x < 0 ? 0 : x", which is easily recognizable as a min/max operation. - Refrain from folding expression like "y/2 < 1" to "y < 2" when the comparison is being used as part of a min or max idiom, like "y/2 < 1 ? 1 : y/2". In that case, the division has another use, so folding doesn't eliminate it, and obfuscates the min/max, making it harder to recognize as a min/max operation. These benefit ScalarEvolution, CodeGen, and anything else that wants to recognize integer min and max. llvm-svn: 56246
* AllocateRWXMemory -> AllocateRWX.Evan Cheng2008-09-161-1/+1
| | | | llvm-svn: 56244
* Don't take the time to CheckDAGForTailCallsAndFixThem when tail callsDan Gohman2008-09-162-4/+10
| | | | | | | are not enabled. Instead just omit the tail call flag when calls are created. llvm-svn: 56235
* Re-enables the new vector select in the bitcode reader, by modifying theDan Gohman2008-09-162-12/+29
| | | | | | | | | | | | | | | | | | | | | | bitcode reader/writer as follows: - add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm select opcode using either i1 or [N x i1] as the selector. - retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to handle select on i1 for backwards compatibility with existing bitcode files. - re-enable the vector-select.ll test program. Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle fcmp/icmp on scalars or vectors. In the bitcode writer, use FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards compatibility with existing bitcode files. Patch by Preston Gurd! llvm-svn: 56233
* Teach ScalarEvolution to consider loop preheaders in the search forDan Gohman2008-09-151-8/+38
| | | | | | | an if statement that guards a loop, to allow indvars to avoid smax operations in more situations. llvm-svn: 56232
* Live intervals for live-in registers should begin at the beginning of a ↵Owen Anderson2008-09-151-7/+11
| | | | | | | | | basic block, not at the first instruction. Also, their valno's should have an unknown def. This has no effect currently, but was causing issues when StrongPHIElimination was enabled. llvm-svn: 56231
* Teach LSR to optimize away SMAX operations for tripcounts in commonDan Gohman2008-09-151-0/+127
| | | | | | | | | cases. See the comment above OptimizeSMax for the full story, and the testcase for an example. This cancels out a pessimization commonly attributed to indvars, and will allow us to lift some of the artificial throttles in indvars, rather than add new ones. llvm-svn: 56230
* Fixed Bug 2751Bruno Cardoso Lopes2008-09-152-4/+4
| | | | | | | | | | | http://llvm.org/bugs/show_bug.cgi?id=2751 Abicall was enabled even when static code model was provided in the command line. The correct behavior is to disable abicall when static is specified. llvm-svn: 56228
* Re-enable SelectionDAG CSE for calls. It matters in the case ofDan Gohman2008-09-151-6/+20
| | | | | | libcalls, as in this testcase on ARM. llvm-svn: 56226
* Correctly update kill infos after extending a live range and merge 2 val#'s; ↵Evan Cheng2008-09-151-3/+8
| | | | | | fix 56165 - do not mark val# copy field if the copy does not define the val#. llvm-svn: 56199
* Fix WriteAsOperand to not emit a leading space character. AdjustDan Gohman2008-09-142-34/+60
| | | | | | | | | | | | | | | | | | its callers to emit a space character before calling it when a space is needed. This fixes several spurious whitespace issues in ScalarEvolution's debug dumps. See the test changes for examples. This also fixes odd space-after-tab indentation in the output for switch statements, and changes calls from being printed like this: call void @foo( i32 %x ) to this: call void @foo(i32 %x) llvm-svn: 56196
* adjust last patch per review feedbackDale Johannesen2008-09-141-3/+3
| | | | llvm-svn: 56194
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-1316-66/+69
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
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