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* Turn an assert into an error to make it a bit more friendly.Eric Christopher2012-07-021-2/+9
| | | | | | Part of rdar://6880388 and rdar://11766377 llvm-svn: 159590
* Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructorJack Carter2012-07-021-1/+2
| | | | | Contributer: Sasa Stankovic llvm-svn: 159574
* Extend TargetPassConfig to allow running only a subset of the normal passes.Bob Wilson2012-07-025-16/+43
| | | | | | | | | | | | | | | | | This is still a work in progress but I believe it is currently good enough to fix PR13122 "Need unit test driver for codegen IR passes". For example, you can run llc with -stop-after=loop-reduce to have it dump out the IR after running LSR. Serializing machine-level IR is not yet supported but we have some patches in progress for that. The plan is to serialize the IR to a YAML file, containing separate sections for the LLVM IR, machine-level IR, and whatever other info is needed. Chad suggested that we stash the stop-after pass in the YAML file and use that instead of the start-after option to figure out where to restart the compilation. I think that's a great idea, but since it's not implemented yet I put the -start-after option into this patch for testing purposes. llvm-svn: 159570
* Move assertion with TargetPassConfig's Initialized flag.Bob Wilson2012-07-021-2/+2
| | | | llvm-svn: 159569
* Consistently use AnalysisID types in TargetPassConfig.Bob Wilson2012-07-023-64/+62
| | | | | | | This makes it possible to just use a zero value to represent "no pass", so the phony NoPassID global variable is no longer needed. llvm-svn: 159568
* Add all codegen passes to the PassManager via TargetPassConfig.Bob Wilson2012-07-0213-98/+103
| | | | | | | | This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. llvm-svn: 159567
* Revert accidental checkin.Andrew Trick2012-07-021-3/+2
| | | | | | My last checkin was apparently not the branch I intended. It was missing one change (added by chandlerc), and contained a spurious change. llvm-svn: 159548
* GlobalOpt forgot to handle bitcast when analyzing globals. Found by inspection.Duncan Sands2012-07-021-0/+2
| | | | llvm-svn: 159546
* Added assertion in getVRegDef of MachineRegisterInfo to make sure the virtualManman Ren2012-07-022-5/+8
| | | | | | | register does not have multiple definitions. Modified TwoAddressInstructionPass to use getUniqueVRegDef instead of getVRegDef. llvm-svn: 159545
* Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-07-025-50/+66
| | | | | | Reapplies r159406 with minor cleanup. The regressions appear to have been spurious. llvm-svn: 159541
* Do not attempt to use ROR for Thumb1.Bob Wilson2012-07-021-2/+2
| | | | | | Patch by Matt Fischer! llvm-svn: 159538
* fix the regression I introduced in r159385 (it's necessary to update PHI ↵Nuno Lopes2012-07-021-0/+3
| | | | | | nodes in unwind BB llvm-svn: 159534
* IntRange:Stepan Dyatkovskiy2012-07-023-159/+98
| | | | | | | | | | | | | | | | | | | | | | - Changed isSingleNumber method behaviour. Now this flag is calculated on demand. IntegersSubsetMapping - Optimized diff operation. - Replaced type of Items field from std::list with std::map. - Added new methods: bool isOverlapped(self &RHS) void add(self& RHS, SuccessorClass *S) void detachCase(self& NewMapping, SuccessorClass *Succ) void removeCase(SuccessorClass *Succ) SuccessorClass *findSuccessor(const IntTy& Val) const IntTy* getCaseSingleNumber(SuccessorClass *Succ) IntegersSubsetTest - DiffTest: Added checks for successors. SimplifyCFG Updated SwitchInst usage (now it is case-ragnes compatible) for - SimplifyEqualityComparisonWithOnlyPredecessor - FoldValueComparisonIntoPredecessors llvm-svn: 159527
* [asan] small code simplificationKostya Serebryany2012-07-021-18/+14
| | | | llvm-svn: 159522
* This patch extends the libLLVMDebugInfo which contains a minimalistic DWARF ↵Alexey Samsonov2012-07-027-25/+108
| | | | | | | | | | parser: 1) DIContext is now able to return function name for a given instruction address (besides file/line info). 2) llvm-dwarfdump accepts flag --functions that prints the function name (if address is specified by --address flag). 3) test case that checks the basic functionality of llvm-dwarfdump added llvm-svn: 159512
* Now that RegistersDefinedFromSameValue handles one instruction being anRafael Espindola2012-07-011-14/+4
| | | | | | | | | implicit_def, the other instruction can be anything, including instructions that define multiple values. Be careful about that and don't assume what operand 0 is. Fixes pr13249. llvm-svn: 159509
* Optimization of shuffle node that can fit to the register form of VBROADCAST ↵Elena Demikhovsky2012-07-012-6/+39
| | | | | | instruction on AVX2. llvm-svn: 159504
* Reduce code size by using a second switch statement to avoid extra calls to ↵Craig Topper2012-07-011-9/+19
| | | | | | SelectAtomic64. Also catch cases where SelectAtomic64 fails. llvm-svn: 159503
* Add a break to the end of case statement missed in r159501.Craig Topper2012-07-011-0/+1
| | | | llvm-svn: 159502
* Fix a crash on release builds if gather intrinsics are passed a non-constant ↵Craig Topper2012-07-011-2/+5
| | | | | | value for the last argument. llvm-svn: 159501
* Use a second switch statement to reduce number of calls to SelectGather in ↵Craig Topper2012-07-011-17/+23
| | | | | | code. Reduces code size a bit. llvm-svn: 159500
* Reduce use list thrashing by using DenseMap's find_as for maps with ↵Benjamin Kramer2012-06-302-9/+11
| | | | | | | | ValueHandle keys. No functionality change. llvm-svn: 159497
* Don't reinsert the 'atexit' function if it already exists.Bill Wendling2012-06-301-2/+1
| | | | llvm-svn: 159491
* Handle implicit_defs in the register coalescer. I am still trying to produceRafael Espindola2012-06-301-27/+40
| | | | | | a reduced testcase, but this fixes pr13209. llvm-svn: 159479
* revert r159440. As Duncan pointed out, the test for invoke is not needed at ↵Nuno Lopes2012-06-291-2/+1
| | | | | | this point llvm-svn: 159471
* ARM: Clean up optimizeCompare in peephole, no functional change.Manman Ren2012-06-291-80/+73
| | | | | | | | Use getUniqueVRegDef. Replace a loop with existing interfaces: modifiesRegister and readsRegister. Factor out code into inline functions and simplify the code. llvm-svn: 159470
* Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren2012-06-293-28/+40
| | | | | | instructions with two register operands. llvm-svn: 159465
* Clear kill flags in InstrEmitter::EmitSubregNode().Jakob Stoklund Olesen2012-06-291-0/+1
| | | | | | | When a local virtual register is made global, make sure to clear any existing kill flags. llvm-svn: 159461
* Check for extra kill flags on live-out virtual registers.Jakob Stoklund Olesen2012-06-291-0/+14
| | | | | | | This would previously get reported as the misleading "Virtual register def doesn't dominate all uses." llvm-svn: 159460
* CodeGenPrepare: Don't crash when TLI is not available.Benjamin Kramer2012-06-291-1/+2
| | | | | | This happens when codegenprepare is invoked via opt. llvm-svn: 159457
* Add getUniqueVRegDef to MachineRegisterInfo.Manman Ren2012-06-291-0/+11
| | | | | | This comes in handy during peephole optimization. llvm-svn: 159453
* Rework this to clarify where the removal of nodes from the queue isDuncan Sands2012-06-291-8/+9
| | | | | | really happening. No intended functionality change. llvm-svn: 159451
* RefreshCallGraph: ignore 'invoke intrinsic'. IntrinsicInst doesnt not ↵Nuno Lopes2012-06-291-1/+3
| | | | | | recognize invoke, and shouldnt at this point, since the rest of LLVM codebase doesnt expect invoke of intrinsics llvm-svn: 159441
* ignore 'invoke new' in isInstructionTriviallyDead, since most callers are ↵Nuno Lopes2012-06-291-1/+2
| | | | | | not ready to handle invokes. instcombine will take care of this. llvm-svn: 159440
* Cleanup in DwarfDebug - fix a typo and remove two unused functionsAlexey Samsonov2012-06-291-7/+1
| | | | llvm-svn: 159433
* Fix a reassociate crash on sozefx when compiling with dragonegg+gcc-4.7 due toDuncan Sands2012-06-291-5/+13
| | | | | | | the optimizers producing a multiply expression with more multiplications than the original (!). llvm-svn: 159426
* Move llvm/Support/IRBuilder.h -> llvm/IRBuilder.hChandler Carruth2012-06-2925-138/+138
| | | | | | | | | | | | | | | | | This was always part of the VMCore library out of necessity -- it deals entirely in the IR. The .cpp file in fact was already part of the VMCore library. This is just a mechanical move. I've tried to go through and re-apply the coding standard's preferred header sort, but at 40-ish files, I may have gotten some wrong. Please let me know if so. I'll be committing the corresponding updates to Clang and Polly, and Duncan has DragonEgg. Thanks to Bill and Eric for giving the green light for this bit of cleanup. llvm-svn: 159421
* Update the CMake files.Bill Wendling2012-06-292-1/+1
| | | | llvm-svn: 159417
* The DIBuilder class is just a wrapper around debug info creationBill Wendling2012-06-296-7/+7
| | | | | | | (a.k.a. MDNodes). The module doesn't belong in Analysis. Move it to the VMCore instead. llvm-svn: 159414
* Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-06-295-64/+49
| | | | | | This reverts commit r159406. I noticed a performance regression so I'll back out for now. llvm-svn: 159411
* In the initial exec mode we always do a load to find the address of a variable.Rafael Espindola2012-06-291-4/+4
| | | | | | | | | Before this patch in pic 32 bit code we would add the global base register and not load from that address. This is a really old bug, but before the introduction of the tls attributes we would never select initial exec for pic code. llvm-svn: 159409
* misched: avoid scheduling instructions that can't be dispatched.Andrew Trick2012-06-291-6/+29
| | | | llvm-svn: 159408
* misched: count micro-ops toward the issue limit.Andrew Trick2012-06-291-10/+19
| | | | llvm-svn: 159407
* Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick2012-06-295-49/+64
| | | | | | | | | | | | | | The TargetInstrInfo::getNumMicroOps API does not change, but soon it will be used by MachineScheduler. Now each subtarget can specify the number of micro-ops per itinerary class. For ARM, this is currently always dynamic (-1), because it is used for load/store multiple which depends on the number of register operands. Zero is now a valid number of micro-ops. This can be used for nop pseudo-instructions or instructions that the hardware can squash during dispatch. llvm-svn: 159406
* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-294-23/+60
| | | | | | | | | | | | | | | Corrected type for index of llvm.x86.avx2.gather.d.pd.256 from 256-bit to 128-bit. Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256 from 256-bit to 128-bit. Support the following intrinsics: llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256 llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256 llvm-svn: 159402
* If the step value is a constant zero, the loop isn't going to terminate. FixesNick Lewycky2012-06-281-1/+1
| | | | | | the assert reported in PR13228! llvm-svn: 159393
* make the verifier accept @llvm.donothing as the only intrinsic that can be ↵Nuno Lopes2012-06-281-2/+4
| | | | | | | | invoked While at it, merge 2 tests and FileCheckize them llvm-svn: 159388
* make simplifyCFG erase invokes to readonly/readnone functionsNuno Lopes2012-06-281-6/+7
| | | | llvm-svn: 159385
* make instcombine produce calls to llvm.donothing instead of a random intrinsicNuno Lopes2012-06-281-7/+4
| | | | llvm-svn: 159384
* add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes2012-06-281-1/+8
| | | | | | CodeGen to ignore calls to it llvm-svn: 159383
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