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* [llvm-pdbdump] Propagate errors a little more consistentlyDavid Majnemer2016-07-102-9/+18
| | | | | | | PDBFile::getBlockData didn't really return any indication that it failed. It merely returned an empty buffer. llvm-svn: 275009
* [SCCP] Rename undefined -> unknown.Davide Italiano2016-07-101-40/+40
| | | | | | | | | | In the solver, isUndefined() does really mean "we don't know the value yet" rather than "this is an UndefinedValue". Discussed with Eli Friedman. Differential Revision: http://reviews.llvm.org/D22192 llvm-svn: 275004
* [PM] Port LoopVectorize to the new PM.Sean Silva2016-07-093-338/+373
| | | | llvm-svn: 275000
* [SCCP] Remove wrong and misleading vector handling code.Davide Italiano2016-07-091-53/+0
| | | | | | | | | This code was already commented out and it made some weird assumptions, e.g. using isUndefined() as "this value is UndefValue" instead of "we haven't computed this value is yet". Thanks to Eli Friedman for pointing out where I was wrong (and where this code was wrong). llvm-svn: 274995
* [X86][SSE] Add support for target shuffle combining to INSERTPSSimon Pilgrim2016-07-091-10/+48
| | | | llvm-svn: 274990
* [X86][SSE] Use scaleShuffleMask helper. NFCI.Simon Pilgrim2016-07-091-11/+2
| | | | llvm-svn: 274988
* [COFF, Dwarf] Don't emit DW_AT_location for dllimported entitiesDavid Majnemer2016-07-092-55/+66
| | | | | | | There exists no relocation which can describe the address of a dllimported variable: do not try to describe their location. llvm-svn: 274986
* [SLSR] Fix crash on handling 128-bit integers.Jingyue Wu2016-07-091-7/+20
| | | | | | | | | ConstantInt::getSExtValue may fail on >64-bit integers. Add checks to call getSExtValue only on narrow integers. As a minor aside, simplify slsr-gep.ll to remove unnecessary load instructions. llvm-svn: 274982
* fix documentation comments; NFCSanjay Patel2016-07-093-159/+143
| | | | llvm-svn: 274981
* [lanai] Treat .t as optional in assembly parser for RR operands and add ↵Jacques Pienaar2016-07-092-9/+38
| | | | | | predicate operand to ShiftRR llvm-svn: 274980
* AMDGPU: Move R600 only pieces into R600 classesMatt Arsenault2016-07-0911-109/+81
| | | | llvm-svn: 274979
* Revert "AMDGPU: Remove unused control flow intrinsic"Matt Arsenault2016-07-097-0/+32
| | | | llvm-svn: 274978
* [ArgPromote] Use function_ref and for-range loops.Benjamin Kramer2016-07-091-13/+10
| | | | | | No functionality change intended. llvm-svn: 274973
* AMDGPU: Prune AMDGPUAsmParser in libdeps.NAKAMURA Takumi2016-07-091-1/+1
| | | | llvm-svn: 274970
* AMDGPU: Fix fdiv lowering when f32 denormals supportedMatt Arsenault2016-07-091-5/+3
| | | | | | Also fix test not actually using function labels. llvm-svn: 274969
* [X86] Remove and autoupgrade 512-bit non-temporal store intrinsics.Craig Topper2016-07-093-27/+7
| | | | llvm-svn: 274966
* [LoopSimplify] Remove a comment which is unlikely to age well.Davide Italiano2016-07-091-4/+0
| | | | | | | Chandler pointed out in his review but I forgot to remove before committing, my bad. llvm-svn: 274963
* [PM] Port CrossDSOCFI to the new pass manager.Davide Italiano2016-07-093-1/+12
| | | | llvm-svn: 274962
* [CFLAA] Make a constant variable `const`. NFC.George Burgess IV2016-07-091-1/+1
| | | | | | | `const` was dropped by r274958, and the lack of `const` makes GCC6 (correctly) complain. llvm-svn: 274961
* [PM] Fix a think-o. mv {Scalar,Vectorize}/SLPVectorize.hSean Silva2016-07-092-2/+2
| | | | llvm-svn: 274960
* [PM] Port LoopSimplify to the new pass manager.Davide Italiano2016-07-094-0/+34
| | | | | | | | | While here move simplifyLoop() function to the new header, as suggested by Chandler in the review. Differential Revision: http://reviews.llvm.org/D21404 llvm-svn: 274959
* [CFLAA] Move the graph builder out from CFLSteens. NFC.George Burgess IV2016-07-093-422/+440
| | | | | | | | Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D22022 llvm-svn: 274958
* [CFLAA] Simplify CFLGraphBuilder. NFC.George Burgess IV2016-07-091-41/+25
| | | | | | | | | | | This removes a few fields from the graph builder by making us compute things (that we'd always compute anyway) more eagerly. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D22009 llvm-svn: 274957
* LivePhysRegs: addLiveOuts() can skip addPristines() in ret blockMatthias Braun2016-07-091-1/+2
| | | | | | | | Drive-by improvement: We would 1) add CSRs, 2) remove callee saved CSRs and 3) add all CSRs again for the return block. Just adding CSRs once obviously gives the same results. llvm-svn: 274955
* AMDGPU: Improve offset folding for register indexingMatt Arsenault2016-07-095-45/+102
| | | | llvm-svn: 274954
* AMDGPU: Simplify isSchedulingBoundaryMatt Arsenault2016-07-091-5/+4
| | | | llvm-svn: 274953
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-9/+27
| | | | | | | | | | | | | | An identity COPY like this: %AL = COPY %AL, %EAX<imp-def> has no semantic effect, but encodes liveness information: Further users of %EAX only depend on this instruction even though it does not define the full register. Replace the COPY with a KILL instruction in those cases to maintain this liveness information. (This reverts a small part of r238588 but this time adds a comment explaining why a KILL instruction is useful). llvm-svn: 274952
* AsmPrinter: Fix emitKill() not flush()ing a raw_string_ostreamMatthias Braun2016-07-091-1/+1
| | | | llvm-svn: 274951
* Add 'thinlto_src_module' md with asserts or -enable-import-metadataPiotr Padlewski2016-07-081-6/+19
| | | | | | | | | | | | | | | | Summary: This way the metadata will be only generated when asserts enabled, or when -enable-import-metadata specified FIXED missing colon on requires. Reviewers: tejohnson, eraman, mehdi_amini Subscribers: mehdi_amini, llvm-commits Differential Revision: http://reviews.llvm.org/D22167 llvm-svn: 274947
* Revert "Add 'thinlto_src_module' md with asserts or -enable-import-metadata"Piotr Padlewski2016-07-081-19/+6
| | | | | | | | | Reverting because of 17463 http://lab.llvm.org:8011/builders/clang-x86_64-linux-selfhost-modules/builds/17463 This reverts commit d20cb431bba2ba43b4c65a8556cff445bfefbb7c. llvm-svn: 274946
* Revert "InstCombine rule to fold truncs whose value is available"Anna Thomas2016-07-082-50/+17
| | | | | | | This reverts commit r274853. Caused failure in ppcBE build llvm-svn: 274943
* Lanai: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-6/+6
| | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr* in the Lanai backend. llvm-svn: 274942
* [MC, COFF] Permit a variable to be redefinedDavid Majnemer2016-07-081-19/+11
| | | | | | | | | Our assertions in WinCOFFStreamer had unexpected side effects resulting in symbols getting unexpectedly marked as used. This fixes PR28462. llvm-svn: 274941
* [TTI] Expose TTI::getGEPCost and use it in SLSR and NaryReassociate.Jingyue Wu2016-07-083-76/+19
| | | | | | NFC. llvm-svn: 274940
* AMDGPU: Remove unused control flow intrinsicMatt Arsenault2016-07-087-32/+0
| | | | llvm-svn: 274939
* Add 'thinlto_src_module' md with asserts or -enable-import-metadataPiotr Padlewski2016-07-081-6/+19
| | | | | | | | | | | | | | Summary: This way the metadata will be only generated when asserts enabled, or when -enable-import-metadata specified Reviewers: tejohnson, eraman, mehdi_amini Subscribers: mehdi_amini, llvm-commits Differential Revision: http://reviews.llvm.org/D22167 llvm-svn: 274938
* Reapply r274829 with fix for FP vectorsMatt Arsenault2016-07-081-2/+4
| | | | llvm-svn: 274937
* [PM] name the new PM LAA class LoopAccessAnalysis (LAA) /NFCXinliang David Li2016-07-082-4/+4
| | | | llvm-svn: 274934
* MSP430: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-084-32/+31
| | | | | | | | Avoid implicit conversions from MachineInstrBundleIIterator to MachineInstr* in the MSP430 backend by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable. llvm-svn: 274933
* [InstCombine] don't form select from bitcasted logic ops if bitcasts have >1 useSanjay Patel2016-07-081-2/+2
| | | | | | | | | | | | | | | This isn't a sure thing (are 2 extra bitcasts less expensive than a logic op?), but we'll try to err on the conservative side by going with the case that has less IR instructions. Note: This question came up in http://reviews.llvm.org/D22114 , but this part is independent of that patch proposal, so I'm making this small change ahead of that one. See also: http://reviews.llvm.org/rL274926 llvm-svn: 274932
* NVPTX: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-083-22/+21
| | | | | | | | | | | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr* in the NVPTX backend, mainly by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable and using range-based for loops. There was one piece of questionable code in NVPTXInstrInfo::AnalyzeBranch, where a condition checked a pointer converted from an iterator for nullptr. Since this case is impossible (moreover, the code above guarantees that the iterator is valid), I removed the check when I changed the pointer to a reference. Despite that case, there should be no functionality change here. llvm-svn: 274931
* Allow dead insts to be kept in DeadRemat only when they are rematerializable.Wei Mi2016-07-085-18/+27
| | | | | | | | | | | | | | | Because isReallyTriviallyReMaterializableGeneric puts many limits on rematerializable instructions, this fix can prevent instructions with tied virtual operands and instructions with virtual register uses from being kept in DeadRemat, so as to workaround the live interval consistency problem for the dummy instructions kept in DeadRemat. But we still need to fix the live interval consistency problem. This patch is just a short time relieve. PR28464 has been filed as a reminder. Differential Revision: http://reviews.llvm.org/D19486 llvm-svn: 274928
* Rename LoopAccessAnalysis to LoopAccessLegacyAnalysis /NFCXinliang David Li2016-07-087-30/+30
| | | | llvm-svn: 274927
* [InstCombine] don't form select from logic ops if it's unlikely that we'll ↵Sanjay Patel2016-07-081-17/+22
| | | | | | eliminate any ops llvm-svn: 274926
* AArch64: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-088-222/+217
| | | | | | | | Avoid implicit conversions from MachineInstrBundleInstr to MachineInstr* in the AArch64 backend, mainly by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable. llvm-svn: 274924
* Remove duplicate inclusion /NFCXinliang David Li2016-07-081-1/+0
| | | | llvm-svn: 274921
* ARM: Remove implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-088-135/+124
| | | | | | | | | | | Remove remaining implicit conversions from MachineInstrBundleIterator to MachineInstr* from the ARM backend. In most cases, I made them less attractive by preferring MachineInstr& or using a ranged-based for loop. Once all the backends are fixed I'll make the operator explicit so that this doesn't bitrot back. llvm-svn: 274920
* Remove inline hints computation from SampleProfile.cppDehao Chen2016-07-081-70/+0
| | | | | | | | | | | | Summary: As we will move to use uniformed hotness check in inliner, we do not need inline hints in SampleProfile pass any more. Reviewers: dnovillo, davidxl Subscribers: eraman, llvm-commits Differential Revision: http://reviews.llvm.org/D19287 llvm-svn: 274918
* Revert r274829, it caused PR28472.Nico Weber2016-07-081-1/+1
| | | | llvm-svn: 274916
* Sparc: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-081-3/+3
| | | | | | | Remove the only implicit conversions from MachineInstrBundleIterator to MachineInstr* in the Sparc backend. llvm-svn: 274913
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