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* Improve the debug output of DwarfDebug::buildLocationList().Adrian Prantl2016-02-292-1/+15
| | | | llvm-svn: 262265
* [Verifier] Minor fix to error message; NFCSanjoy Das2016-02-291-2/+2
| | | | llvm-svn: 262262
* [Hexagon] As a size optimization, not lazy extending TPREL or DTPREL ↵Colin LeMahieu2016-02-291-8/+14
| | | | | | variants since they're usually in range. llvm-svn: 262258
* [Hexagon] Missed member initialization causing ubsan failure.Colin LeMahieu2016-02-291-1/+2
| | | | llvm-svn: 262252
* Enable LoopLoadElimination by defaultAdam Nemet2016-02-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: I re-benchmarked this and results are similar to original results in D13259: On ARM64: SingleSource/Benchmarks/Polybench/linear-algebra/solvers/dynprog -59.27% SingleSource/Benchmarks/Polybench/stencils/adi -19.78% On x86: SingleSource/Benchmarks/Polybench/linear-algebra/solvers/dynprog -27.14% And of course the original ~20% gain on SPECint_2006/456.hmmer with Loop Distribution. In terms of compile time, there is ~5% increase on both SingleSource/Benchmarks/Misc/oourafft and SingleSource/Benchmarks/Linkpack/linkpack-pc. These are both very tiny loop-intensive programs where SCEV computations dominates compile time. The reason that time spent in SCEV increases has to do with the design of the old pass manager. If a transform pass does not preserve an analysis we *invalidate* the analysis even if there was *no* modification made by the transform pass. This means that currently we don't take advantage of LLE and LV sharing the same analysis (LAA) and unfortunately we recompute LAA *and* SCEV for LLE. (There should be a way to work around this limitation in the case of SCEV and LAA since both compute things on demand and internally cache their result. Thus we could pretend that transform passes preserve these analyses and manually invalidate them upon actual modification. On the other hand the new pass manager is supposed to solve so I am not sure if this is worthwhile.) Reviewers: hfinkel, dberlin Subscribers: dberlin, reames, mssimpso, aemerson, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16300 llvm-svn: 262250
* [AArch64] Fix isLegalAddImmediate() to return true for valid negative values.Geoff Berry2016-02-291-2/+2
| | | | | | | | | | Reviewers: t.p.northover, jmolloy Subscribers: mcrosier, aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D17463 llvm-svn: 262248
* Fix PR26585 by improving the promotion of DBG_VALUEs to DW_AT_locations.Adrian Prantl2016-02-291-2/+17
| | | | | | | | | | | | | | | When a variable is described by a single DBG_VALUE instruction we can often use a more efficient inline DW_AT_location instead of using a location list. This commit makes the heuristic that decides when to apply this optimization stricter by also verifying that the DBG_VALUE is live at the entry of the function (instead of just checking that it is valid until the end of the function). <rdar://problem/24611008> llvm-svn: 262247
* Rename embedded bitcode section in MachOSteven Wu2016-02-294-8/+17
| | | | | | | | | | | | | | Summary: Rename the section embeds bitcode from ".llvmbc,.llvmbc" to "__LLVM,__bitcode". The new name matches MachO section naming convention. Reviewers: rafael, pcc Subscribers: davide, llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D17388 llvm-svn: 262245
* [X86] Move the ATOMIC_LOAD_OP ISel from DAGToDAG to ISelLowering. NFCI.Ahmed Bougacha2016-02-295-340/+166
| | | | | | | | | | | | | | This is long-standing dirtiness, as acknowledged by r77582: The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. Doing this before selection will let us combine away some constructs. Differential Revision: http://reviews.llvm.org/D17659 llvm-svn: 262244
* [Hexagon] Setting sign mismatch flag on expression instead of using bit tricks.Colin LeMahieu2016-02-293-16/+22
| | | | llvm-svn: 262243
* Minor code cleanup. NFCRong Xu2016-02-291-16/+15
| | | | llvm-svn: 262242
* [WinEH] Make setjmp work correctly with EHDavid Majnemer2016-02-291-20/+136
| | | | | | | | | | | | | | | | | | | | 32-bit X86 EH on Windows utilizes a stack of registration nodes allocated and deallocated on entry/exit. A registration node contains a bunch of EH personality specific information like which try-state we are currently in. Because a setjmp target allows control flow from arbitrary program points, there is no way to ensure that the try-state we are in is correctly updated once we transfer control. MSVC compatible compilers, like MSVC and ICC, utilize runtime helpers to reinitialize the try-state when a longjmp occurs. This is implemented by adding additional arguments to _setjmp3: the desired try-state and a helper routine to update the try-state. Differential Revision: http://reviews.llvm.org/D17721 llvm-svn: 262241
* Move discriminator assignment to the right place.Dehao Chen2016-02-292-21/+7
| | | | | | | | | | | | Summary: Now discriminator is assigned per-function instead of per-module. Reviewers: davidxl, dnovillo Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D17664 llvm-svn: 262240
* [Hexagon] Using MustExtend flag on expression instead of passing around bools.Colin LeMahieu2016-02-294-55/+64
| | | | llvm-svn: 262238
* fix typo in commentAdrian Prantl2016-02-291-1/+1
| | | | llvm-svn: 262236
* Fix for PR26180Nemanja Ivanovic2016-02-293-6/+6
| | | | | | | | | | Corresponds to Phabricator review: http://reviews.llvm.org/D16592 This fix includes both an update to how we handle the "generic" CPU on LE systems as well as Anton's fix for the Fast Isel issue. llvm-svn: 262233
* [mips] Range check uimm20 and fixed a bug this revealed.Daniel Sanders2016-02-298-76/+57
| | | | | | | | | | | | | | | | | | | Summary: The bug was that dextu's operand 3 would print 0-31 instead of 32-63 when printing assembly. This came up when replacing MipsInstPrinter::printUnsignedImm() with a version that could handle arbitrary bit widths. MipsAsmPrinter::printUnsignedImm*() don't seem to be used so they have been removed. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15521 llvm-svn: 262231
* [mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined.Vasileios Kalintiris2016-02-291-1/+2
| | | | | | | | | | Reviewers: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15420 llvm-svn: 262230
* [mips] Make isel select the correct DEXT variant up front.Daniel Sanders2016-02-295-34/+44
| | | | | | | | | | | | | | | | | Summary: Previously, it would always select DEXT and substitute any invalid matches for DEXTU/DEXTM during MipsMCCodeEmitter::encodeInstruction(). This works but causes problems when adding range checked immediates to IAS. Now isel selects the correct variant up front. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D16810 llvm-svn: 262229
* IRObject: Mark extern_weak as weak.Rafael Espindola2016-02-291-1/+2
| | | | llvm-svn: 262222
* [InstSimplify] Restore fsub 0.0, (fsub 0.0, X) ==> X optznBenjamin Kramer2016-02-291-1/+1
| | | | | | | I accidentally removed this in r262212 but there was no test coverage to detect it. llvm-svn: 262215
* [mips] Make symbols an acceptable branch target when expanding ↵Daniel Sanders2016-02-291-1/+2
| | | | | | | | | | | | compare-to-immediate-and-branch macros. Reviewers: vkalintiris Subscribers: llvm-commits, vkalintiris, dim, seanbruno, dsanders Differential Revision: http://reviews.llvm.org/D15369 llvm-svn: 262213
* [InstSimplify] fsub 0.0, (fsub -0.0, X) ==> X is only safe if signed zeros ↵Benjamin Kramer2016-02-291-7/+8
| | | | | | | | are ignored. Only allow fsub -0.0, (fsub -0.0, X) ==> X without nsz. PR26746. llvm-svn: 262212
* [PM] Wire up optimization levels and default pipeline construction APIsChandler Carruth2016-02-281-2/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in the PassBuilder. These are really just stubs for now, but they give a nice API surface that Clang or other tools can start learning about and enabling for experimentation. I've also wired up parsing various synthetic module pass names to generate these set pipelines. This allows the pipelines to be combined with other passes and have their order controlled, with clear separation between the *kind* of canned pipeline, and the *level* of optimization to be used within that canned pipeline. The most interesting part of this patch is almost certainly the spec for the different optimization levels. I don't think we can ever have hard and fast rules that would make it easy to determine whether a particular optimization makes sense at a particular level -- it will always be in large part a judgement call. But hopefully this will outline the expected rationale that should be used, and the direction that the pipelines should be taken. Much of this was based on a long llvm-dev discussion I started years ago to try and crystalize the intent behind these pipelines, and now, at long long last I'm returning to the task of actually writing it down somewhere that we can cite and try to be consistent with. Differential Revision: http://reviews.llvm.org/D12826 llvm-svn: 262196
* [PM] Appease mingw32's auto-import DLL build with minimal tweaks, with fix ↵NAKAMURA Takumi2016-02-2814-0/+28
| | | | | | | | for clang. char AnalysisBase::ID should be declared as extern and defined in one module. llvm-svn: 262188
* [mips] Remove unused function declarations from MipsRegisterInfo.h. NFC.Vasileios Kalintiris2016-02-281-10/+0
| | | | llvm-svn: 262187
* Revert r262185, "[PM] Appease mingw32's auto-import DLL build with minimal ↵NAKAMURA Takumi2016-02-2814-28/+0
| | | | | | | | tweaks." I'll rework soon. llvm-svn: 262186
* [PM] Appease mingw32's auto-import DLL build with minimal tweaks.NAKAMURA Takumi2016-02-2814-0/+28
| | | | | | char AnalysisBase::ID should be declared as extern and defined in one module. llvm-svn: 262185
* WebAssembly: fix buildJF Bastien2016-02-282-3/+3
| | | | | | More API churn, experimental target got sad. llvm-svn: 262179
* [AVX512][PSLLW ][PSLLV] Change imm8 to intMichael Zuckerman2016-02-281-3/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D17684 llvm-svn: 262176
* [PGO] Remove redundant counter copies for avail_extern functions.Xinliang David Li2016-02-271-3/+32
| | | | | | Differential Revision: http://reviews.llvm.org/D17654 llvm-svn: 262157
* CodeGen: Remove an iterator => pointer conversion, NFCDuncan P. N. Exon Smith2016-02-271-2/+2
| | | | | | Part of PR26753. llvm-svn: 262154
* AMDGPU: More bits of frame index are known to be zeroMatt Arsenault2016-02-274-29/+26
| | | | | | | | | | | | The maximum private allocation for the whole GPU is 4G, so the maximum possible index for a single workitem is the maximum size divided by the smallest granularity for a dispatch. This increases the number of known zero high bits, which enables more offset folding. The maximum private size per workitem with this is 128M but may be smaller still. llvm-svn: 262153
* CodeGen: Use MachineInstr& in InlineSpiller::rematerializeFor()Duncan P. N. Exon Smith2016-02-271-16/+15
| | | | | | | | InlineSpiller::rematerializeFor() never uses its parameter as an iterator, so take it by reference instead. This removes an implicit conversion from MachineBasicBlock::iterator to MachineInstr*. llvm-svn: 262152
* CodeGen: Update LiveIntervalAnalysis API to use MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-276-42/+43
| | | | | | These parameters aren't expected to be null, so take them by reference. llvm-svn: 262151
* CodeGen: Change MachineInstr to use MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-2712-32/+32
| | | | | | | | Change MachineInstr API to prefer MachineInstr& over MachineInstr* whenever the parameter is expected to be non-null. Slowly inching toward being able to fix PR26753. llvm-svn: 262149
* DAGCombiner: Don't unnecessarily swap operands in ReassociateOpsMatt Arsenault2016-02-271-2/+2
| | | | | | | | | | | | | | | | | | In the case where op = add, y = base_ptr, and x = offset, this transform: (op y, (op x, c1)) -> (op (op x, y), c1) breaks the canonical form of add by putting the base pointer in the second operand and the offset in the first. This fix is important for the R600 target, because for some address spaces the base pointer and the offset are stored in separate register classes. The old pattern caused the ISel code for matching addressing modes to put the base pointer and offset in the wrong register classes, which required no-trivial code transformations to fix. llvm-svn: 262148
* CodeGen: Use MachineInstr& in HashMachineInstr, NFCDuncan P. N. Exon Smith2016-02-271-10/+10
| | | | | | Also update HashEndOfMBB to take MachineBasicBlock&. llvm-svn: 262146
* CodeGen: Use MachineInstr& in AntiDepBreaker API, NFCDuncan P. N. Exon Smith2016-02-276-91/+88
| | | | | | | | Take parameters as MachineInstr& instead of MachineInstr* in AntiDepBreaker API, since these are required to be non-null. No functionality change intended. Looking toward PR26753. llvm-svn: 262145
* CodeGen: Assert valid MI in AntiDepBreaker::UpdateDbgValueDuncan P. N. Exon Smith2016-02-271-1/+2
| | | | | | | This already assumes a valid MI, since it dereferences the MI in an assertion before checking for null. At an explicit assert. llvm-svn: 262144
* AArch64: Use MachineInstr& in guaranteesZeroRegInBlock(), NFCDuncan P. N. Exon Smith2016-02-271-6/+6
| | | | llvm-svn: 262143
* CodeGen: Update DFAPacketizer API to take MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-275-84/+88
| | | | | | | | | In all but one case, change the DFAPacketizer API to take MachineInstr& instead of MachineInstr*. In DFAPacketizer::endPacket(), take MachineBasicBlock::iterator. Besides cleaning up the API, this is in search of PR26753. llvm-svn: 262142
* WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFCDuncan P. N. Exon Smith2016-02-2716-29/+29
| | | | | | | | Update APIs in MachineInstrBundle.h to take and return MachineInstr& instead of MachineInstr* when the instruction cannot be null. Besides being a nice cleanup, this is tacking toward a fix for PR26753. llvm-svn: 262141
* WebAssembly: fix buildJF Bastien2016-02-271-8/+8
| | | | | | It was broken by the work for PR26753. llvm-svn: 262140
* Revert "[sancov] do not instrument nodes that are full pre-dominators"Renato Golin2016-02-271-22/+11
| | | | | | This reverts commit r262103, as it broke all ARM and AArch64 bots. llvm-svn: 262139
* Tidyup for loops - don't repeat upper limit evaluation if you don't have to. ↵Simon Pilgrim2016-02-271-5/+5
| | | | | | NFCI. llvm-svn: 262137
* The patch adds missing registers and instructions to complete all the ↵Chris Dewhurst2016-02-274-18/+310
| | | | | | | | | | | | | registers supported by the Sparc v8 manual. These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262133
* Strip trailing whitespace. NFCI.Simon Pilgrim2016-02-271-9/+9
| | | | llvm-svn: 262131
* [PM] Provide explicit instantiation declarations and definitions for theChandler Carruth2016-02-273-0/+8
| | | | | | PassManager and AnalysisManager template specializations as well. llvm-svn: 262128
* [PM] Provide two templates for the two directionalities of analysisChandler Carruth2016-02-273-109/+16
| | | | | | | | | | | | | | | | | | | | | | | | manager proxies and use those rather than repeating their definition four times. There are real differences between the two directions: outer AMs are const and don't need to have invalidation tracked. But every proxy in a particular direction is identical except for the analysis manager type and the IR unit they proxy into. This makes them prime candidates for nice templates. I've started introducing explicit template instantiation declarations and definitions as well because we really shouldn't be emitting all this everywhere. I'm going to go back and add the same for the other templates like this in a follow-up patch. I've left the analysis manager as an opaque type rather than using two IR units and requiring it to be an AnalysisManager template specialization. I think its important that users retain the ability to provide their own custom analysis management layer and provided it has the appropriate API everything should Just Work. llvm-svn: 262127
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