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* CostModel: We have API for checking the costs of known shuffles. This patch addsNadav Rotem2012-12-241-1/+2
| | | | | | support for the insert-subvector and extract-subvector kinds. llvm-svn: 171027
* Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64Elena Demikhovsky2012-12-241-0/+12
| | | | llvm-svn: 171026
* Removed "static" from "__jit_debug_descriptor" because "static" adds C++ ↵Elena Demikhovsky2012-12-241-1/+1
| | | | | | mangling prefix to this symbol. llvm-svn: 171025
* Some x86 instructions can load/store one of the operands to memory. On SSE, ↵Nadav Rotem2012-12-241-260/+260
| | | | | | | | | this memory needs to be aligned. When these instructions are encoded in VEX (on AVX) there is no such requirement. This changes the folding tables and removes the alignment restrictions from VEX-encoded instructions. llvm-svn: 171024
* LoopVectorizer: When checking for vectorizable types, also checkNadav Rotem2012-12-241-1/+8
| | | | | | | | the StoreInst operands. PR14705. llvm-svn: 171023
* Change the codegen Cost Model API for shuffeles. This patch removes the API ↵Nadav Rotem2012-12-241-1/+2
| | | | | | for broadcast and adds a more general API that accepts an enum of known shuffles. llvm-svn: 171022
* Fix typo in commentsAlexey Samsonov2012-12-241-1/+1
| | | | llvm-svn: 171021
* Update the docs of the cost model.Nadav Rotem2012-12-241-3/+6
| | | | llvm-svn: 171016
* LoopVectorizer: Fix an endless loop in the code that looks for reductions.Nadav Rotem2012-12-241-7/+8
| | | | | | | | The bug was in the code that detects PHIs in if-then-else block sequence. PR14701. llvm-svn: 171008
* CostModel: Change the default target-independent implementation for findingNadav Rotem2012-12-231-3/+13
| | | | | | | | the cost of arithmetic functions. We now assume that the cost of arithmetic operations that are marked as Legal or Promote is low, but ops that are marked as custom are higher. llvm-svn: 171002
* LoopVectorize: Fix accidentaly inverted condition.Benjamin Kramer2012-12-231-1/+1
| | | | llvm-svn: 171001
* LoopVectorize: For scalars and void types there is no need to compute vector ↵Benjamin Kramer2012-12-231-12/+10
| | | | | | | | insert/extract costs. Fixes an assert during the build of oggenc in the test suite. llvm-svn: 171000
* whitespaceNadav Rotem2012-12-231-28/+0
| | | | llvm-svn: 170997
* Rename a function.Nadav Rotem2012-12-231-4/+4
| | | | llvm-svn: 170996
* Loop Vectorizer: Update the cost model of scatter/gather operations and makeNadav Rotem2012-12-233-22/+31
| | | | | | them more expensive. llvm-svn: 170995
* Remove trailing whitespace.Craig Topper2012-12-221-94/+94
| | | | llvm-svn: 170991
* Remove trailing whitespaceCraig Topper2012-12-221-126/+126
| | | | llvm-svn: 170990
* Remove a special case that doesn't seem necessary any longer.Jakob Stoklund Olesen2012-12-221-13/+2
| | | | | | | Back when this exception was added, it was skipping a lot more code, but now it just looks like a premature optimization. llvm-svn: 170989
* Use getNumOperands() instead of Operands.size().Jakob Stoklund Olesen2012-12-221-11/+11
| | | | | | | The representation of the Operands array is going to change soon so it can be allocated from a BumpPtrAllocator. llvm-svn: 170988
* X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available.Benjamin Kramer2012-12-221-5/+29
| | | | | | | pmuludq is slow, but it turns out that all the unpacking and packing of the scalarized mul is even slower. 10% speedup on loop-vectorized paq8p. llvm-svn: 170985
* X86: Emit vector sext as shuffle + sra if vpmovsx is not available.Benjamin Kramer2012-12-221-8/+39
| | | | | | | Also loosen the SSSE3 dependency a bit, expanded pshufb + psra is still better than scalarized loads. Fixes PR14590. llvm-svn: 170984
* Change 'AttrVal' to 'AttrKind' to better reflect that it's a kind of ↵Bill Wendling2012-12-224-24/+24
| | | | | | attribute instead of the value of the attribute. llvm-svn: 170972
* Don't call back() on an empty SmallVector. Found by -fsanitize=enum!Richard Smith2012-12-221-1/+1
| | | | llvm-svn: 170968
* In some cases, due to scheduling constraints we copy the EFLAGS.Nadav Rotem2012-12-212-1/+21
| | | | | | | | | | | | The only way to read the eflags is using push and pop. If we don't adjust the stack then we run over the first frame index. This is not something that we want to do, so we have to make sure that our machine function does not copy the flags. If it does then we have to emit the prolog that adjusts the stack. rdar://12896831 llvm-svn: 170961
* [mips] Refactor subword-swap, EXT/INS, load-effective-address and read-hardwareAkira Hatanaka2012-12-213-54/+73
| | | | | | instructions. llvm-svn: 170956
* [mips] Refactor SYNC and multiply/divide instructions.Akira Hatanaka2012-12-213-54/+59
| | | | llvm-svn: 170955
* [mips] Refactor BAL instructions.Akira Hatanaka2012-12-212-10/+40
| | | | llvm-svn: 170954
* [mips] Fix encoding of BAL instruction. Also, fix assembler test case whichAkira Hatanaka2012-12-211-1/+1
| | | | | | was not catching the error. llvm-svn: 170953
* [mips] Refactor jump, jump register, jump-and-link and nop instructions.Akira Hatanaka2012-12-213-41/+50
| | | | llvm-svn: 170952
* [mips] Refactor load/store left/right and load-link and store-conditionalAkira Hatanaka2012-12-212-79/+52
| | | | | | instructions. llvm-svn: 170950
* [mips] Refactor load/store instructions.Akira Hatanaka2012-12-212-62/+34
| | | | llvm-svn: 170948
* [mips] Remove unnecessary isPseudo parameter.Akira Hatanaka2012-12-211-24/+16
| | | | llvm-svn: 170947
* [mips] Refactor LUI instruction.Akira Hatanaka2012-12-213-6/+17
| | | | llvm-svn: 170944
* [mips] Refactor count leading zero or one instructions.Akira Hatanaka2012-12-213-20/+29
| | | | llvm-svn: 170942
* [mips] Refactor sign-extension-in-register instructions.Akira Hatanaka2012-12-213-11/+21
| | | | llvm-svn: 170940
* [mips] Refactor instructions which copy from and to HI/LO registers.Akira Hatanaka2012-12-213-22/+35
| | | | llvm-svn: 170939
* [mips] Refactor logical NOR instructions.Akira Hatanaka2012-12-212-7/+6
| | | | llvm-svn: 170937
* [mips] Move instruction definitions in MipsInstrInfo.td.Akira Hatanaka2012-12-211-37/+39
| | | | llvm-svn: 170936
* R600: Coding style - remove empty spaces from the beginning of functionsTom Stellard2012-12-213-35/+0
| | | | | | No functionality change. llvm-svn: 170923
* R600: Fix MAX_UINT definitionTom Stellard2012-12-211-1/+1
| | | | | | | Patch by: Vadim Girlin Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 170922
* R600: Add SHADOWCUBE to TEX_SHADOW patternTom Stellard2012-12-211-1/+1
| | | | | | | Patch by: Vadim Girlin Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 170921
* Cleanup compiler warnings on discarding type qualifiers in casts. Switch to ↵Benjamin Kramer2012-12-212-6/+10
| | | | | | | | | | C++ style casts. Patch by Saleem Abdulrasool! Differential Revision: http://llvm-reviews.chandlerc.com/D204 llvm-svn: 170917
* X86: Match pmin/pmax as a target specific dag combine. This occurs during ↵Benjamin Kramer2012-12-211-0/+77
| | | | | | | | vectorization. Part of PR14667. llvm-svn: 170908
* Remove duplicate includes.Roman Divacky2012-12-2113-14/+0
| | | | llvm-svn: 170902
* R600: Expand vec4 INT <-> FP conversionsTom Stellard2012-12-211-0/+4
| | | | llvm-svn: 170901
* X86: Match the SSE/AVX min/max vector ops using a custom node instead of ↵Benjamin Kramer2012-12-215-97/+171
| | | | | | | | intrinsics This is very mechanical, no functionality change. Preparation for PR14667. llvm-svn: 170898
* [msan] Remove unreachable blocks before instrumenting a function.Evgeniy Stepanov2012-12-212-0/+49
| | | | llvm-svn: 170883
* Add a missing "virtual" keyword.Nadav Rotem2012-12-211-2/+2
| | | | llvm-svn: 170842
* Enable if-conversion.Nadav Rotem2012-12-211-1/+1
| | | | llvm-svn: 170841
* Add ARM cortex-r5 subtarget.Quentin Colombet2012-12-212-1/+13
| | | | llvm-svn: 170840
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