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* [codeview] Bail on a DBG_VALUE register operand with no registerReid Kleckner2016-02-162-6/+10
| | | | | | | | | | This apparently comes up when the register allocator decides that a variable will become undef along a certain path. Also improve the error message we emit when we can't map from LLVM register number to CV register number. llvm-svn: 261016
* [WebAssemly] Don't move calls or stores past intervening loadsDerek Schuff2016-02-161-0/+1
| | | | | | | | | | The register stackifier currently checks for intervening stores (and loads that may alias them) but doesn't account for the fact that the instruction being moved may affect intervening loads. Differential Revision: http://reviews.llvm.org/D17298 llvm-svn: 261014
* [LTO] Support StatisticsAdam Nemet2016-02-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | Summary: I thought -Xlinker -mllvm -Xlinker -stats worked at some point but maybe it never did. For clang, I believe that stats are printed from cc1_main. This patch also prints them for LTO, specifically right after codegen happens. I only looked at the C API for LTO briefly to see if this is a good place. Probably there are still cases where this wouldn't be printed but it seems to be working for the common case. I also experimented putting this in the LTOCodeGenerator destructor but that didn't trigger for me because ld64 does not destroy the LTOCodeGenerator. Reviewers: dexonsmith, joker.eph Subscribers: rafael, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D17302 llvm-svn: 261013
* [codeview] Fix assertion on non-memory, non-register DBG_VALUE instructionsReid Kleckner2016-02-161-0/+7
| | | | | | | Eventually we should find a way to describe constant variables, but it is not obvious how to do this at the moment. llvm-svn: 261010
* [Hexagon] Adding relocation for code size, cold path optimization allowing a ↵Colin LeMahieu2016-02-1611-1/+70
| | | | | | | | | | | | 23-bit 4-byte aligned relocation to be a valid instruction encoding. The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes. Another way is to put a .word32 and mix code and data within a function. The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware. This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits. Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register. llvm-svn: 261006
* [AArch64] Add pass to remove redundant copy after RAJun Bum Lim2016-02-164-0/+181
| | | | | | | | | | | | | | | | | | | | | Summary: This change will add a pass to remove unnecessary zero copies in target blocks of cbz/cbnz instructions. E.g., the copy instruction in the code below can be removed because the cbz jumps to BB1 when x0 is zero : BB0: cbz x0, .BB1 BB1: mov x0, xzr Jun Reviewers: gberry, jmolloy, HaoLiu, MatzeB, mcrosier Subscribers: mcrosier, mssimpso, haicheng, bmakam, llvm-commits, aemerson, rengolin Differential Revision: http://reviews.llvm.org/D16203 llvm-svn: 261004
* [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code.Quentin Colombet2016-02-168-93/+166
| | | | | | | | | Original message: Get rid of the ifdefs in TargetLowering. Introduce a new API used only by GlobalISel: CallLowering. This API will contain target hooks dedicated to call lowering. llvm-svn: 260998
* Pass a std::unique_ptr to IRMover::move.Rafael Espindola2016-02-162-55/+57
| | | | | | | It was already the one "destroying" the source module, now the API reflects that. llvm-svn: 260989
* [WebAssembly] Insert COPY_LOCAL between CopyToReg and FrameIndex DAG nodesDerek Schuff2016-02-163-24/+34
| | | | | | | | | | | | | | CopyToReg nodes don't support FrameIndex operands. Other targets select the FI to some LEA-like instruction, but since we don't have that, we need to insert some kind of instruction that can take an FI operand and produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy copy_local between Op and its FI operand. This results in a redundant copy which we should optimize away later (maybe in the post-FI-lowering peephole pass). Differential Revision: http://reviews.llvm.org/D17213 llvm-svn: 260987
* [AMDGPU] Rename $dst operand to $vdst for VOP instructions.Tom Stellard2016-02-166-77/+120
| | | | | | | | | | | | | | Summary: This change renames output operand for VOP instructions from dst to vdst. This is needed to enable decoding named operands for disassembler. Reviewers: vpykhtin, tstellarAMD, arsenm Subscribers: arsenm, llvm-commits, nhaustov Projects: #llvm-amdgpu-spb Differential Revision: http://reviews.llvm.org/D16920 llvm-svn: 260986
* Revert 260705, it appears to be causing pr26628Philip Reames2016-02-161-21/+0
| | | | | | The root issue appears to be a confusion around what makeNoWrapRegion actually does. It seems likely we need two versions of this function with slightly different semantics. llvm-svn: 260981
* [X86] Enable the LEA optimization pass by default.Andrey Turetskiy2016-02-161-4/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D16877 llvm-svn: 260979
* [WebAssembly] Switch from RPO sorting to topological sorting.Dan Gohman2016-02-161-109/+167
| | | | | | | | | | WebAssembly doesn't require full RPO; topological sorting is sufficient and can preserve more of the MachineBlockPlacement ordering. Unfortunately, this still depends a lot on heuristics, because while we use the MachineBlockPlacement ordering as a guide, we can't use it in places where it isn't topologically ordered. This area will require further attention. llvm-svn: 260978
* A signed bitfield's range is [-1,0], so assigning 1 is technically an ↵Aaron Ballman2016-02-161-1/+1
| | | | | | overflow. However, the other bitfield requires a signed value (it supports negative offsets), so it is slightly better to retain a signed 1-bit bitfield and use -1 instead of 1. Silences an MSVC warning. llvm-svn: 260973
* Reverting r260922-260923; they cause link failures with MSVC.Aaron Ballman2016-02-168-163/+91
| | | | | | | http://lab.llvm.org:8011/builders/lldb-x86-windows-msvc2015/builds/15436/steps/build/logs/stdio http://bb.pgr.jp/builders/msbuild-llvmclang-x64-msc18-DA/builds/961/steps/build_llvm/logs/stdio llvm-svn: 260972
* [WebAssembly] Create new registers instead of reusing old ones in RegStackify.Dan Gohman2016-02-161-7/+9
| | | | | | | | This avoids some complications updating LiveIntervals to be aware of the new register lifetimes, because we can just compute new intervals from scratch rather than describe how the old ones have been changed. llvm-svn: 260971
* [WebAssembly] Implement support for custom NaN bit patterns.Dan Gohman2016-02-164-14/+36
| | | | llvm-svn: 260968
* [X86] PR26575: Fix LEA optimization pass.Andrey Turetskiy2016-02-161-0/+5
| | | | | | | | | | Add a missing check for a type of address displacement operand of the load/store instruction being a candidate for LEA substitution. Ref: https://llvm.org/bugs/show_bug.cgi?id=26575 Differential Revision: http://reviews.llvm.org/D17261 llvm-svn: 260959
* [Hexagon] Hoist nonnull assert up.Benjamin Kramer2016-02-162-1/+1
| | | | | | | | Once a pointer is turned into a reference it cannot be nullptr, clang rightfully warns about this assert being a tautology. Put the assert before the reference is created. llvm-svn: 260949
* [X86] Fix typos. NFCCraig Topper2016-02-161-2/+2
| | | | llvm-svn: 260943
* [X86] Use range-based for loop. NFCCraig Topper2016-02-161-3/+2
| | | | llvm-svn: 260942
* [X86] Fix typo in comment. NFCCraig Topper2016-02-161-1/+1
| | | | llvm-svn: 260940
* [SCEVExpander] Make findExistingExpansion smarterJunmo Park2016-02-162-28/+40
| | | | | | | | | | | | | Summary: Extending findExistingExpansion can use existing value in ExprValueMap. This patch gives 0.3~0.5% performance improvements on benchmarks(test-suite, spec2000, spec2006, commercial benchmark) Reviewers: mzolotukhin, sanjoy, zzheng Differential Revision: http://reviews.llvm.org/D15559 llvm-svn: 260938
* Restore the capability to manipulate datalayout from the C APIAmaury Sechet2016-02-162-0/+12
| | | | | | | | | | | | | | | | | Summary: This consist in variosu addition to the C API: LLVMTargetDataRef LLVMGetModuleDataLayout(LLVMModuleRef M); void LLVMSetModuleDataLayout(LLVMModuleRef M, LLVMTargetDataRef DL); LLVMTargetDataRef LLVMCreateTargetMachineData(LLVMTargetMachineRef T); Reviewers: joker.eph, Wallbraker, echristo Subscribers: axw Differential Revision: http://reviews.llvm.org/D17255 llvm-svn: 260936
* Simplify users of StringRef::{l,r}trim (NFC)Vedant Kumar2016-02-162-10/+9
| | | | | | | r260925 introduced a version of the *trim methods which is preferable when trimming a single kind of character. Update all users in llvm. llvm-svn: 260926
* [GlobalISel] Get rid of the ifdefs in TargetLowering.Quentin Colombet2016-02-168-91/+163
| | | | | | | Introduce a new API used only by GlobalISel: CallLowering. This API will contain target hooks dedicated to call lowering. llvm-svn: 260922
* Deprecate LLVMGetDataLayout and replace it by LLVMGetDataLayoutStrAmaury Sechet2016-02-161-1/+5
| | | | | | | | | | | | Summary: The name is confusing as it matche another method on the module. Reviewers: joker.eph, Wallbraker, echristo Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17283 llvm-svn: 260920
* Kill LLVMAddTargetDataAmaury Sechet2016-02-161-3/+0
| | | | | | | | | | | | Summary: It's red, it's dead. Reviewers: joker.eph, Wallbraker, echristo Subscribers: llvm-commits, axw Differential Revision: http://reviews.llvm.org/D17282 llvm-svn: 260919
* Implemented stack symbol table ordering/packing optimization to improve data ↵Zia Ansari2016-02-153-3/+163
| | | | | | | | locality and code size from SP/FP offset encoding. Differential Revision: http://reviews.llvm.org/D15393 llvm-svn: 260917
* Rename LLVMSetDataLayout's argument to match what they stand forAmaury Sechet2016-02-151-2/+2
| | | | llvm-svn: 260916
* SmallPtrSet: Avoid initializing Array in the small case.Matthias Braun2016-02-151-53/+50
| | | | | | | | | | | This patch avoids the initial memset at the cost of making iterators slightly more complex. This should be beneficial as most SmallPtrSets hold no or only a few elements, while iterating over them is less common. Differential Revision: http://reviews.llvm.org/D16672 llvm-svn: 260913
* APInt: Slightly simplify countLeadingZerosSlowCase()Matthias Braun2016-02-151-19/+8
| | | | | | | | | We always clear the unused bits in the most signifant word so there is no need to mask them out in countLeadingZerosSlowCase(). Differential Revision: http://reviews.llvm.org/D16621 llvm-svn: 260911
* APInt: Further simplify APInt::EqualSlowCase as suggested by DuncanMatthias Braun2016-02-151-4/+1
| | | | llvm-svn: 260910
* [X86] Remove now-dead variable and redundant assert. NFC.Ahmed Bougacha2016-02-151-2/+0
| | | | | | | The variable was made dead in NDEBUG by r260901, but the assert was redundant anyway: get rid of both. llvm-svn: 260908
* LiveIntervalAnalysis: Support moving of subregister defs in handleMoveMatthias Braun2016-02-151-34/+153
| | | | | | | | | | | | | | | | | | | This is an updated version which fixes a bug that happened with uses tied to an earlyclobber operand which end at an unusual slotindex. If two definitions write to independent subregisters then they can be put in any order. LiveIntervalAnalysis::handleMove() did not support this previously because it looks like moving a definition of a vreg past another one. This is a modified version of a patch proposed (two years ago) by Vincent Lejeune! This version does not touch the read-undef flags and is extended for the case of moving a subregister def behind all uses - this can happen for subregister defs that are completely unused. Differential Revision: http://reviews.llvm.org/D9067 llvm-svn: 260906
* MachineVerifier: Add parameter to choose if MachineFunction::verify() abortsMatthias Braun2016-02-151-10/+13
| | | | | | | The abort on error behaviour is unpractical for debugger and unittest usage. llvm-svn: 260904
* [NFC] Fixing naming convention, lowercase start of function name.Colin LeMahieu2016-02-156-33/+33
| | | | llvm-svn: 260903
* [Hexagon] Wrapping all MCExprs inside MCOperands within HexagonMCExpr to ↵Colin LeMahieu2016-02-158-92/+169
| | | | | | simplify handling and allow flags on the expression. llvm-svn: 260902
* [CodeGen] Document and use getConstant's splat-building feature. NFC.Ahmed Bougacha2016-02-155-96/+36
| | | | | | Differential Revision: http://reviews.llvm.org/D17229 llvm-svn: 260901
* [ScheduleDAGInstrs] isUnsafeMemoryObject() removedJonas Paulsson2016-02-151-36/+5
| | | | | | | | | | | This function was basically useless, since volatile memacesses or MIs with unmodelled sideffects become global memory objects, and the other little checks are also done elsewhere. Reviewed by Andy Trick http://reviews.llvm.org/D16881 llvm-svn: 260899
* [mips] Implemented the .hword directive.Scott Egerton2016-02-152-0/+6
| | | | | | | | | | | | | | Summary: In order to pass the tests, this required marking R_MIPS_16 relocations as needing to point to the symbol and not the section. Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D17200 llvm-svn: 260896
* [Hexagon] Use zero-extending loads for anyextKrzysztof Parzyszek2016-02-151-6/+6
| | | | llvm-svn: 260895
* [LV] Add support for insertelt/extractelt processing during type truncationSilviu Baranga2016-02-151-0/+14
| | | | | | | | | | | | | | | | | | Summary: While shrinking types according to the required bits, we can encounter insert/extract element instructions. This will cause us to reach an llvm_unreachable statement. This change adds support for truncating insert/extract element operations, and adds a regression test. Reviewers: jmolloy Subscribers: mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D17078 llvm-svn: 260893
* Tweak the LICM code to reuse the first sub-loop instead of creating a new oneRoman Gareev2016-02-151-14/+32
| | | | | | | | | | | | | LICM starts with an *empty* AST, and then merges in each sub-loop. While the add code is appropriate for sub-loop 2 and up, it's utterly unnecessary for sub-loop 1. If the AST starts off empty, we can just clone/move the contents of the subloop into the containing AST. Reviewed-by: Philip Reames <listmail@philipreames.com> Differential Revision: http://reviews.llvm.org/D16753 llvm-svn: 260892
* Reverted r260879 as it caused test failures in lld.Scott Egerton2016-02-151-1/+1
| | | | llvm-svn: 260880
* [mips] Removed the SHF_ALLOC flag from the .pdr section.Scott Egerton2016-02-151-1/+1
| | | | | | | | | | | | | | | | | Summary: This section is used for debug information and has no need to be in memory at runtime. With this patch, LLVM now emits the same flags as the GNU assembler. This patch also fixes an error when compiling the Linux kernel, The error is that there are relocations within the .pdr section in a VDSO. Reviewers: vkalintiris, dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D17199 llvm-svn: 260879
* AVX512: Change store size of kmask. Store size of v8i1, v4i1 , v2i1 and i1 ↵Igor Breger2016-02-153-20/+40
| | | | | | | | | | are changed to 16 bits. If KMOVB not supported (require AVX512DQ) only KMOVW can be used so store size should be 2 bytes. Differential Revision: http://reviews.llvm.org/D17138 llvm-svn: 260878
* [PM/AA] Wire BasicAA's new pass manager class up to the pass registry.Chandler Carruth2016-02-132-0/+2
| | | | | | | | This ensures that all of the various pieces are working. The next patch will wire up commandline-driven alias analysis chain building and allow BasicAA to work with the AAManager. llvm-svn: 260838
* [PM/AA] Actually wire the AAManager I built for the new pass managerChandler Carruth2016-02-133-0/+5
| | | | | | | | | | | | into the new pass manager and fix the latent bugs there. This lets everything live together nicely, but it isn't really useful yet. I never finished wiring the AA layer up for the new pass manager, and so subsequent patches will change this to do that wiring and get AA stuff more fully integrated into the new pass manager. Turns out this is necessary even to get functionattrs ported over. =] llvm-svn: 260836
* Support: Fix incremental build when re-configuring targetsDuncan P. N. Exon Smith2016-02-132-1/+2
| | | | | | | | | | | | | | r180893 added an indirect include of llvm/Config/Targets.def to llvm/Support/CodeGen.h, which in turn is included by things like llvm/IR/Module.h. After a full build of LLVM and Clang, ninja had to rebuild 1274 files after reconfiguring. This commit strips CodeGen.h back down to just a pile of enums and moves the expensive includes over to CodeGenCWrappers.h (which is only included in two places). This gets ninja down to 88 files if you reconfigure with, e.g., -DLLVM_TARGETS_TO_BUILD=X86. llvm-svn: 260835
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