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* Add a new pass FunctionTargetTransformInfo. This pass serves as aEric Christopher2014-09-186-18/+76
| | | | | | | | | | | shim between the TargetTransformInfo immutable pass and the Subtarget via the TargetMachine and Function. Migrate a single call from BasicTargetTransformInfo as an example and provide shims where TargetMachine begins taking a Function to determine the subtarget. No functional change. llvm-svn: 218004
* Fix FastISel bug in boolean returns for PowerPC.Samuel Antao2014-09-171-7/+18
| | | | | | For PPC targets, FastISel does not take the sign extension information into account when selecting return instructions whose operands are constants. A consequence of this is that the return of boolean values is not correct. This patch fixes the problem by evaluating the sign extension information also for constants, forwarding this information to PPCMaterializeInt which takes this information to drive the sign extension during the materialization. llvm-svn: 217993
* Remove unnecessary blank space (test commit)Samuel Antao2014-09-171-1/+1
| | | | llvm-svn: 217991
* Reapply fix in r217988 (reverted in r217989) and remove the alternative fix ↵David Blaikie2014-09-171-1/+1
| | | | | | | | | | committed in r217987. This type isn't owned polymorphically (as demonstrated by making the dtor protected and everything still compiling) so just address the warning by protecting the base dtor and making the derived class final. llvm-svn: 217990
* Revert "Fix -Wnon-virtual-dtor warning introduced in r217982."David Blaikie2014-09-171-1/+1
| | | | | | | | An alternative fix was already committed. This reverts commit r217988. llvm-svn: 217989
* Fix -Wnon-virtual-dtor warning introduced in r217982.David Blaikie2014-09-171-1/+1
| | | | llvm-svn: 217988
* [FastISel][AArch64] Custom lower sdiv by power-of-2.Juergen Ributzka2014-09-171-0/+72
| | | | | | | | | Emit an optimized instruction sequence for sdiv by power-of-2 depending on the exact flag. This fixes rdar://problem/18224511. llvm-svn: 217986
* Fixing a build error.Chris Bieneman2014-09-171-1/+1
| | | | llvm-svn: 217983
* Refactoring SimplifyLibCalls to remove static initializers and generally ↵Chris Bieneman2014-09-172-1883/+1649
| | | | | | | | | | | | | | | | cleaning up the code. Summary: This eliminates ~200 lines of code mostly file scoped struct definitions that were unnecessary. Reviewers: chandlerc, resistor Reviewed By: resistor Subscribers: morisset, resistor, llvm-commits Differential Revision: http://reviews.llvm.org/D5364 llvm-svn: 217982
* [FastISel][AArch64] Simplify mul to shift when possible.Juergen Ributzka2014-09-171-12/+48
| | | | | | This is related to rdar://problem/18369687. llvm-svn: 217980
* [FastISel][AArch64] Fold mul into add/sub and logical operations.Juergen Ributzka2014-09-171-19/+69
| | | | | | | | | Try to fold the multiply into the add/sub or logical operations (when possible). This is related to rdar://problem/18369687. llvm-svn: 217978
* [FastISel][AArch64] Fold mul into the address computation of memory operations.Juergen Ributzka2014-09-171-0/+70
| | | | | | | | | Teach 'computeAddress' to also fold multiplies into the address computation (when possible). This fixes rdar://problem/18369443. llvm-svn: 217977
* Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"Robin Morisset2014-09-172-27/+4
| | | | | | | | | | | It is breaking the build on the buildbots but works fine on my machine, I revert while trying to understand what happens (it appears to depend on the compiler used to build, I probably used a C++11 feature that is not perfectly supported by some of the buildbots). This reverts commit feb3176c4d006f99af8b40373abd56215a90e7cc. llvm-svn: 217973
* [FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.Juergen Ributzka2014-09-171-0/+64
| | | | | | | | | This takes advanatage of the CBZ and CBNZ instruction to further optimize the common null check pattern into a single instruction. This is related to rdar://problem/18358882. llvm-svn: 217972
* Another required re-setting for MCStreamer::reset().Yaron Keren2014-09-171-0/+1
| | | | llvm-svn: 217970
* R600/SI: Remove assertMatt Arsenault2014-09-171-6/+7
| | | | | | | | | | Since read2 / write2 are emitted for 4-byte aligned 8-byte accesses, these are seen by the scheduler. The DAG scheduler is semi-deprecated, so just ignore these for now. llvm-svn: 217969
* R600/SI: Rough first implementation of shouldClusterLoadsMatt Arsenault2014-09-172-0/+26
| | | | llvm-svn: 217968
* Fix float division-by-zero in R600 scheduler.Alexey Samsonov2014-09-171-14/+18
| | | | | | This bug was reported by UBSan. llvm-svn: 217967
* [FastISel][AArch64] Improve branch selection to support all FP conditions.Juergen Ributzka2014-09-171-10/+48
| | | | | | | | | | | | This adds the last two missing floating-point condition codes (FCMP_UEQ and FCMP_ONE) also to the branch selection. In these two cases an additonal branch instruction is required. This also adds unit tests to checks all the different condition codes. This is related o rdar://problem/18358882. llvm-svn: 217966
* [ARM, Fix] Fix emitLeading/TrailingFence on old ARM processorsRobin Morisset2014-09-172-4/+27
| | | | | | | | | | | | | | | | | | | | | Summary: I had only tested this code for ARMv7 and ARMv8. This patch adds several fallback paths if the processor does not support dmb ish: - dmb sy if a cortex-M with support for dmb - mcr p15, #0, r0, c7, c10, #5 for ARMv6 (special instruction equivalent to a DMB) These fallback paths were chosen based on the code for fence seq_cst. Thanks to luqmana for having noticed this bug. Test Plan: Added more cases to atomic-load-store.ll + make check-all Reviewers: jfb, t.p.northover, luqmana Subscribers: aemerson, llvm-commits Differential Revision: http://reviews.llvm.org/D5304 llvm-svn: 217965
* R600/SI: Change formatting of printed FP immediatesMatt Arsenault2014-09-171-13/+26
| | | | | | | | | | Only 1 decimal place should be printed for inline immediates. Other constants should be hex constants. Does not include f64 tests because folding those inline immediates currently does not work. llvm-svn: 217964
* [IndVarSimplify] Partially revert r217953 to see if this fixes the bots.Chad Rosier2014-09-171-1/+4
| | | | | | Specifically, disable widening of unsigned compare instructions. llvm-svn: 217962
* LineIterator: Provide a variant that keeps blank linesJustin Bogner2014-09-172-7/+18
| | | | | | | | It isn't always useful to skip blank lines, as evidenced by the somewhat awkward use of line_iterator in llvm-cov. This adds a knob to control whether or not to skip blanks. llvm-svn: 217960
* R600/SI: Remove promotion of instructions to e64 forms.Matt Arsenault2014-09-172-58/+6
| | | | | | | | Instructions are now generally selected to the e64 forms originally, and shrunk down later. Rename foldOperands to legalizeOperands, since that's really most of what it tries to do. llvm-svn: 217959
* [IndVarSimplify] Widen loop compare instructions.Chad Rosier2014-09-171-3/+36
| | | | | | | This improves other optimizations such as LSR. A sext may be added to the compare's other operand, but this can often be hoisted outside of the loop. llvm-svn: 217953
* [InstCombine] Fix wrong folding of constant comparison involving ahsr and ↵Andrea Di Biagio2014-09-171-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | negative quantities (PR20945). Example: define i1 @foo(i32 %a) { %shr = ashr i32 -9, %a %cmp = icmp ne i32 %shr, -5 ret i1 %cmp } Before this fix, the instruction combiner wrongly thought that %shr could have never been equal to -5. Therefore, %cmp was always folded to 'true'. However, when %a is equal to 1, then %cmp evaluates to 'false'. Therefore, in this example, it is not valid to fold %cmp to 'true'. The problem was only affecting the case where the comparison was between negative quantities where one of the quantities was obtained from arithmetic shift of a negative constant. This patch fixes the problem with the wrong folding (fixes PR20945). With this patch, the 'icmp' from the example is now simplified to a comparison between %a and 1. This still allows us to get rid of the arithmetic shift (%shr). llvm-svn: 217950
* Add DIBuilder functions to build RAUWable DIVariables and DIFunctions.Frederic Riss2014-09-171-26/+92
| | | | | | | | | | | | Summary: These will be used to implement support for useful forward declarartions. Reviewers: echristo, dblaikie, aprantl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5328 llvm-svn: 217949
* Add and update reset() and doInitialization() methods to MC* and passes.Yaron Keren2014-09-175-0/+21
| | | | | | This enables reusing a PassManager instead of re-constructing it every time. llvm-svn: 217948
* [mips] Add assembler support for the .set nodsp directive.Toma Tabacu2014-09-173-0/+25
| | | | | | | | | | | | Summary: This directive is used to tell the assembler to reject DSP-specific instructions. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5142 llvm-svn: 217946
* [x32] Fix function indirect callsPavel Chupin2014-09-171-0/+3
| | | | | | | | | | | | | | Summary: Zero-extend register to 64-bit for callq/jmpq. Test Plan: 3 tests added Reviewers: nadav, dschuff Subscribers: llvm-commits, zinovy.nis Differential Revision: http://reviews.llvm.org/D5355 llvm-svn: 217942
* InstSimplify: Don't allow (x srem y) urem y -> x srem yDavid Majnemer2014-09-171-3/+5
| | | | | | | | | | | Let's consider the case where: %x i16 = 32768 %y i16 = 384 %x srem %y = 65408 (%x srem %y) urem %y = 128 llvm-svn: 217939
* InstSimplify: ((X % Y) % Y) -> (X % Y)David Majnemer2014-09-171-0/+5
| | | | | | | | Patch by Sonam Kumari! Differential Revision: http://reviews.llvm.org/D5350 llvm-svn: 217937
* [Object] keep trailing '\0' out of StringRef when parsing mach-o bindingsNick Kledzik2014-09-171-1/+1
| | | | llvm-svn: 217935
* | -> ||Richard Trieu2014-09-171-1/+1
| | | | | | No functional change. llvm-svn: 217934
* Fix identify_magic() with mach-o stub dylibs.Nick Kledzik2014-09-171-1/+1
| | | | | | The wrong value was returned and the unittest did not cover the stub dylib case. llvm-svn: 217933
* [llvm-objdump] properly use c_str() with format("%s"). Improve ↵Nick Kledzik2014-09-171-10/+5
| | | | | | getLibraryShortNameByIndex() error handling. llvm-svn: 217930
* [X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPassRobin Morisset2014-09-1711-342/+211
| | | | | | | | | | | | This required a new hook called hasLoadLinkedStoreConditional to know whether to expand atomics to LL/SC (ARM, AArch64, in a future patch Power) or to CmpXchg (X86). Apart from that, the new code in AtomicExpandPass is mostly moved from X86AtomicExpandPass. The main result of this patch is to get rid of that pass, which had lots of code duplicated with AtomicExpandPass. llvm-svn: 217928
* [CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expectingQuentin Colombet2014-09-161-45/+55
| | | | | | instructions when truncate, sext, or zext were created. Fix that. llvm-svn: 217926
* This add a reset method for WinCOFFObjectWriter, like other MC* classes.Yaron Keren2014-09-161-0/+16
| | | | llvm-svn: 217907
* Add back a fallback case for targets that do not or cannot implement ↵Owen Anderson2014-09-161-1/+5
| | | | | | getNoopForMachoTarget(). llvm-svn: 217899
* Fix typoMatt Arsenault2014-09-161-1/+1
| | | | llvm-svn: 217892
* Add a missing return to operator=Reid Kleckner2014-09-161-0/+1
| | | | llvm-svn: 217889
* Fix move-only type issues in Interpreter with MSVCReid Kleckner2014-09-161-12/+24
| | | | | | | | | MSVC 2012 cannot infer any move special members, but it will call them if available. MSVC 2013 cannot infer move assignment. Therefore, explicitly implement the special members for the ExecutionContext class and its contained types. llvm-svn: 217887
* [TableGen] Fully resolve class-instance values before defs in multiclassesAdam Nemet2014-09-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By class-instance values I mean 'Class<Arg>' in 'Class<Arg>.Field' or in 'Other<Class<Arg>>' (syntactically s SimpleValue). This is to differentiate from unnamed/anonymous record definitions (syntactically an ObjectBody) which are not affected by this change. Consider the testcase: class Struct<int i> { int I = !shl(i, 1); int J = !shl(I, 1); } class Class<Struct s> { int Class_J = s.J; } multiclass MultiClass<int i> { def Def : Class<Struct<i>>; } defm Defm : MultiClass<2>; Before this fix, DefmDef.Class_J yields !shl(I, 1) instead of 8. This is the sequence of events. We start with this: multiclass MultiClass<int i> { def Def : Class<Struct<i>>; } During ParseDef the anonymous object for the class-instance value is created: multiclass Multiclass<int i> { def anonymous_0 : Struct<i>; def Def : Class<NAME#anonymous_0>; } Then class Struct<i> is added to anonymous_0. Also Class<NAME#anonymous_0> is added to Def: multiclass Multiclass<int i> { def anonymous_0 { int I = !shl(i, 1); int J = !shl(I, 1); } def Def { int Class_J = NAME#anonymous_0.J; } } So far so good but then we move on to instantiating this in the defm by substituting the template arg 'i'. This is how the anonymous prototype looks after fully instantiating. defm Defm = { def Defmanonymous_0 { int I = 4; int J = !shl(I, 1); } Note that we only resolved the reference to the template arg. The non-template-arg reference in 'J' has not been resolved yet. Then we go on to instantiating the Def prototype: def DefmDef { int Class_J = NAME#anonymous_0.J; } Which is resolved to Defmanonymous_0.J and then to !shl(I, 1). When we fully resolve each record in a defm, Defmanonymous_0.J does get set to 8 but that's too late for its use. The patch adds a new attribute to the Record class that indicates that this def is actually a class-instance value that may be *used* by other defs in a multiclass. (This is unlike regular defs which don't reference each other and thus can be resolved indepedently.) They are then fully resolved before the other defs while the multiclass is instantiated. I added vg_leak to the new test. I am not sure if this is necessary but I don't think I have a way to test it. I can also check in without the XFAIL and let the bots test this part. Also tested that X86.td.expanded and AAarch64.td.expanded were unchange before and after this change. (This issue triggering this problem is a WIP patch.) Part of <rdar://problem/17688758> llvm-svn: 217886
* [X86] Improve commentAdam Nemet2014-09-161-3/+4
| | | | llvm-svn: 217885
* ARM load/store optimizer: Don't materialize a new base register withMoritz Roth2014-09-161-4/+15
| | | | | | | | | | | | | | | | | ADDS/SUBS unless it's safe to clobber the condition flags. If the merged instructions are in a range where the CPSR is live, e.g. between a CMP -> Bcc, we can't safely materialize a new base register. This problem is quite rare, I couldn't come up with a test case and I've never actually seen this happen in the tests I'm running - there is a potential trigger for this in LNT/oggenc (spills being inserted between a CMP/Bcc), but at the moment this isn't being merged. I'll try to reduce that into a small test case once I've committed my upcoming patch to make merging less conservative. llvm-svn: 217881
* Spell out a move ctor. Even the 2013 vintage of MSVC cannot synthesize move ↵Benjamin Kramer2014-09-161-1/+1
| | | | | | ctors. llvm-svn: 217879
* Interpreter: Hack around a series of bugs in MSVC 2012 that copies around thisBenjamin Kramer2014-09-161-3/+9
| | | | | | | | move-only struct. I feel terrible now, but at least it's shielded away from proper compilers. llvm-svn: 217875
* [mips] Improve the error messages given by MipsAsmParser.Toma Tabacu2014-09-161-39/+42
| | | | | | | | | | | | Summary: Changed error messages to be more informative and to resemble other clang/llvm error messages (first letter is lower case, no ending punctuation) and updated corresponding tests. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5065 llvm-svn: 217873
* Make DWARFUnitSection final and change base class to non-virtual protected ↵Frederic Riss2014-09-161-3/+4
| | | | | | | | destructor. As per dblaikie suggestion. llvm-svn: 217871
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