summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* change machinelicm to use MachineInstr::isSafeToMove. NoChris Lattner2010-07-121-18/+8
| | | | | | | | intended functionality change. The avoidance of hoistiing implicitdef seems wrong though. llvm-svn: 108109
* first part of JIT support for address of labels, part of PR7264,Chris Lattner2010-07-113-13/+81
| | | | | | patch by Yuri! llvm-svn: 108107
* introduce WinCOFFObjectWriter, patch by Michael Spencer!Chris Lattner2010-07-112-0/+72
| | | | llvm-svn: 108103
* introduce WinCOFFStreamer.cpp, patch by Michael Spencer!Chris Lattner2010-07-112-0/+199
| | | | llvm-svn: 108102
* If it's safe to speculatively execute load(alloca) the it's safe to executeNick Lewycky2010-07-111-3/+11
| | | | | | | load(gep(alloca)) where the gep is all-zeros. There's more we could do here but this is a common case. llvm-svn: 108101
* fix typoChris Lattner2010-07-111-1/+1
| | | | llvm-svn: 108100
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-1116-812/+0
| | | | | | | | The only folding these load/store architectures can do is converting COPY into a load or store, and the target independent part of foldMemoryOperand already knows how to do that. llvm-svn: 108099
* Use target independent COPY instructions for the fake fextend and froundJakob Stoklund Olesen2010-07-111-6/+6
| | | | | | operations in x87 code. llvm-svn: 108098
* Remove redundant branch. Thanks, Anton!Jakob Stoklund Olesen2010-07-111-2/+0
| | | | llvm-svn: 108097
* Remove obsolete README_SSE note.Jakob Stoklund Olesen2010-07-111-10/+0
| | | | | | | | | | | | | | | We are generating movaps for all XMM register copies, including scalar floating point values. This is known to be at least as good as movss and movsd for all known architectures up to and including Nehalem because it avoids a partial register stall. The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when operands come from the integer unit). We don't now that switching movaps to movapd has any benefit. The same applies to andps -> pand. llvm-svn: 108096
* Remove TargetInstrInfo::copyRegToReg entirely.Jakob Stoklund Olesen2010-07-111-17/+0
| | | | | | | Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no longer a default implementation forwarding to copyRegToReg. llvm-svn: 108095
* Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.Rafael Espindola2010-07-114-40/+0
| | | | llvm-svn: 108094
* Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.Rafael Espindola2010-07-111-2/+2
| | | | | | | | | | | | The first one was used just to call isSafeToMoveRegClassDefs. In general, using a more specific reg class is better, in practice only x86 implements that method and the results are always the same. The second one is in FindFreeRegister and is used to check if a register is in a register class, a much more direct call to contains is better as it should cover more cases and is faster. llvm-svn: 108093
* Replace copyRegToReg with copyPhysReg for SystemZ.Jakob Stoklund Olesen2010-07-112-58/+28
| | | | llvm-svn: 108092
* Avoid SSE instructions in FastIsel when it is not available.Jakob Stoklund Olesen2010-07-111-4/+4
| | | | llvm-svn: 108091
* Remove two other uses of ATTRIBUTE_UNUSED for variables only used withinChandler Carruth2010-07-112-5/+4
| | | | | | | | assert()s, switching to void-casts. Removed an unneeded Compiler.h include as a result. There are two other uses in LLVM, but they're not due to assert()s, so I've left them alone. llvm-svn: 108088
* Replace copyRegToReg with copyPhysReg for XCore.Jakob Stoklund Olesen2010-07-112-32/+24
| | | | llvm-svn: 108087
* Replace copyRegToReg with copyPhysReg for Sparc.Jakob Stoklund Olesen2010-07-112-28/+18
| | | | llvm-svn: 108086
* Replace copyRegToReg with copyPhysReg for CellSPU.Jakob Stoklund Olesen2010-07-112-34/+10
| | | | llvm-svn: 108084
* Replace copyRegToReg with copyPhysReg for PowerPC.Jakob Stoklund Olesen2010-07-112-36/+30
| | | | llvm-svn: 108083
* Fix PIC16 comments referencing copyRegToReg.Jakob Stoklund Olesen2010-07-111-3/+3
| | | | llvm-svn: 108082
* Replace copyRegToReg with copyPhysReg for PIC16.Jakob Stoklund Olesen2010-07-112-24/+17
| | | | llvm-svn: 108081
* Replace copyRegToReg with copyPhysReg for MSP430.Jakob Stoklund Olesen2010-07-112-25/+17
| | | | llvm-svn: 108080
* Replace copyRegToReg with copyPhysReg for MBlaze.Jakob Stoklund Olesen2010-07-112-14/+10
| | | | llvm-svn: 108079
* Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen2010-07-116-146/+84
| | | | llvm-svn: 108078
* Replace copyRegToReg with copyPhysReg for Blackfin.Jakob Stoklund Olesen2010-07-112-55/+57
| | | | llvm-svn: 108077
* X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!Jakob Stoklund Olesen2010-07-112-171/+0
| | | | llvm-svn: 108076
* Use COPY in X86FastISel::X86SelectRet.Jakob Stoklund Olesen2010-07-111-6/+4
| | | | | | | Don't try a cross-class copy. That is very unlikely anywy since return value registers are usually register class friendly. (%EAX, %XMM0, etc). llvm-svn: 108074
* Use COPY for fast-isel bitconvert, but don't create cross-class copies.Jakob Stoklund Olesen2010-07-111-7/+6
| | | | | | This doesn't change the behavior of SelectBitcast for X86. llvm-svn: 108073
* Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola2010-07-117-9/+16
| | | | | | | | | | | | | | | correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. llvm-svn: 108072
* Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.Jakob Stoklund Olesen2010-07-111-30/+12
| | | | | | | This assumes that the registers can be copied which is probably a safe assumption. llvm-svn: 108070
* Use COPY in FastISel everywhere it is safe and trivial.Jakob Stoklund Olesen2010-07-112-26/+12
| | | | | | | The remaining copyRegToReg calls actually check the return value (shock!), so we cannot trivially replace them with COPY instructions. llvm-svn: 108069
* Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen2010-07-112-56/+68
| | | | llvm-svn: 108066
* Replace copyRegToReg with copyPhysReg for Alpha.Jakob Stoklund Olesen2010-07-112-28/+15
| | | | llvm-svn: 108065
* Use COPY in targetsJakob Stoklund Olesen2010-07-103-22/+8
| | | | llvm-svn: 108063
* Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.Jakob Stoklund Olesen2010-07-107-98/+62
| | | | llvm-svn: 108062
* Only collect subreg extracting copies for later coalescing.Jakob Stoklund Olesen2010-07-101-1/+1
| | | | | | This also avoids fatal copies from physregs. llvm-svn: 108061
* Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;Dan Gohman2010-07-101-1/+3
| | | | | | | | if a block is split (by a custom inserter), the insert point may be in a different block than it was originally. This fixes 32-bit llvm-gcc bootstrap builds, and I haven't been able to reproduce it otherwise. llvm-svn: 108060
* The accumulator tail recursion transform claims to work for any associativeDuncan Sands2010-07-101-14/+14
| | | | | | | | | | | | | | | | operation, but the way it's implemented requires the operation to also be commutative. So add a check for commutativity (and tweak the corresponding comments). This makes no difference in practice since every associative LLVM instruction is also commutative! Here's an example to show the need for commutativity: the accum_recursion.ll testcase calculates the factorial function. Before the transformation the result of a call is ((((1*1)*2)*3)...)*x while afterwards it is (((1*x)*(x-1))...*2)*1 which clearly requires both associativity and commutativity of * to be equal to the original. llvm-svn: 108056
* Emit COPY instructions instead of using copyRegToReg in InstrEmitter,Jakob Stoklund Olesen2010-07-104-53/+21
| | | | | | | | | ScheduleDAGEmit, TwoAddressLowering, and PHIElimination. This switches the bulk of register copies to using COPY, but many less used copyRegToReg calls remain. llvm-svn: 108050
* Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.Jakob Stoklund Olesen2010-07-102-83/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch by Rafael Espíndola. Attempt to make the FpSET_ST1 hack more robust, but we are still relying on FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline asm. We support: FpSET_ST0 INLINEASM FpSET_ST0 FpSET_ST1 INLINEASM with and without kills on the arguments. We don't support: FpSET_ST1 FpSET_ST0 INLINEASM nor FpSET_ST1 INLINEASM Just Don't Do It! llvm-svn: 108047
* Insert IMPLICIT_DEF instructions at the current insert position, notDan Gohman2010-07-101-1/+1
| | | | | | at the end of the block. llvm-svn: 108045
* Add parentheses yet again to satisfy GCC's warnings.Chandler Carruth2010-07-101-3/+3
| | | | llvm-svn: 108043
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-1017-357/+684
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* An x86 function returns a floating point value in st(0), and we must make sureJakob Stoklund Olesen2010-07-101-18/+26
| | | | | | | | | it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent the required sideeffect, so insert an FpGET_ST0 instruction directly instead. This will matter when CopyFromReg gets lowered to a generic COPY instruction. llvm-svn: 108037
* Update DBG_VALUE to refer appropriate stack slot in case of a spill.Devang Patel2010-07-091-2/+19
| | | | llvm-svn: 108023
* Declare YMM subregisters in the right way! Thanks JakobBruno Cardoso Lopes2010-07-091-2/+1
| | | | llvm-svn: 108022
* Add AVX 256-bit packed MOVNT variantsBruno Cardoso Lopes2010-07-091-0/+22
| | | | llvm-svn: 108021
* Remember the *_TC opcodes for load/storeJakob Stoklund Olesen2010-07-091-0/+4
| | | | llvm-svn: 108020
* Add AVX 256-bit unpack and interleaveBruno Cardoso Lopes2010-07-091-0/+17
| | | | llvm-svn: 108017
OpenPOWER on IntegriCloud