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* [ThinLTO] Refactor function body scan during importing into helper (NFC)Teresa Johnson2015-11-241-36/+27
| | | | llvm-svn: 254020
* [RuntimeDyld] Fix a class of arithmetic errors introduced in r253918Sanjoy Das2015-11-241-4/+4
| | | | | | | | | | | r253918 had refactored expressions like "A - B.Address + C" to "A - B.getAddressWithOffset(C)". This is incorrect, since the latter really computes "A - B.Address - C". None of the tests I can run locally on x86 broke due to this bug, but it is the current suspect for breakage on the AArch64 buildbots. llvm-svn: 254017
* [X86][FMA] Optimize FNEG(FMA) PatternsSimon Pilgrim2015-11-241-0/+29
| | | | | | | | | | X86 needs to use its own FMA opcodes, preventing the standard FNEG(FMA) pattern table recognition method used by other platforms. This patch adds support for lowering FNEG(FMA(X,Y,Z)) into a single suitably negated FMA instruction. Fix for PR24364 Differential Revision: http://reviews.llvm.org/D14906 llvm-svn: 254016
* LiveVariables should not clobber MachineOperand::IsDead, ::IsKill on ↵Matthias Braun2015-11-241-2/+6
| | | | | | | | | | reserved physical registers Patch by Nick Johnson <Nicholas.Paul.Johnson@deshawresearch.com> Differential Revision: http://reviews.llvm.org/D14875 llvm-svn: 254012
* [ThinLTO] Enable iterative importing in FunctionImport passTeresa Johnson2015-11-241-2/+36
| | | | | | | | | | | Analyze imported function bodies and add any new external calls to the worklist for importing. Currently no controls on the importing so this will end up importing everything possible in the call tree below the importing module. Basic profitability checks coming next. Update test to check for iteratively inlined functions. llvm-svn: 254011
* [X86] Fix several issues related to X86's psadbw instruction.Cong Hou2015-11-245-33/+35
| | | | | | | | | | | | | | | | This patch fixes the following issues: 1. Fix the return type of X86psadbw: it should not be the same type of inputs. For vNi8 inputs the output should be vMi64, where M = N/8. 2. Fix the return type of int_x86_avx512_psad_bw_512 accordingly. 3. Fix the definiton of PSADBW, VPSADBW, and VPSADBWY accordingly. 4. Adjust the return type when building a DAG node of X86ISD::PSADBW type. 5. Update related tests. Differential revision: http://reviews.llvm.org/D14897 llvm-svn: 254010
* [ThinLTO] Handle previously imported and promoted locals in module linkerTeresa Johnson2015-11-241-2/+2
| | | | | | | | | | | The new function import pass exposed an issue when we import references to local values on multiple importing passes. They are renamed on each import pass, and we need to ensure that the already promoted and renamed references existing in the dest module are correctly identified and updated so that they aren't spuriously renamed again (due to a perceived conflict with the newly linked reference). llvm-svn: 254009
* [Utils] Put includes in correct order. NFC.Weiming Zhao2015-11-248-10/+8
| | | | | | | | | | | | | | | | | | | Summary: Followed the guidelines in: http://llvm.org/docs/CodingStandards.html#include-style However, I noticed that uppercase named headers come before lowercase ones throughout the codebase. So kept them as is. Patch by Mandeep Singh Grang <mgrang@codeaurora.org> Reviewers: majnemer, davide, jmolloy, atrick Subscribers: sanjoy Differential Revision: http://reviews.llvm.org/D14939 llvm-svn: 254005
* [PGO] Small interface change to be profile rt ready Xinliang David Li2015-11-241-17/+3
| | | | | | | | Convert two C++ static member functions to be C APIs. This is one of the many steps to get ready to share VP writer code with profiler runtime. llvm-svn: 253999
* [InstCombine] fix propagation of fast-math-flagsSanjay Patel2015-11-241-10/+5
| | | | | | | Noticed while working on D4583: http://reviews.llvm.org/D4583 llvm-svn: 253997
* use convenience function for copying IR flags; NFCISanjay Patel2015-11-241-12/+2
| | | | llvm-svn: 253996
* Minor refactor to make VP writing more efficientXinliang David Li2015-11-241-3/+1
| | | | llvm-svn: 253994
* Add vector types for intrinsicsKrzysztof Parzyszek2015-11-241-1/+11
| | | | | Author: Ron Lieberman <ronl@codeaurora.org> llvm-svn: 253992
* [ThinLTO] Fix FunctionImport alias checking and testTeresa Johnson2015-11-241-4/+5
| | | | | | | Skip imports for weak_any aliases as well. Fix the test to check non-import of weak aliases and functions, and import of normal alias. llvm-svn: 253991
* [x86] remove duplicate movq instruction defs (PR25554)Sanjay Patel2015-11-242-27/+13
| | | | | | | | | | | | | | | | | | | | | | | | | We had duplicated definitions for the same hardware '[v]movq' instructions. For example with SSE: def MOVZQI2PQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", // X86-64 only [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 (scalar_to_vector GR64:$src)))))], IIC_SSE_MOVDQ>; def MOV64toPQIrr : RS2I<0x6E, MRMSrcReg, (outs VR128:$dst), (ins GR64:$src), "mov{d|q}\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (scalar_to_vector GR64:$src)))], IIC_SSE_MOVDQ>, Sched<[WriteMove]>; As shown in the test case and PR25554: https://llvm.org/bugs/show_bug.cgi?id=25554 This causes us to miss reusing an operand because later passes don't know these 'movq' are the same instruction. This patch deletes one pair of these defs. Sadly, this won't fix the original test case in the bug report. Something else is still broken. Differential Revision: http://reviews.llvm.org/D14941 llvm-svn: 253988
* [Hexagon] Add missing include of <cctype>Krzysztof Parzyszek2015-11-241-0/+1
| | | | | | | Lack thereof breaks Windows builds due to the use of std::isspace in HexagonInstrInfo.cpp. llvm-svn: 253987
* [Hexagon] Bring HexagonInstrInfo up to dateKrzysztof Parzyszek2015-11-249-1173/+3004
| | | | llvm-svn: 253986
* Add new vector types for 512-, 1024- and 2048-bit vectorsKrzysztof Parzyszek2015-11-241-0/+22
| | | | | | | | Those types are needed to implement instructions for Hexagon Vector Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16, 64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1. llvm-svn: 253978
* AMDGPU: Split LDS vector loadsMatt Arsenault2015-11-242-2/+3
| | | | | | If properly aligned this could allow using ds_read_b64. llvm-svn: 253975
* AMDGPU: Split x8 and x16 vector loads instead of scalarizeMatt Arsenault2015-11-242-1/+15
| | | | | | | | The one regression in the builtin tests is in the read2 test which now (again) has many extra copies, but this should be solved once the pass is replaced with a DAG combine. llvm-svn: 253974
* Fix build after r253954Ismail Donmez2015-11-241-1/+1
| | | | llvm-svn: 253969
* Let SelectionDAG start to use probability-based interface to add successors.Cong Hou2015-11-249-233/+265
| | | | | | | | | | | | | | | | | | | | | | | | The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes. 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights. 3. Use new interfaces in all other passes. 4. Remove old interfaces. This the second patch above. In this patch SelectionDAG starts to use probability-based interfaces in MBB to add successors but other MC passes are still using weight-based interfaces. Therefore, we need to maintain correct weight list in MBB even when probability-based interfaces are used. This is done by updating weight list in probability-based interfaces by treating the numerator of probabilities as weights. This change affects many test cases that check successor weight values. I will update those test cases once this patch looks good to you. Differential revision: http://reviews.llvm.org/D14361 llvm-svn: 253965
* Add a FunctionImporter helper to perform summary-based cross-module function ↵Mehdi Amini2015-11-244-1/+242
| | | | | | | | | | | | | | | | | importing Summary: This is a helper to perform cross-module import for ThinLTO. Right now it is importing naively every possible called functions. Reviewers: tejohnson Subscribers: dexonsmith, llvm-commits Differential Revision: http://reviews.llvm.org/D14914 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 253954
* [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.Cong Hou2015-11-243-4/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch detects the AVG pattern in vectorized code, which is simply c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to i32 before any arithmetic operations. The following IR shows such an example: %1 = zext <N x i8> %a to <N x i32> %2 = zext <N x i8> %b to <N x i32> %3 = add nuw nsw <N x i32> %1, <i32 1 x N> %4 = add nuw nsw <N x i32> %3, %2 %5 = lshr <N x i32> %N, <i32 1 x N> %6 = trunc <N x i32> %5 to <N x i8> and with this patch it will be converted to a X86ISD::AVG instruction. The pattern recognition is done when combining instructions just before type legalization during instruction selection. We do it here because after type legalization, it is much more difficult to do pattern recognition based on many instructions that are doing type conversions. Therefore, for target-specific instructions (like X86ISD::AVG), we need to take care of type legalization by ourselves. However, as X86ISD::AVG behaves similarly to ISD::ADD, I am wondering if there is a way to legalize operands and result types of X86ISD::AVG together with ISD::ADD. It seems that the current design doesn't support this idea. Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of variant vector sizes. Differential revision: http://reviews.llvm.org/D14761 llvm-svn: 253952
* [DIE] Make DIE.h NDEBUG conditional-free.Davide Italiano2015-11-241-26/+18
| | | | | | Switch dump()/print() method definitions to LLVM_DUMP_METHOD instead. llvm-svn: 253945
* [RuntimeDyld] Avoid unused-private-field warning; NFCSanjoy Das2015-11-231-1/+5
| | | | | | Fixes the no asserts -Werror,-Wunused-private-field build. llvm-svn: 253933
* [WebAssembly] Don't print the types of memory_size and grow_memoryDan Gohman2015-11-231-4/+4
| | | | | | This matches the current spec, for now. llvm-svn: 253931
* [PGO] In llvm-profdata text dump, add comment lines as annotationsXinliang David Li2015-11-231-1/+4
| | | | llvm-svn: 253930
* Revert r253923.Krzysztof Parzyszek2015-11-231-22/+0
| | | | | | Per Eric's request. llvm-svn: 253928
* findDeadCallerSavedReg needs to pay attention to calling conventionAndy Ayers2015-11-234-24/+26
| | | | | | | | | | Caller saved regs differ between SysV and Win64. Use the tail call available set to scavenge from. Refactor register info to create new helper to get at tail call GPRs. Added a new test case for windows. Fixed up a number of X64 tests since now RCX is preferred over RDX on SysV. Differential Revision: http://reviews.llvm.org/D14878 llvm-svn: 253927
* [WebAssembly] Don't special-case call operand order.Dan Gohman2015-11-231-2/+2
| | | | | | | | With the '=' suffix now indicating which operands are output operands, it's no longer as important to distinguish between a call's inputs and its outputs using operand ordering, so we can go back to printing them in the normal order. llvm-svn: 253925
* Add new vector types for 512-, 1024- and 2048-bit vectorsKrzysztof Parzyszek2015-11-231-0/+22
| | | | | | | | Those types are needed to implement instructions for Hexagon Vector Extensions (HVX): 16x32, 16x64, 32x16, 32x32, 32x64, 64x8, 64x16, 64x32, 128x8, 128x16, 256x8, 512x1, and 1024x1. llvm-svn: 253923
* [WebAssembly] Suffix output operands with '='.Dan Gohman2015-11-231-0/+3
| | | | | | | | This distinguishes input operands from output operands. This is something of a syntactic experiment to see whether the mild amount of clutter this adds is outweighed by the extra information it conveys to the reader. llvm-svn: 253922
* [RuntimeDyld] Don't allocate unnecessary stub buffer spaceSanjoy Das2015-11-234-4/+29
| | | | | | | | | | | | | | Summary: For relocation types that are known to not require stub functions, there is no need to allocate extra space for the stub functions. Reviewers: lhames, reames, maksfb Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14676 llvm-svn: 253920
* [RuntimeDyld] Add bounds checking to SectionEntry::advanceStubOffsetSanjoy Das2015-11-233-7/+19
| | | | | | | | | | | | | | Summary: Change SectionEntry to keep track of the size of its underlying allocation, and use that to bounds check advanceStubOffset. Reviewers: lhames, andrew.w.kaylor, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14675 llvm-svn: 253919
* [RuntimeDyld] Add accessors to `SectionEntry`; NFCSanjoy Das2015-11-2312-223/+266
| | | | | | | | | | | | | | | | Summary: Remove naked access to the data members in `SectionEntry` and route accesses through accessor functions. This makes it obvious how the instances of the class are used, and will also facilitate adding bounds checking to `advanceStubOffset` in a later change. Reviewers: lhames, loladiro, andrew.w.kaylor Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14674 llvm-svn: 253918
* [WebAssembly] Model the return value of store instructions in wasm.Dan Gohman2015-11-232-27/+41
| | | | llvm-svn: 253916
* [LIR] Put includes in correct order. NFC.Chad Rosier2015-11-231-1/+1
| | | | llvm-svn: 253915
* [PGO] Add --text option for llvm-profdata show|merge commandsXinliang David Li2015-11-231-0/+15
| | | | | | | | | | | | | | The new option is similar to the SampleProfile dump option. - dump raw/indexed format into text profile format - merge the profile and output into text profile format. Note that Value Profiling data text format is not yet designed. That functionality will be added later. Differential Revision: http://reviews.llvm.org/D14894 llvm-svn: 253913
* SamplePGO - Add coverage tracking for samples.Diego Novillo2015-11-231-26/+85
| | | | | | | | | | | | The existing coverage tracker counts the number of records that were used from the input profile. An alternative view of coverage is to check how many available samples were applied. This way, if the profile contains several records with few samples, it doesn't really matter much that they were not applied. The more interesting records to apply are the ones that contribute many samples. llvm-svn: 253912
* [WinEH] Fix a case where GVN could incorrectly PRE a load into an EH pad.Andrew Kaylor2015-11-231-0/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D14842 llvm-svn: 253908
* [WebAssembly] Don't use set_local instructions explicitly.Dan Gohman2015-11-232-6/+14
| | | | | | | | | The current approach to using get_local and set_local is to use them implicitly, as register uses and defs. Introduce new copy instructions which are themselves no-ops except for the get_local and set_local that they imply, so that we use get_local and set_local consistently. llvm-svn: 253905
* [ThinLTO] Deduplicate function index loading into shared helper (NFC)Teresa Johnson2015-11-231-0/+23
| | | | | | | | Add a shared helper routine to read the function index from a file and create/return the function index object. Use it in llvm-link and llvm-lto. llvm-svn: 253903
* [WinEH] Fix problem where CodeGenPrepare incorrectly sinks a bitcast into an ↵Andrew Kaylor2015-11-231-0/+6
| | | | | | | | EH pad. Differential Revision: http://reviews.llvm.org/D14842 llvm-svn: 253902
* [WebAssembly] Always print loop end labelsDan Gohman2015-11-233-1/+20
| | | | | | | | | | | | | | | | | WebAssembly is currently using labels to end scopes, so for example a loop scope looks like this: BB0_0: loop BB0_1 ... BB0_1: with BB0_0 being the label of the first block not in the loop. This requires that the label be printed even when it's only reachable via fallthrough. To arrange this, insert a no-op LOOP_END instruction in such cases at the end of the loop. llvm-svn: 253901
* [PGO] Introduce alignment macro for instr-prof control data(NFC)Xinliang David Li2015-11-231-1/+1
| | | | llvm-svn: 253893
* [WebAssembly] Remove incomplete MCCodeEmitter bits.Dan Gohman2015-11-232-4/+0
| | | | | | These are parts of a separate patch that I accidentally included in r253878. llvm-svn: 253892
* Add Windows error code and tidy formatting for system errors.Paul Robinson2015-11-234-11/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D14892 llvm-svn: 253888
* [WebAssembly] Emit .param, .result, and .local through MC.Dan Gohman2015-11-237-28/+63
| | | | | | This eliminates one of the main remaining uses of EmitRawText. llvm-svn: 253878
* SamplePGO - Clear coverage tracking when clearing per-function data.Diego Novillo2015-11-231-0/+2
| | | | llvm-svn: 253877
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