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* The new t2LEApcrel* pseudo instructions need the size specified.Jim Grosbach2010-12-152-5/+13
| | | | | | rdar://8768390 llvm-svn: 121876
* Implement cleanups suggested by Daniel.Owen Anderson2010-12-152-11/+15
| | | | llvm-svn: 121875
* Fix build.Jakob Stoklund Olesen2010-12-151-1/+1
| | | | llvm-svn: 121872
* Detect and enumerate bypass loops.Jakob Stoklund Olesen2010-12-152-0/+39
| | | | | | | | Bypass loops have the current live range live through, but contain no uses or defs. Splitting around a bypass loop can free registers for other uses inside the loop by spilling the split range. llvm-svn: 121871
* Separate SplitAnalysis::getSplitLoops().Jakob Stoklund Olesen2010-12-152-7/+14
| | | | | | | This method returns the set of loops with uses that are candidates for splitting. llvm-svn: 121870
* Move Sub simplifications and additional Add simplifications out ofDuncan Sands2010-12-152-38/+71
| | | | | | instcombine and into InstructionSimplify. llvm-svn: 121861
* If we detect that the instruction we are simplifying is unreachable, arrange forDuncan Sands2010-12-151-3/+3
| | | | | | | it to be replaced by undef rather than not replaced at all, the idea being that this may reduce the amount of work done by whoever called InstructionSimplify. llvm-svn: 121860
* Teach jump threading to "look through" a select when the branch direction of ↵Frits van Bommel2010-12-151-0/+34
| | | | | | | | a terminator depends on it. When it sees a promising select it now tries to figure out whether the condition of the select is known in any of the predecessors and if so it maps the operands appropriately. llvm-svn: 121859
* Add fixups for Thumb LDR/STR instructions.Bill Wendling2010-12-153-3/+20
| | | | llvm-svn: 121858
* Relax alignment fragments.Rafael Espindola2010-12-151-29/+26
| | | | | | | | | | | With this we don't need the EffectiveSize field anymore. Without that field LayoutFragment only updates offsets and we don't need to invalidate the current fragment when it is relaxed (only the ones following it). This is also a very small improvement in the accuracy of the layout info as we now use the after relaxation size immediately. llvm-svn: 121857
* Patch by David Meyer to avoid a O(N^2) behaviour when relaxing fragments.Rafael Espindola2010-12-151-2/+5
| | | | | | | Since we now don't update addresses so early, we might relax a bit more than we need to. This is simillar to the issue in PR8467. llvm-svn: 121856
* add another overflow idiomChris Lattner2010-12-151-0/+8
| | | | llvm-svn: 121854
* add a note about overflow idiom recognition.Chris Lattner2010-12-151-1/+19
| | | | llvm-svn: 121853
* Generalize an assert.Rafael Espindola2010-12-151-1/+2
| | | | llvm-svn: 121851
* add a shift/imul missed optimizationChris Lattner2010-12-151-0/+45
| | | | llvm-svn: 121850
* add a note about a SPEC hack that gcc mainline does.Chris Lattner2010-12-151-0/+23
| | | | llvm-svn: 121849
* take care of some todos, transforming [us]mul_lohi into Chris Lattner2010-12-151-2/+46
| | | | | | a wider mul if the wider mul is legal. llvm-svn: 121848
* when transforming a MULHS into a wider MUL, there is no need to SRA theChris Lattner2010-12-151-1/+1
| | | | | | result, the top bits are truncated off anyway, just use SRL. llvm-svn: 121846
* make qsort predicate more conformant by returning 0 for equal values.Chris Lattner2010-12-151-1/+5
| | | | llvm-svn: 121838
* Reapply r121808 now that the missing patterns have been supplied.Bill Wendling2010-12-151-16/+21
| | | | llvm-svn: 121820
* Add some missing patterns now that tLDRB and tLDRH are split into reg andBill Wendling2010-12-151-2/+12
| | | | | | immediate versions. llvm-svn: 121819
* Fix PR8790, another instance where unreachable code can cause instruction ↵Owen Anderson2010-12-151-1/+6
| | | | | | | | simplification to fail, this case involve a select that simplifies to itself. llvm-svn: 121817
* Cleanup trailing whitespace.Owen Anderson2010-12-151-27/+27
| | | | llvm-svn: 121816
* Revert r121808 until I can fix the build.Bill Wendling2010-12-151-21/+16
| | | | llvm-svn: 121815
* thumb adr fixup needs alignment just like the t2 version.Jim Grosbach2010-12-141-1/+2
| | | | llvm-svn: 121812
* Comments and cleaning.Bill Wendling2010-12-141-6/+4
| | | | llvm-svn: 121809
* Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. InBill Wendling2010-12-141-16/+21
| | | | | | | | | | | | | | | | particular, we want ldr r2, [r3] to be equivalent to ldr r2, [r3, #0] and not ldr r2, [r3, r0] llvm-svn: 121808
* Simplify RegAllocGreedy's use of register aliases.Jakob Stoklund Olesen2010-12-141-17/+4
| | | | llvm-svn: 121807
* Simplify CCState's use of register aliases.Jakob Stoklund Olesen2010-12-141-5/+3
| | | | llvm-svn: 121806
* Simplify AggressiveAntiDepBreaker's use of register aliases.Jakob Stoklund Olesen2010-12-141-31/+14
| | | | llvm-svn: 121805
* Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.Jakob Stoklund Olesen2010-12-141-14/+4
| | | | llvm-svn: 121801
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-146-21/+50
| | | | llvm-svn: 121798
* Fix comment.Bill Wendling2010-12-141-1/+1
| | | | llvm-svn: 121797
* Multiclassify the LDR/STR encoding patterns. The only functionality differenceBill Wendling2010-12-141-69/+69
| | | | | | | is the addition of the FoldableAsLoad & Rematerializable flags to some of the load instructions. ARM has these flags set for them. llvm-svn: 121794
* Fix a minor bug in two-address pass. It was missing a commute opportunity.Evan Cheng2010-12-141-1/+2
| | | | | | | | | | | | | | | | | | | regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
* trailing whitespaceJim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121792
* Move debugging code entirely within DEBUG(). Silences an unused variableMatt Beaumont-Gay2010-12-141-8/+8
| | | | | | warning in the opt build. llvm-svn: 121791
* Refactor a bit for legibility.Jim Grosbach2010-12-141-28/+27
| | | | llvm-svn: 121790
* trailing whitespace.Jim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121789
* Make sure to propagate the predicate operands for LEApcrel to ADR.Jim Grosbach2010-12-141-4/+4
| | | | llvm-svn: 121788
* Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.Owen Anderson2010-12-141-1/+1
| | | | llvm-svn: 121784
* Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.Jakob Stoklund Olesen2010-12-143-5/+52
| | | | llvm-svn: 121783
* Use TRI::printReg instead of AbstractRegisterDescription when printingJakob Stoklund Olesen2010-12-143-34/+13
| | | | | | LiveIntervalUnions. llvm-svn: 121781
* Add TargetRegisterInfo::printReg() to pretty-print registers.Jakob Stoklund Olesen2010-12-141-0/+8
| | | | llvm-svn: 121780
* ARM Fixups relative to thumb functions need to have the low bit of the valueJim Grosbach2010-12-142-0/+14
| | | | | | set for interworking to work properly. rdar://8755956 llvm-svn: 121778
* Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().Jakob Stoklund Olesen2010-12-141-2/+4
| | | | llvm-svn: 121774
* MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.Daniel Dunbar2010-12-141-1/+1
| | | | llvm-svn: 121772
* Trailing whitespaceJim Grosbach2010-12-141-6/+6
| | | | llvm-svn: 121769
* Use the integer scheduling intrinsic for integer loads and stores.Bill Wendling2010-12-141-6/+6
| | | | llvm-svn: 121765
* - Insert new instructions before DomBlock's terminator,Chris Lattner2010-12-141-7/+16
| | | | | | | | | | which is simpler than finding a place to insert in BB. - Don't perform the 'if condition hoisting' xform on certain i1 PHIs, as it interferes with switch formation. This re-fixes "example 7", without breaking the world hopefully. llvm-svn: 121764
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