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* ScheduleDAGInstrs: Rework schedule graph builder.Matthias Braun2015-12-031-66/+159
| | | | | | | | | | | | | | | The new algorithm remembers the uses encountered while walking backwards until a matching def is found. Contrary to the previous version this: - Works without LiveIntervals being available - Allows to increase the precision to subregisters/lanemasks (not used for now) The changes in the AMDGPU tests are necessary because the R600 scheduler is not stable with respect to the order of nodes in the ready queues. Differential Revision: http://reviews.llvm.org/D9068 llvm-svn: 254577
* RegisterPressure: Use range based for, fix else style; NFCMatthias Braun2015-12-031-41/+28
| | | | llvm-svn: 254575
* MC: Make sure to clear *all* of MCMachOStreamer's stateJustin Bogner2015-12-031-0/+1
| | | | | | | The CreatedADWARFSection flag was added in r232842, but isn't cleared properly when resetting the streamer's state. Fix that. llvm-svn: 254571
* [WebAssembly] Add a test for wasm-store-results passDerek Schuff2015-12-031-1/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D15167 llvm-svn: 254570
* [WebAssembly] Assert that byval and nest are not used for return types.Dan Gohman2015-12-021-4/+2
| | | | llvm-svn: 254567
* Forgot to add this file with r254562.David Majnemer2015-12-021-0/+41
| | | | llvm-svn: 254565
* [Hexagon] Improve lowering of instructions to the MC layerKrzysztof Parzyszek2015-12-023-24/+55
| | | | | | | | | - Add extenders when necessary. - Handle some basic relocations. This should fix the failure in tools/clang/test/CodeGenCXX/crash.cpp llvm-svn: 254564
* Move EH-specific helper functions to a more appropriate placeDavid Majnemer2015-12-0216-62/+15
| | | | | | No functionality change is intended. llvm-svn: 254562
* Fixup for r254547: use format_hex() to simplify code.Alexey Samsonov2015-12-021-2/+1
| | | | llvm-svn: 254560
* Switch the linker to having a whitelist of GVs.Rafael Espindola2015-12-021-51/+67
| | | | | | | | | | | | This replaces DoNotLinkFromSource with ValuesToLink. It also moves the computation of ValuesToLink earlier. It is a bit simpler and an important step in slitting the linker into an ir mover and a linker proper. The test change is because we now avoid creating dead declarations. llvm-svn: 254559
* Libfuzzer: do not pass null into user functionMike Aizatsky2015-12-022-1/+7
| | | | | | Differential Revision: http://reviews.llvm.org/D15098 llvm-svn: 254558
* Use std::string instead of strdup() and free() in WinCodeViewLineTablesReid Kleckner2015-12-022-15/+6
| | | | llvm-svn: 254557
* Delete what is now duplicated code.Rafael Espindola2015-12-021-28/+3
| | | | | | | | | Having to import an alias as declaration is not thinlto specific. The test difference are because when we already have a decl and we are not importing it, we just leave the decl alone. llvm-svn: 254556
* Fix a typo in LoopVectorize.cpp. NFC.Cong Hou2015-12-021-1/+1
| | | | llvm-svn: 254549
* [PowerPC] Remove wild call to RegScavenger::initRegState().Alexey Samsonov2015-12-021-2/+1
| | | | | | | | This call should in fact be made by RegScavenger::enterBasicBlock() called below. The first call does nothing except for triggering UB, indicated by UBSan (passing nullptr to memset()). llvm-svn: 254548
* [Hexagon] Remove std::hex in favor of format().Alexey Samsonov2015-12-021-5/+7
| | | | | | | | | std::hex is not used anywhere in LLVM code base except for this place, and it has a known undefined behavior (at least in libstdc++ 4.9.3): https://llvm.org/bugs/show_bug.cgi?id=18156, which fires in UBSan bootstrap of LLVM. llvm-svn: 254547
* Also copy private linkage globals when needed.Rafael Espindola2015-12-021-1/+1
| | | | | | | This was an omission when handling COFF style comdats with local keys. Should fix the sanitizer-windows bot. llvm-svn: 254543
* Don't copy information from aliasee to alias.Rafael Espindola2015-12-023-20/+18
| | | | | | They are independent. llvm-svn: 254541
* AMDGPU/SI: Correctly emit agent global segment variables when targeting HSATom Stellard2015-12-029-3/+196
| | | | | | Differential Revision: http://reviews.llvm.org/D14508 llvm-svn: 254540
* [Hexagon] Remove TFRI_V4 instruction, use existing A2_tfrsi insteadKrzysztof Parzyszek2015-12-021-20/+0
| | | | llvm-svn: 254539
* Fix linking when we copy over only a decl.Rafael Espindola2015-12-021-22/+34
| | | | | | | We were failing to copy the fact that the GV is weak and in the case of an alias, producing invalid IR. llvm-svn: 254538
* [CodeGen]: Fix bad interaction with AntiDep breaking and inline asm.Kyle Butt2015-12-021-3/+6
| | | | | | | | | AggressiveAntiDepBreaker was renaming registers specified by the user for inline assembly. While this will work for compiler-specified registers, it won't work for user-specified registers, and at the time this runs, I don't currently see a way to distinguish them. llvm-svn: 254532
* Test Commit: iterateeKyle Butt2015-12-021-2/+2
| | | | | | Remove whitespace from blank lines. NFC llvm-svn: 254531
* Fix accidental off by one changeFiona Glaser2015-12-021-1/+1
| | | | | | Didn't break any tests, but did unnecessary extra work. llvm-svn: 254529
* AMDGPU: Fix msan test failureTom Stellard2015-12-021-0/+1
| | | | llvm-svn: 254527
* Scheduler / Regalloc: use unique_ptr[] instead of std::vectorFiona Glaser2015-12-022-15/+16
| | | | | | | | | vector.resize() is significantly slower than memset in many STLs and the cost of initializing these vectors is significant on targets with many registers. Since we don't need the overhead of a vector, use a simple unique_ptr instead. llvm-svn: 254526
* [llvm-profdata] Change instr prof counter overflow to saturate rather than ↵Nathan Slingerland2015-12-021-5/+6
| | | | | | | | | | | | | | discard Summary: This changes overflow handling during instrumentation profile merge. Rathar than throwing away records that would result in counter overflow, merged counts are instead clamped to the maximum representable value. A warning about counter overflow is still surfaced to the user as before. Reviewers: dnovillo, davidxl, silvas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14893 llvm-svn: 254525
* AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.Tim Northover2015-12-023-32/+40
| | | | | | | | The ARM ARM is clear that 128-bit loads are only guaranteed to have been atomic if there has been a corresponding successful stxp. It's less clear for AArch32, so I'm leaving that alone for now. llvm-svn: 254524
* [WebAssembly] Fix comments to say "LIFO" instead of "FIFO" when describing a ↵Dan Gohman2015-12-024-4/+4
| | | | | | stack. llvm-svn: 254523
* AMDGPU/SI: Don't emit group segment global variablesTom Stellard2015-12-024-0/+18
| | | | | | | | | | | | Summary: Only global or readonly segment variables should appear in object files. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15111 llvm-svn: 254519
* Do (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1 rather than (A == C1 || A ↵David Majnemer2015-12-021-4/+4
| | | | | | | | | | == C2) -> (A | (C1 ^ C2)) == C2 when C1 ^ C2 is a power of 2. Differential Revision: http://reviews.llvm.org/D14223 Patch by Amaury SECHET! llvm-svn: 254518
* By intel specMichael Zuckerman2015-12-021-1/+1
| | | | | | | | | | | | | |9B DD /7| FSTSW m2byte| Valid Valid Store FPU status word at m2byteafter checking for pending unmasked floating-point exceptions.| |9B DF E0| FSTSW AX| Valid Valid Store FPU status word in AX register after checking for pending unmasked floating-point exceptions.| |DD /7 |FNSTSW *m2byte| Valid Valid Store FPU status word at m2bytewithout checking for pending unmasked floating-point exceptions.| |DF E0 |FNSTSW *AX| Valid Valid Store FPU status word in AX register without checking for pending unmasked floating-point exceptions| m2byte is word register, and therefor instruction operand need to be change from f32mem to i16mem. Differential Revision: http://reviews.llvm.org/D14953 llvm-svn: 254512
* [AArch64]: Add support for Cortex-A35Christof Douma2015-12-024-3/+22
| | | | | | Adds support for the new Cortex-A35 ARMv8-A core. llvm-svn: 254503
* Patch to fix a crash in the PowerPC back end due to ISD::ROTL and ISD::ROTRNemanja Ivanovic2015-12-021-0/+2
| | | | | | not being expanded. Test case included. llvm-svn: 254501
* [mips][microMIPS] Implement PREPEND, RADDU.W.QB, RDDSP, REPL.PH, REPL.QB, ↵Hrvoje Varga2015-12-023-9/+96
| | | | | | | | REPLV.PH, REPLV.QB and MTHLIP instructions Differential Revision: http://reviews.llvm.org/D14527 llvm-svn: 254496
* [X86][FMA] Optimize FNEG(FMUL) PatternsSimon Pilgrim2015-12-021-12/+28
| | | | | | | | | | On FMA targets, we can avoid having to load a constant to negate a float/double multiply by instead using a FNMSUB (-(X*Y)-0) Fix for PR24366 Differential Revision: http://reviews.llvm.org/D14909 llvm-svn: 254495
* AVX-512: Updated cost of FP/SINT/UINT conversion operationsElena Demikhovsky2015-12-021-11/+61
| | | | | | | | | I checked and updated the cost of AVX-512 conversion operations. Added cost of conversion operations in DQ mode. Conversion of illegal types that requires vector split is not calculated right now (like for other X86 targets). Differential Revision: http://reviews.llvm.org/D15074 llvm-svn: 254494
* [X86][AVX512] add comi with SaeAsaf Badouh2015-12-024-1/+137
| | | | | | | | add builtin_ia32_vcomisd and builtin_ia32_vcomisd Differential Revision: http://reviews.llvm.org/D14331 llvm-svn: 254493
* [llvm-dwp] Don't rely on implicit move assignment operator (MSVC won't ↵David Blaikie2015-12-021-2/+7
| | | | | | synthesize one) llvm-svn: 254492
* [AttributeSet] Overload AttributeSet::addAttribute to reduce compileAkira Hatanaka2015-12-023-17/+58
| | | | | | | | | | | | | | | | | | | | time. The new overloaded function is used when an attribute is added to a large number of slots of an AttributeSet (for example, to function parameters). This is much faster than calling AttributeSet::addAttribute once per slot, because AttributeSet::getImpl (which calls FoldingSet::FIndNodeOrInsertPos) is called only once per function instead of once per slot. With this commit, clang compiles a file which used to take over 22 minutes in just 13 seconds. rdar://problem/23581000 Differential Revision: http://reviews.llvm.org/D15085 llvm-svn: 254491
* [X86] Change getZeroVector to take an MVT instead of EVT. One minor change ↵Craig Topper2015-12-021-5/+5
| | | | | | needed to only try to perform 256-it shuffle combines on legal vector types. llvm-svn: 254490
* [llvm-dwp] Emit a rather fictional debug_cu_indexDavid Blaikie2015-12-023-13/+27
| | | | | | | | | | | | | | This is very rudimentary support for debug_cu_index, but it is enough to allow llvm-dwarfdump to find the offsets for contributions and correctly dump debug_info. It will need to actually find the real signature of the unit and build the real hash table with the right number of buckets, as per the DWP specification. It will also need to be expanded to cover the tu_index as well. llvm-svn: 254489
* [X86] Fix weird identation. NFCCraig Topper2015-12-021-10/+10
| | | | llvm-svn: 254487
* Change ModuleLinker to take a set of GlobalValues to import instead of a ↵Mehdi Amini2015-12-022-6/+10
| | | | | | | | | | | | single one For efficiency reason, when importing multiple functions for the same Module, we can avoid reparsing it every time. Differential Revision: http://reviews.llvm.org/D15102 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254486
* [libFuzzer] add a test that is built with -fsanitize-coverage=trace-bbKostya Serebryany2015-12-022-0/+22
| | | | llvm-svn: 254484
* [sanitizer coverage] when adding a bb trace instrumentation, do it instead, ↵Kostya Serebryany2015-12-021-15/+10
| | | | | | not in addition to, regular coverage. Do the regular coverage in the run-time instead llvm-svn: 254482
* [X86] Fix a think-o when checking if the eflags needs to be preserved.Quentin Colombet2015-12-021-1/+7
| | | | llvm-svn: 254480
* Modify FunctionImport to take a callback to load modulesMehdi Amini2015-12-021-4/+7
| | | | | | | | | | | | When linking static archive, there is no individual module files to load. Instead they can be mmap'ed and could be initialized from a buffer directly. The callback provide flexibility to override the scheme for loading module from the summary. Differential Revision: http://reviews.llvm.org/D15101 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 254479
* [X86] Make sure the prologue does not clobber EFLAGS when it lives accross it.Quentin Colombet2015-12-021-43/+26
| | | | | | | | This is a superset of the fix done in r254448. This fixes PR25607. llvm-svn: 254478
* AArch64: fix 128-bit shiftsTim Northover2015-12-021-33/+54
| | | | | | | | | | | | | | We mustn't introduce a shift of exactly 64-bits for any inputs, since that's an UNDEF value (and worse, it's not what you want with the natural Arch64 implementation). The generated code is pretty horrific, but I couldn't come up with an obviously better alternative (if the amount is constant EXTR could help). Turns out 128-bit shifts are just nasty. rdar://22491037 llvm-svn: 254475
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