summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* cleanup.Adrian Prantl2015-01-131-3/+2
| | | | llvm-svn: 225848
* Document, cleanup, and clang-format DwarfExpression.hAdrian Prantl2015-01-131-12/+14
| | | | llvm-svn: 225847
* Debug Info: Turn DIExpression::getFrameRegister() into an isFrameRegister()Adrian Prantl2015-01-134-8/+9
| | | | | | | | function. NFC. llvm-svn: 225846
* R600/SI: Add pattern for bitcasting fp immediates to integersTom Stellard2015-01-138-56/+39
| | | | | | | | The backend now assumes that all immediates are integers. This allows us to simplify immediate handling code, becasue we no longer need to handle fp and integer immediates differently. llvm-svn: 225844
* [PM] Remove the defunt CGSCC-specific debug flag.Chandler Carruth2015-01-131-4/+0
| | | | | | | | Even before I sunk the debug flag into the opt tool this had been made obsolete by factoring the pass and analysis managers into a single set of templates that all used the core flag. No functionality changed here. llvm-svn: 225842
* [PM] Push the debug option for the new pass manager into the opt toolChandler Carruth2015-01-131-5/+0
| | | | | | | | | | and expose the necessary hooks in the API directly. This makes it much cleaner for example to log the usage of a pass manager from a library. It also makes it more obvious that this functionality isn't "optional" or "asserts-only" for the pass manager. llvm-svn: 225841
* [AVX512] Unpack support in new shuffle loweringAdam Nemet2015-01-131-0/+34
| | | | | | | | | | | This now handles both 32 and 64-bit element sizes. In this version, the test are in vector-shuffle-512-v8.ll, canonicalized by Chandler's update_llc_test_checks.py. Part of <rdar://problem/17688758> llvm-svn: 225838
* [AVX512] Add pretty-printing of shuffle mask for unpacksAdam Nemet2015-01-131-0/+64
| | | | llvm-svn: 225837
* DAGCombiner: simplify by using condition variables; NFCMatthias Braun2015-01-132-18/+15
| | | | llvm-svn: 225836
* AsmParser/Bitcode: Add support for MDLocationDuncan P. N. Exon Smith2015-01-136-3/+208
| | | | | | | | | | | | This adds assembly and bitcode support for `MDLocation`. The assembly side is rather big, since this is the first `MDNode` subclass (that isn't `MDTuple`). Part of PR21433. (If you're wondering where the mountains of testcase updates are, we don't need them until I update `DILocation` and `DebugLoc` to actually use this class.) llvm-svn: 225830
* R600: Implement getRecipEstimateMatt Arsenault2015-01-134-1/+29
| | | | | | | | | This requires a new hook to prevent expanding sqrt in terms of rsqrt and reciprocal. v_rcp_f32, v_rsq_f32, and v_sqrt_f32 are all the same rate, so this expansion would just double the number of instructions and cycles. llvm-svn: 225828
* R600: Implement getRsqrtEstimateMatt Arsenault2015-01-132-0/+23
| | | | | | | | Only do for f32 since I'm unclear on both what this is expecting for the refinement steps in terms of accuracy, and what f64 instruction actually provides. llvm-svn: 225827
* IR: Add MDLocation classDuncan P. N. Exon Smith2015-01-134-3/+170
| | | | | | | | | | | Add a new subclass of `UniquableMDNode`, `MDLocation`. This will be the IR version of `DebugLoc` and `DILocation`. The goal is to rename this to `DILocation` once the IR classes supersede the `DI`-prefixed wrappers. This isn't used anywhere yet. Part of PR21433. llvm-svn: 225824
* R600: Make cttz / ctlz cheap to speculateMatt Arsenault2015-01-132-0/+15
| | | | | | | | | Speculating things is generally good. SI+ has instructions for these for 32-bit values. This is still probably better even with the expansion for 64-bit values, although it is odd that this callback doesn't have the size as a parameter. llvm-svn: 225822
* Fix non-determinism issue in SLPJulien Lerouge2015-01-131-1/+1
| | | | | | | | | | | | | | | The issue was introduced in r214638: + for (auto &BSIter : BlocksSchedules) { + scheduleBlock(BSIter.second.get()); + } Because BlocksSchedules is a DenseMap with BasicBlock* keys, blocks are scheduled in non-deterministic order, resulting in unpredictable IR. Patch by Daniel Reynaud! llvm-svn: 225821
* Use the integrated assembler as default on SystemZUlrich Weigand2015-01-131-0/+2
| | | | | | | | | | This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases deliberately using an invalid instruction in inline asm now have to use -no-integrated-as. llvm-svn: 225820
* Use the integrated assembler as default on PowerPCUlrich Weigand2015-01-131-2/+1
| | | | | | | | | | | This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases using inline asm had to be adapted, either by updating the expected output, or by using -no-integrated-as (for such tests that deliberately use an invalid instruction in inline asm). llvm-svn: 225819
* Running clang-format on CommandLine.h and CommandLine.cpp.Chris Bieneman2015-01-131-273/+262
| | | | | | No functional changes, I'm just going to be doing a lot of work in these files and it would be helpful if they had more current LLVM style. llvm-svn: 225817
* Revert "r225808 - [PowerPC] Add StackMap/PatchPoint support"Hal Finkel2015-01-1311-318/+98
| | | | | | | Reverting this while I investiage buildbot failures (segfaulting in GetCostForDef at ScheduleDAGRRList.cpp:314). llvm-svn: 225811
* [PowerPC] Add missing override keywordHal Finkel2015-01-131-1/+1
| | | | llvm-svn: 225809
* [PowerPC] Add StackMap/PatchPoint supportHal Finkel2015-01-1311-98/+318
| | | | | | | | | | | | | | | | | | | | | | | | | This commit does two things: 1. Refactors PPCFastISel to use more of the common infrastructure for call lowering (this lets us take advantage of this common code for lowering some common intrinsics, stackmap/patchpoint among them). 2. Adds support for stackmap/patchpoint lowering. For the most part, this is very similar to the support in the AArch64 target, with the obvious differences (different registers, NOP instructions, etc.). The test cases are adapted from the AArch64 test cases. One difference of note is that the patchpoint call sequence takes 24 bytes, so you can't use less than that (on AArch64 you can go down to 16). Also, as noted in the docs, we take the patchpoint address to be the actual code address (assuming the call is local in the TOC-sharing sense), which should yield higher performance than generating the full cross-DSO indirect-call sequence and is likely just as useful for JITed code (if not, we'll change it). StackMaps and Patchpoints are still marked as experimental, and so this support is doubly experimental. So go ahead and experiment! llvm-svn: 225808
* [StackMaps] Use CurrentFnSymForSizeHal Finkel2015-01-131-1/+1
| | | | | | | | When computing the call-site offset, use AP.CurrentFnSymForSize instead of AP.CurrentFnSym. There should be no change for other targets, but this is necessary for generating valid expressions for PPC64/ELF. llvm-svn: 225807
* [StackMaps] Mark in CallLoweringInfo when lowering a patchpointHal Finkel2015-01-133-4/+7
| | | | | | | | | | | | | | | While, generally speaking, the process of lowering arguments for a patchpoint is the same as lowering a regular indirect call, on some targets it may not be exactly the same. Targets may not, for example, want to add additional register dependencies that apply only to making cross-DSO calls through linker stubs, may not want to load additional registers out of function descriptors, and may not want to add additional side-effect-causing instructions that cannot be removed later with the call itself being generated. The PowerPC target will use this in a future commit (for all of the reasons stated above). llvm-svn: 225806
* [StackMaps] Allow the target to pre-process the live-out maskHal Finkel2015-01-131-0/+2
| | | | | | | | | | | | | | Some targets, PowerPC for example, have pseudo-registers (such as that used to represent the rounding mode), that don't have DWARF register numbers or a register class. These are used only for internal dependency tracking, and should not appear in the recorded live-outs. This adds a callback allowing the target to pre-process the live-out mask in order to remove these kinds of registers so that the StackMaps code does not complain about them and/or attempt to include them in the output. This will be used by the PowerPC target in a future commit. llvm-svn: 225805
* [PowerPC] Split the blr definition into BLR and BLR8Hal Finkel2015-01-135-6/+13
| | | | | | | | | | We really need a separate 64-bit version of this instruction so that it can be marked as clobbering LR8 (instead of just LR). No change in functionality (although the verifier might be slightly happier), however, it is required for stackmap/patchpoint support. Thus, this will be covered by stackmap test cases once those are added. llvm-svn: 225804
* [PowerPC] Add DWARF numbers for CA (XER), etc.Hal Finkel2015-01-131-5/+4
| | | | | | | | | | | | For registers that have DWARF numbers (like CA, which is really part of XER), add them. Also, RM is not an SPR, and the declaration hack (where it is declared as an SPR with an arbitrary number) is not needed, so just declare it as a register. NFC; although CA's register number will be needed when stackmap/patchpoint support is added. llvm-svn: 225800
* [mips][microMIPS] Fix issue with 16b instructions in jr instruction delay slotJozef Kolek2015-01-131-5/+16
| | | | | | | | | 16 bit instructions are not allowed in jr delay slot. Same stands for PseudoIndirectBranch and PseudoReturn. Differential Revision: http://reviews.llvm.org/D6815 llvm-svn: 225798
* Added TLI hook for isFPExtFree. Some of the FMA combine heuristics are now ↵Olivier Sallenave2015-01-133-63/+77
| | | | | | guarded with that hook. llvm-svn: 225795
* Revert "SLPVectorizer: Cache results from memory alias checking."Erik Eckstein2015-01-131-49/+19
| | | | | | The alias cache has a problem of incorrect collisions in case a new instruction is allocated at the same address as a previously deleted instruction. llvm-svn: 225790
* SLPVectorizer: Cache results from memory alias checking.Erik Eckstein2015-01-131-19/+49
| | | | | | | This speeds up the dependency calculations for blocks with many load/store/call instructions. Beside the improved runtime, there is no functional change. llvm-svn: 225786
* [PM] Refactor the new pass manager to use a single template to implementChandler Carruth2015-01-132-99/+0
| | | | | | | | | | | | | | | | | | | | | | | the generic functionality of the pass managers themselves. In the new infrastructure, the pass "manager" isn't actually interesting at all. It just pipelines a single chunk of IR through N passes. We don't need to know anything about the IR or the passes to do this really and we can replace the 3 implementations of the exact same functionality with a single generic PassManager template, complementing the single generic AnalysisManager template. I've left typedefs in place to give convenient names to the various obvious instantiations of the template. With this, I think I've nuked almost all of the redundant logic in the managers, and I think the overall design is actually simpler for having single templates that clearly indicate there is no special logic here. The logging is made somewhat more annoying by this change, but I don't think the difference is worth having heavy-weight traits to help log things. llvm-svn: 225783
* Peephole opt needs optimizeSelect() to keep track of newly created MIsMehdi Amini2015-01-133-7/+24
| | | | | | | | | | | | | | | Peephole optimizer is scanning a basic block forward. At some point it needs to answer the question "given a pointer to an MI in the current BB, is it located before or after the current instruction". To perform this, it keeps a set of the MIs already seen during the scan, if a MI is not in the set, it is assumed to be after. It means that newly created MIs have to be inserted in the set as well. This commit passes the set as an argument to the target-dependent optimizeSelect() so that it can properly update the set with the (potentially) newly created MIs. llvm-svn: 225772
* fix {typo, build failure} in r225760Ramkumar Ramachandra2015-01-131-1/+1
| | | | llvm-svn: 225762
* Standardize {pred,succ,use,user}_empty()Ramkumar Ramachandra2015-01-136-10/+10
| | | | | | | | | The functions {pred,succ,use,user}_{begin,end} exist, but many users have to check *_begin() with *_end() by hand to determine if the BasicBlock or User is empty. Fix this with a standard *_empty(), demonstrating a few usecases. llvm-svn: 225760
* ARM: prepare prefix parsing for improved AAELF supportSaleem Abdulrasool2015-01-131-5/+43
| | | | | | | | AAELF specifies a number of ELF specific relocation types which have custom prefixes for the symbol reference. Switch the parser to be more table driven with an idea of file formats for which they apply. NFC. llvm-svn: 225758
* [PM] Fold all three analysis managers into a single AnalysisManagerChandler Carruth2015-01-132-276/+4
| | | | | | | | | | | | | | | | | | | | | | | | | template. This consolidates three copies of nearly the same core logic. It adds "complexity" to the ModuleAnalysisManager in that it makes it possible to share a ModuleAnalysisManager across multiple modules... But it does so by deleting *all of the code*, so I'm OK with that. This will naturally make fixing bugs in this code much simpler, etc. The only down side here is that we have to use 'typename' and 'this->' in various places, and the implementation is lifted into the header. I'll take that for the code size reduction. The convenient names are still typedef-ed and used throughout so that users can largely ignore this aspect of the implementation. The follow-up change to this will do the exact same refactoring for the PassManagers. =D It turns out that the interesting different code is almost entirely in the adaptors. At the end, that should be essentially all that is left. llvm-svn: 225757
* fix typo; NFCSanjay Patel2015-01-131-1/+1
| | | | llvm-svn: 225753
* Rename llvm.recoverframeallocation to llvm.framerecoverReid Kleckner2015-01-133-6/+6
| | | | | | | | This name is less descriptive, but it sort of puts things in the 'llvm.frame...' namespace, relating it to frameallocate and frameaddress. It also avoids using "allocate" and "allocation" together. llvm-svn: 225752
* Add the llvm.frameallocate and llvm.recoverframeallocation intrinsicsReid Kleckner2015-01-139-2/+129
| | | | | | | | | | | | | | | | | | | | | These intrinsics allow multiple functions to share a single stack allocation from one function's call frame. The function with the allocation may only perform one allocation, and it must be in the entry block. Functions accessing the allocation call llvm.recoverframeallocation with the function whose frame they are accessing and a frame pointer from an active call frame of that function. These intrinsics are very difficult to inline correctly, so the intention is that they be introduced rarely, or at least very late during EH preparation. Reviewers: echristo, andrew.w.kaylor Differential Revision: http://reviews.llvm.org/D6493 llvm-svn: 225746
* IR: Remove an invalid assertion when replacing resolved operandsDuncan P. N. Exon Smith2015-01-131-3/+5
| | | | | | | | | This adds back the testcase from r225738, and adds to it. Looks like we need both sides for now (the assertion was incorrect both ways, and although it seemed reasonable (when written correctly) it wasn't particularly important). llvm-svn: 225745
* Combine fcmp + select to fminnum / fmaxnum if no nans and legalMatt Arsenault2015-01-131-0/+59
| | | | | | | Also require unsafe FP math for no since there isn't a way to test for signed zeros. llvm-svn: 225744
* [PM] Re-clang-format much of this code as the code has changed some andChandler Carruth2015-01-132-4/+4
| | | | | | | | so has clang-format. Notably, this fixes a bunch of formatting in the CGSCC pass manager side of things that has been improved in clang-format recently. llvm-svn: 225743
* Revert "IR: Fix an inverted assertion when replacing resolved operands"Duncan P. N. Exon Smith2015-01-131-1/+1
| | | | | | | | This reverts commit r225738. Maybe the assertion is just plain wrong, but this version fails on WAY more bots. I'll make sure both ways work in a follow-up but I want to get bots green in the meantime. llvm-svn: 225742
* Grammar and spelling.Eric Christopher2015-01-131-4/+4
| | | | llvm-svn: 225740
* IR: Fix an inverted assertion when replacing resolved operandsDuncan P. N. Exon Smith2015-01-131-1/+1
| | | | | | | Add a unit test, since this bug was only exposed by clang tests. Thanks to Rafael for tracking this down! llvm-svn: 225738
* Debug Info: Move support for constants into DwarfExpression.Adrian Prantl2015-01-134-37/+65
| | | | | | | | | Move the declaration of DebugLocDwarfExpression into DwarfExpression.h because it needs to be accessed from AsmPrinterDwarf.cpp and DwarfDebug.cpp NFC. llvm-svn: 225734
* IR: Split out writeMDTuple(), NFCDuncan P. N. Exon Smith2015-01-121-6/+24
| | | | | | Prepare for more subclasses of `UniquableMDNode` than `MDTuple`. llvm-svn: 225732
* Make DwarfExpression store the AsmPrinter instead of the TargetMachine.Adrian Prantl2015-01-124-17/+26
| | | | | | NFC. llvm-svn: 225731
* remove extra semicolonAdrian Prantl2015-01-121-1/+1
| | | | llvm-svn: 225730
* musttail: Only set the inreg flag for fastcall and vectorcallReid Kleckner2015-01-121-3/+16
| | | | | | | | | | Otherwise we'll attempt to forward ECX, EDX, and EAX for cdecl and stdcall thunks, leaving us with no scratch registers for indirect call targets. Fixes PR22052. llvm-svn: 225729
OpenPOWER on IntegriCloud