| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 68603
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by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.
llvm-svn: 68602
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integer types, unless they are already strange. This prevents it from
turning the code produced by SROA into crazy libcalls and stuff that
the code generator can't handle. In the attached example, the result
was an i96 multiply that caused the x86 backend to assert.
Note that if TargetData had an idea of what the legal types are for
a target that this could be used to stop instcombine from introducing
i64 muls, as Scott wanted.
llvm-svn: 68598
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Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.
llvm-svn: 68597
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a testcase I'm about to attach to that pr.
llvm-svn: 68592
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abstraction for CommandLine.
llvm-svn: 68588
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avoiding sign extension for the top octet. For "negative" chars, we'd print
stuff like:
.asciz "\702...
now we print:
.asciz "\302...
llvm-svn: 68577
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with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
llvm-svn: 68576
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llvm-svn: 68569
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builds.
--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td
llvm-svn: 68560
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llvm.dbg.region_end in non-fast mode also.
llvm-svn: 68559
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This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.
Will work on it and on X86-64 support.
llvm-svn: 68552
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SelectionDAG do those. This fixes PR3955.
llvm-svn: 68546
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When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.
llvm-svn: 68545
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llvm-svn: 68542
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Types can have references to eachother, so we can't just call destroy on them.
llvm-svn: 68523
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llvm-svn: 68500
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llvm-svn: 68485
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Patch by Richard Pennington.
llvm-svn: 68464
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llvm-svn: 68459
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llvm-svn: 68458
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llvm-svn: 68457
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instead of the place where it started to perform the string copy.
- PR3661
- Patch by Benjamin Kramer!
llvm-svn: 68443
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accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.
llvm-svn: 68442
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llvm-svn: 68421
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Constant, MDString and MDNode which can only be used by globals with a name
that starts with "llvm." or as arguments to a function with the same naming
restriction.
llvm-svn: 68420
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llvm-svn: 68405
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llvm-svn: 68404
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loads when an input node has multiple uses.
llvm-svn: 68398
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llvm-svn: 68384
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llvm-svn: 68383
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llvm-svn: 68382
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llvm-svn: 68381
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llvm-svn: 68380
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movq for v2i64 on x86-32.
llvm-svn: 68368
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Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.
llvm-svn: 68355
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llvm-svn: 68351
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llvm-svn: 68333
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to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
llvm-svn: 68329
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onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots.
llvm-svn: 68327
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llvm-svn: 68269
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llvm-svn: 68262
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llvm-svn: 68254
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llvm-svn: 68253
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- The code is silly, I'm just amusing myself. Rewrite to be efficient
if you like. :)
Also, if you wish to debate the proper names of the triple components
I'm all ears.
llvm-svn: 68252
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is appropriate. This helps visually differentiate host-oriented
calculations from target-oriented calculations.
llvm-svn: 68227
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less ambiguous and less C-specific.
llvm-svn: 68219
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assembly.
llvm-svn: 68218
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Applications/Burg/burg
Applications/ClamAV/clamscan
and many other tests.
llvm-svn: 68211
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llvm-svn: 68175
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