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* getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCISanjay Patel2016-09-1424-120/+105
| | | | llvm-svn: 281493
* Fix typo in comment [NFC]Etienne Bergeron2016-09-141-1/+1
| | | | llvm-svn: 281492
* AMDGPU: Support folding FrameIndex operandsMatt Arsenault2016-09-141-9/+26
| | | | | | This avoids test regressions in a future commit. llvm-svn: 281491
* getValueType().getScalarSizeInBits() -> getScalarValueSizeInBits() ; NFCISanjay Patel2016-09-147-57/+42
| | | | llvm-svn: 281490
* getScalarType().getSizeInBits() -> getScalarSizeInBits() ; NFCISanjay Patel2016-09-1412-77/+77
| | | | llvm-svn: 281489
* AMDGPU: Improve splitting 64-bit bit ops by constantsMatt Arsenault2016-09-146-88/+272
| | | | | | | | This addresses a TODO to handle operations besides and. This also starts eliminating no-op operations with a constant that can emerge later. llvm-svn: 281488
* [LV] Process pointer IVs with PHINodes in collectLoopUniformsMatthew Simpson2016-09-141-4/+22
| | | | | | | | | | | | | | | This patch moves the processing of pointer induction variables in collectLoopUniforms from the consecutive pointer phase of the analysis to the phi node phase. Previously, if a pointer induction variable was used by both a scalarized non-memory instruction as well as a vectorized memory instruction, we would incorrectly identify the pointer as uniform. Pointer induction variables should be treated the same as other phi nodes. That is, they are uniform if all users of the induction variable and induction variable update are uniform. Differential Revision: https://reviews.llvm.org/D24511 llvm-svn: 281485
* [ARM] Promote small global constants to constant poolsJames Molloy2016-09-144-1/+145
| | | | | | | | | | | | | | | | | | | | | | | | If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281484
* [X86][SSE] Removed unused getTargetShuffleNode functionSimon Pilgrim2016-09-141-17/+0
| | | | llvm-svn: 281481
* Fix code-gen crash on Power9 for insert_vector_elt with variable index (PR30189)Nemanja Ivanovic2016-09-142-2/+16
| | | | | | | | | | | This patch corresponds to review: https://reviews.llvm.org/D24021 In the initial implementation of this instruction, I forgot to account for variable indices. This patch fixes PR30189 and should probably be merged into 3.9.1 (I'll open a bug according to the new instructions). llvm-svn: 281479
* [StackProtector] Use INITIALIZE_TM_PASS instead of INITIALIZE_PASSSilviu Baranga2016-09-141-1/+1
| | | | | | | | | | in order to make sure that its TargetMachine constructor is registered. This allows us to run the PEI machine pass with MIR input (see PR30324). llvm-svn: 281474
* Adding missing directive for Power9.Nemanja Ivanovic2016-09-141-1/+1
| | | | | | | | There is currently no codegen for Power9 that depends on the directive so this is NFC for now but will be important in the future. This was missed in r268950 so I'm adding it now. llvm-svn: 281473
* [X86][SSE] Don't blend vector shifts with MOVSS/MOVSD directly, lower from ↵Simon Pilgrim2016-09-141-10/+10
| | | | | | | | generic shuffle Shuffle lowering will correctly lower to MOVSS/MOVSD/PBLEND, improving commutation opportunities llvm-svn: 281471
* [asan] Enable -asan-use-private-alias on Darwin/Mach-O, add test for ODR ↵Kuba Brecka2016-09-141-1/+2
| | | | | | | | | | false positive with LTO (llvm part) The '-asan-use-private-alias’ option (disabled by default) option is currently only enabled for Linux and ELF, but it also works on Darwin and Mach-O. This option also fixes a known problem with LTO on Darwin (https://github.com/google/sanitizers/issues/647). This patch enables the support for Darwin (but still keeps it off by default) and adds the LTO test case. Differential Revision: https://reviews.llvm.org/D24292 llvm-svn: 281470
* Revert "[Thumb] Teach ISel how to lower compares of AND bitmasks efficiently"James Molloy2016-09-142-138/+5
| | | | | | This reverts commit r281323. It caused chromium test failures and a selfhost failure. llvm-svn: 281451
* Missing includes.Vassil Vassilev2016-09-145-1/+5
| | | | llvm-svn: 281450
* GlobalISel: mark pointer stores as legal on AArch64.Tim Northover2016-09-141-1/+1
| | | | llvm-svn: 281448
* This reapplies r281304. The issue was that I had missedSjoerd Meijer2016-09-145-49/+52
| | | | | | to copy the new isAdd field in the tablegen data structure. llvm-svn: 281447
* AVX-512: Fixed a bug in kortest.z intrinsicElena Demikhovsky2016-09-141-1/+1
| | | | | | Lowering was wrong - X86ISD::SETCC node should return i8 type. llvm-svn: 281446
* [AVX512BW] Change truncStore action (v16i16->v16i18). It can be legal only ↵Igor Breger2016-09-141-2/+3
| | | | | | | | with AVX512VL. Differential Revision: http://reviews.llvm.org/D24547 llvm-svn: 281445
* [X86] Remove the VCVTSI2SD32 with rounding intrinsic. It's not used by clang ↵Craig Topper2016-09-141-1/+0
| | | | | | and not needed since 32-bit integer to double is always exact. llvm-svn: 281442
* Create a getelementptr instead of sub expr for ValueOffsetPair if theWei Mi2016-09-141-3/+22
| | | | | | | | | | | | value is a pointer. This patch is to fix PR30213. When expanding an expr based on ValueOffsetPair, if the value is of pointer type, we can only create a getelementptr instead of sub expr. Differential Revision: https://reviews.llvm.org/D24088 llvm-svn: 281439
* [libFuzzer] start using trace-pc-guard as an alternative source of coverageKostya Serebryany2016-09-146-52/+32
| | | | llvm-svn: 281435
* [sanitizer-coverage] add yet another flavour of coverage instrumentation: ↵Kostya Serebryany2016-09-141-2/+52
| | | | | | trace-pc-guard. The intent is to eventually replace all of {bool coverage, 8bit-counters, trace-pc} with just this one. LLVM part llvm-svn: 281431
* Address Pete's review comment and define OrigArg on its own line.Akira Hatanaka2016-09-131-1/+2
| | | | | | This is a follow-up to r281419. llvm-svn: 281421
* [ObjCARC] Traverse chain downwards to replace uses of argument passed toAkira Hatanaka2016-09-131-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ObjC library call with call return. ARC contraction tries to replace uses of an argument passed to an objective-c library call with the call return value. For example, in the following IR, it replaces uses of argument %9 and uses of the values discovered traversing the chain upwards (%7 and %8) with the call return %10, if they are dominated by the call to @objc_autoreleaseReturnValue. This transformation enables code-gen to tail-call the call to @objc_autoreleaseReturnValue, which is necessary to enable auto release return value optimization. %7 = tail call i8* @objc_loadWeakRetained(i8** %6) %8 = bitcast i8* %7 to %0* %9 = bitcast %0* %8 to i8* %10 = tail call i8* @objc_autoreleaseReturnValue(i8* %9) ret %0* %8 Since r276727, llvm started removing redundant bitcasts and as a result started feeding the following IR to ARC contraction: %7 = tail call i8* @objc_loadWeakRetained(i8** %6) %8 = bitcast i8* %7 to %0* %9 = tail call i8* @objc_autoreleaseReturnValue(i8* %7) ret %0* %8 ARC contraction no longer does the optimization described above since it only traverses the chain upwards and fails to recognize that the function return can be replaced by the call return. This commit changes ARC contraction to traverse the chain downwards too and replace uses of bitcasts with the call return. rdar://problem/28011339 Differential Revision: https://reviews.llvm.org/D24523 llvm-svn: 281419
* [CodeGen] Fix invalid shift in mul expansionPawel Bylica2016-09-131-6/+11
| | | | | | | | | | | | Summary: When expanding mul in type legalization make sure the type for shift amount can actually fit the value. This fixes PR30354 https://llvm.org/bugs/show_bug.cgi?id=30354. Reviewers: hfinkel, majnemer, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: https://reviews.llvm.org/D24478 llvm-svn: 281403
* [DAG] Allow build-to-shuffle combine to combine builds from two wide vectors.Michael Kuperstein2016-09-131-27/+53
| | | | | | | | | | | This allows us to, in some cases, create a vector_shuffle out of a build_vector, when the inputs to the build are extract_elements from two different vectors, at least one of which is wider than the output. (E.g. a <8 x i16> being constructed out of elements from a <16 x i16> and a <8 x i16>). Differential Revision: https://reviews.llvm.org/D24491 llvm-svn: 281402
* Next set of additional error checks for invalid Mach-O files for bad load ↵Kevin Enderby2016-09-131-7/+82
| | | | | | | | | | | | | commands that use the Mach::dyld_info_command type for the load commands that are currently use in the MachOObjectFile constructor. This contains the missing checks for LC_DYLD_INFO and LC_DYLD_INFO_ONLY load commands and the fields for the Mach::dyld_info_command type. llvm-svn: 281400
* [Hexagon] Better handling of HVX vector loweringKrzysztof Parzyszek2016-09-132-4/+17
| | | | | | | - Expand SELECT_CC and BR_CC for vector types. - Implement TLI::isShuffleMaskLegal. llvm-svn: 281397
* Reapply "InstCombine: Reduce trunc (shl x, K) width."Matt Arsenault2016-09-131-7/+25
| | | | | | | This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
* AArch64: Cleanup tailcall CC check, enable swiftcc.Matthias Braun2016-09-132-14/+20
| | | | | | | | | | | | | Cleanup/change the code that checks for possible tailcall conventions to look the same as the one in the X86 target. This makes the distinction between calling conventions that can guarnatee tailcalls and the ones that may tailcall more obvious. - Add Swift to the mayTailCall list - PreserveMost seemed to be incorrectly part of the guarnteed tail call list, move it to the mayTailCall list. llvm-svn: 281376
* AMDGPU: Remove code I think is deadMatt Arsenault2016-09-131-27/+3
| | | | | | | | As far as I can tell, resolveFrameIndex is supposed to be called with a legal offset, so inserting an add shouldn't be necessary. llvm-svn: 281372
* AMDGPU: Support commuting a FrameIndex operandMatt Arsenault2016-09-132-9/+26
| | | | llvm-svn: 281369
* [LV] Clean up uniform induction variable analysis (NFC)Matthew Simpson2016-09-131-23/+31
| | | | llvm-svn: 281368
* [LTO] Don't pass SF_Undefined symbols to the IRmover.Davide Italiano2016-09-131-0/+2
| | | | | | This should fix PR 30363. llvm-svn: 281366
* [DAGCombiner] Use APInt directly in (shl (zext (srl x, C)), C) combine range ↵Simon Pilgrim2016-09-131-2/+2
| | | | | | | | | | test To avoid assertion, we must ensure that the inner shift constant is within range before calling ConstantSDNode::getZExtValue(). We already know that the outer shift constant is in range. Followup to D23007 llvm-svn: 281362
* Revert r281336 (and r281337), it caused PR30372.Nico Weber2016-09-1310-253/+352
| | | | llvm-svn: 281361
* [Myriad]: set LeonCASA processor featureDouglas Katzman2016-09-131-6/+6
| | | | llvm-svn: 281359
* [DAGCombiner] Use APInt directly in (shl (ext (shl x, c1)), c2) combineSimon Pilgrim2016-09-131-11/+15
| | | | | | | | Fix failure to detect out of range shift constants leading to assert in ConstantSDNode::getZExtValue() Followup to D23007 llvm-svn: 281354
* Fix misleading comment for getOrEnforceKnownAlignmentMatt Arsenault2016-09-131-4/+0
| | | | | | | It does not return 0 to indicate failure, and returns the known alignment. llvm-svn: 281350
* [ConstantFold] Improve the bitcast folding logic for constant vectors.Andrea Di Biagio2016-09-131-2/+13
| | | | | | | | | | | | | | | | | | | | The constant folder didn't know how to always fold bitcasts of constant integer vectors. In particular, it was unable to handle the case where a constant vector had some undef elements, and the resulting (i.e. bitcasted) vector type had more elements than the original vector type. Example: %cast = bitcast <2 x i64><i64 undef, i64 2> to <4 x i32> On a little endian target, %cast could have been folded to: <4 x i32><i32 undef, i32 undef, i32 2, i32 0> This patch improves the folding logic by teaching how to correctly propagate undef elements in the folded vector. Differential Revision: https://reviews.llvm.org/D24301 llvm-svn: 281343
* [Hexagon] Clear the flow queue after visiting a single instructionKrzysztof Parzyszek2016-09-131-0/+5
| | | | llvm-svn: 281339
* Apply Clang-format to MCAsmParser.cpp NFC.Nirav Dave2016-09-131-1/+2
| | | | llvm-svn: 281337
* Defer asm errors to post-statement failureNirav Dave2016-09-1310-352/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recommitting after fixing AsmParser Initialization. Allow errors to be deferred and emitted as part of clean up to simplify and shorten Assembly parser code. This will allow error messages to be emitted in helper functions and be modified by the caller which has better context. As part of this many minor cleanups to the Parser: * Unify parser cleanup on error * Add Workaround for incorrect return values in ParseDirective instances * Tighten checks on error-signifying return values for parser functions and fix in-tree TargetParsers to be more consistent with the changes. * Fix AArch64 test cases checking for spurious error messages that are now fixed. These changes should be backwards compatible with current Target Parsers so long as the error status are correctly returned in appropriate functions. Reviewers: rnk, majnemer Subscribers: aemerson, jyknight, llvm-commits Differential Revision: https://reviews.llvm.org/D24047 llvm-svn: 281336
* [LoopInterchange] Minor refactor. NFC.Chad Rosier2016-09-131-12/+11
| | | | llvm-svn: 281334
* Don't use else if after return. Tidy comments. NFC.Chad Rosier2016-09-131-5/+3
| | | | llvm-svn: 281331
* Typo. NFC.Chad Rosier2016-09-131-3/+3
| | | | llvm-svn: 281330
* [LoopInterchange] Tidy up and remove unnecessary dyn_casts. NFC.Chad Rosier2016-09-131-13/+12
| | | | llvm-svn: 281328
* Revert "[ARM] Promote small global constants to constant pools"James Molloy2016-09-134-144/+1
| | | | | | This reverts commit r281314. Speculatively revert as it's possible this caused linker errors: http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/19656 llvm-svn: 281327
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