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* Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"Bill Wendling2008-11-213-7/+14
| | | | | | | because the boolean it returns to indicate an overflow may not be treated like as a flag. It could be stored to memory, for instance. llvm-svn: 59780
* Implement the sadd_with_overflow intrinsic. This is converted intoBill Wendling2008-11-213-2/+56
| | | | | | | | "ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the addition and then checks if the result is less than one of the operands. (If it is, then there was an overflow.) llvm-svn: 59779
* Fix unused variable warnings.Devang Patel2008-11-211-0/+2
| | | | llvm-svn: 59778
* Use ComputeLatency in the MachineInstr scheduler.Dan Gohman2008-11-212-0/+4
| | | | llvm-svn: 59777
* Remove the CycleBound computation code from the ScheduleDAGRRListDan Gohman2008-11-211-58/+5
| | | | | | | | | | | | | schedulers. This doesn't have much immediate impact because targets that use these schedulers by default don't yet provide pipeline information. This code also didn't have the benefit of register pressure information. Also, removing it will avoid problems with list-burr suddenly starting to do latency-oriented scheduling on x86 when we start providing pipeline data, which would increase spilling. llvm-svn: 59775
* Implement ComputeLatency for MachineInstr ScheduleDAGs. FactorDan Gohman2008-11-212-8/+19
| | | | | | | | some of the latency computation logic out of the SDNode ScheduleDAG code into a TargetInstrItineraries helper method to help with this. llvm-svn: 59761
* Add UADDO and SADDO nodes. These will be used for determining an overflowBill Wendling2008-11-211-0/+2
| | | | | | condition in an addition operation. llvm-svn: 59760
* Change these schedulers to not emit no-ops. It turns out thatDan Gohman2008-11-212-9/+3
| | | | | | | | | the RR scheduler actually does look at latency values, but it doesn't use a hazard recognizer so it has no way to know when a no-op is needed, as opposed to just stalling and incrementing the cycle count. llvm-svn: 59759
* Fix error where it wasn't getting the correct caller function.Bill Wendling2008-11-211-1/+2
| | | | llvm-svn: 59758
* If the function being inlined has a higher stack protection level than theBill Wendling2008-11-211-0/+9
| | | | | | | inlining function, then increase the stack protection level on the inlining function. llvm-svn: 59757
* Treat mid-block labels the same as terminators when building theDan Gohman2008-11-201-1/+1
| | | | | | | | | | MachineInstr scheduling DAG, meaning they implicitly depend on all preceding defs. This fixes Benchmarks/Shootout-C++/except and Regression/C++/EH/simple_rethrow in -relocation-model=pic -disable-post-RA-scheduler=false mode. llvm-svn: 59747
* Add another machine-code printing pass when post-pass scheduling is run.Dan Gohman2008-11-201-1/+5
| | | | llvm-svn: 59746
* Don't forget arguments!Devang Patel2008-11-201-1/+6
| | | | llvm-svn: 59745
* CellSPU:Scott Michel2008-11-202-6/+5
| | | | | | | | (a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. llvm-svn: 59734
* Add some documentation.Duncan Sands2008-11-201-1/+28
| | | | llvm-svn: 59727
* Allow XMM2 and XMM3 to be used for non ABI compliant code.Mon P Wang2008-11-201-3/+4
| | | | llvm-svn: 59720
* 80-column violation.Bill Wendling2008-11-201-2/+4
| | | | llvm-svn: 59718
* CellSPU: Custom lower truncating stores of i8 to i1 (should not have beenScott Michel2008-11-202-3/+4
| | | | | | promote), fix signed conversion of indexed offsets. llvm-svn: 59707
* undef beats zero. Fix this missed optimization opportunity. Patch by Matt Elder!Nick Lewycky2008-11-201-1/+1
| | | | llvm-svn: 59705
* CellSPU: Adjust spacing/tabulationScott Michel2008-11-201-8/+8
| | | | llvm-svn: 59703
* Remove a remnant of list-burr's fast mode.Dan Gohman2008-11-201-20/+0
| | | | llvm-svn: 59702
* Factor out the SethiUllman numbering logic from the list-burr andDan Gohman2008-11-201-159/+47
| | | | | | list-tdrr schedulers into a common base class. llvm-svn: 59701
* Remove the "fast" form of the list-burr scheduler, and use theDan Gohman2008-11-202-74/+15
| | | | | | | | | dedicated "fast" scheduler in -fast mode instead, which is faster. This speeds up llc -fast by a few percent on some testcases -- the speedup only happens for code not handled by fast-isel. llvm-svn: 59700
* Facter AddPseudoTwoAddrDeps and associated infrasructure out ofDan Gohman2008-11-201-43/+60
| | | | | | | the list-burr scheduler so that it can be used by the list-tdrr scheduler too. llvm-svn: 59698
* - Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng2008-11-201-32/+62
| | | | | | | | | the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. llvm-svn: 59697
* Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.Evan Cheng2008-11-201-3/+1
| | | | llvm-svn: 59696
* Add #include <climits> to get the definition of INT_MAX.Dan Gohman2008-11-201-0/+1
| | | | llvm-svn: 59692
* Factor out the code for verifying the work of the scheduler,Dan Gohman2008-11-204-87/+58
| | | | | | | extend it a bit, and make use of it in all schedulers, to ensure consistent checking. llvm-svn: 59689
* Do not forget llvm.dbg.declare's first argument while removing debugging ↵Devang Patel2008-11-201-4/+12
| | | | | | information. llvm-svn: 59688
* Simplify this code a little. In the fast scheduler, CreateNewSUnitDan Gohman2008-11-191-17/+5
| | | | | | and CreateClone don't add any extra value. llvm-svn: 59679
* Eliminate a compile time warning.Evan Cheng2008-11-191-4/+6
| | | | llvm-svn: 59678
* Eliminate a compile time warning.Evan Cheng2008-11-191-4/+6
| | | | llvm-svn: 59677
* Experimental post-pass scheduling support. Post-pass schedulingDan Gohman2008-11-1919-826/+1014
| | | | | | | | | | | | | | | | | is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. llvm-svn: 59676
* Move the code for printing a graph node label for an SUnit intoDan Gohman2008-11-192-22/+19
| | | | | | a virtual method of SelectionDAG. llvm-svn: 59667
* Convert SUnit's dump method into a print method and implementDan Gohman2008-11-191-6/+10
| | | | | | dump in terms of it. llvm-svn: 59665
* CMake: Removed source file.Oscar Fuentes2008-11-191-1/+0
| | | | llvm-svn: 59662
* Do not use separate utility to walk all instructions and remove dead dbg ↵Devang Patel2008-11-191-60/+0
| | | | | | intrinsics. Let instcombiner do this job. llvm-svn: 59659
* Let instcombiner remove redundant dbg intrinsics.Devang Patel2008-11-191-7/+1
| | | | llvm-svn: 59658
* If there are two consecutive llvm.dbg.stoppoint calls thenDevang Patel2008-11-191-1/+16
| | | | | | | it is likely that the optimizer deleted code in between these two intrinsics. Keep only the last llvm.dbg.stoppoint in this case. llvm-svn: 59657
* CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt.Oscar Fuentes2008-11-191-1/+0
| | | | llvm-svn: 59655
* CellSPU: Do not custom lower i1 stores, rely on type legalization to do theScott Michel2008-11-191-34/+11
| | | | | | right thing and promote the store to i8. llvm-svn: 59648
* <rdar://problem/6351057>Stuart Hastings2008-11-191-10/+12
| | | | | | | Discourage (allocate last) use of x86_64 R12 and R13 due to their longer instruction encodings. llvm-svn: 59644
* Temporary check-in for Duncan to demonstrate CellSPU store problem.Scott Michel2008-11-191-8/+41
| | | | llvm-svn: 59637
* Fix compilation error on MSVC.Argyrios Kyrtzidis2008-11-191-1/+1
| | | | llvm-svn: 59629
* Forgot to add this in the previous commit.Sanjiv Gupta2008-11-191-0/+62
| | | | llvm-svn: 59623
* Fixed build warnings.Sanjiv Gupta2008-11-192-4/+6
| | | | llvm-svn: 59621
* Added a more function PIC16 backend. However to get this working a patch inSanjiv Gupta2008-11-1923-2307/+1579
| | | | | | ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. llvm-svn: 59617
* Use stripPointerCasts when checking for AllocaInsts for the stackprotector ↵Bill Wendling2008-11-191-1/+1
| | | | | | intrinsic. llvm-svn: 59614
* Add support for rematerialization in pre-alloc-splitting.Owen Anderson2008-11-191-3/+95
| | | | llvm-svn: 59587
* Rearrange code to reduce the nesting level. No functionality change.Dan Gohman2008-11-191-36/+36
| | | | llvm-svn: 59580
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