| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
|
|
|
|
| |
for the port.
Part of rdar://9643582
llvm-svn: 134085
|
| |
|
|
|
|
| |
Part of rdar://9643582
llvm-svn: 134084
|
| |
|
|
|
|
| |
Part of rdar://9643582
llvm-svn: 134083
|
| |
|
|
|
|
|
|
| |
getRegForInlineAsmConstraint.
Part of rdar://9643582
llvm-svn: 134080
|
| |
|
|
|
|
|
|
| |
via vectors.
Part of rdar://9643582
llvm-svn: 134079
|
| |
|
|
|
|
| |
lifetime intrinsics" due to buildbot failures.
llvm-svn: 134071
|
| |
|
|
|
|
|
|
|
| |
For example, ".byte 256" would previously assert() when emitting an object
file. Now it generates a diagnostic that the literal value is out of range.
rdar://9686950
llvm-svn: 134069
|
| |
|
|
| |
llvm-svn: 134067
|
| |
|
|
| |
llvm-svn: 134057
|
| |
|
|
| |
llvm-svn: 134055
|
| |
|
|
|
|
| |
mean they can be removed.
llvm-svn: 134054
|
| |
|
|
|
|
| |
miscompile.
llvm-svn: 134053
|
| |
|
|
|
|
| |
MCInstrItineraries) into MC.
llvm-svn: 134049
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.
The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.
It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.
llvm-svn: 134047
|
| |
|
|
| |
llvm-svn: 134030
|
| |
|
|
| |
llvm-svn: 134027
|
| |
|
|
| |
llvm-svn: 134026
|
| |
|
|
| |
llvm-svn: 134024
|
| |
|
|
|
|
|
|
| |
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Drop the FpMov instructions, use plain COPY instead.
Drop the FpSET/GET instruction for accessing fixed stack positions.
Instead use normal COPY to/from ST registers around inline assembly, and
provide a single new FpPOP_RETVAL instruction that can access the return
value(s) from a call. This is still necessary since you cannot tell from
the CALL instruction alone if it returns anything on the FP stack. Teach
fast isel to use this.
This provides a much more robust way of handling fixed stack registers -
we can tolerate arbitrary FP stack instructions inserted around calls
and inline assembly. Live range splitting could sometimes break x87 code
by inserting spill code in unfortunate places.
As a bonus we handle floating point inline assembly correctly now.
llvm-svn: 134018
|
| |
|
|
| |
llvm-svn: 134014
|
| |
|
|
| |
llvm-svn: 134013
|
| |
|
|
| |
llvm-svn: 134010
|
| |
|
|
| |
llvm-svn: 134005
|
| |
|
|
|
|
| |
avoid getting embedded trailing null bytes in std::strings.
llvm-svn: 133999
|
| |
|
|
| |
llvm-svn: 133995
|
| |
|
|
| |
llvm-svn: 133992
|
| |
|
|
| |
llvm-svn: 133991
|
| |
|
|
| |
llvm-svn: 133990
|
| |
|
|
| |
llvm-svn: 133989
|
| |
|
|
| |
llvm-svn: 133988
|
| |
|
|
|
|
| |
evaluates all other IV exprs.
llvm-svn: 133982
|
| |
|
|
| |
llvm-svn: 133981
|
| |
|
|
| |
llvm-svn: 133978
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.
For example, the following two instructions are equivalent:
and r1, #ff
and r1, r1, #ff
rdar://9672867
llvm-svn: 133973
|
| |
|
|
| |
llvm-svn: 133967
|
| |
|
|
|
|
|
|
|
|
|
| |
Correctly parse the forms of the Thumb mov-immediate instruction:
1. 8-bit immediate 0-255.
2. 12-bit shifted-immediate.
The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic,
but is not yet supported. More parser logic necessary there due to fixups.
llvm-svn: 133966
|
| |
|
|
|
|
| |
can split live ranges.
llvm-svn: 133962
|
| |
|
|
|
|
| |
a bit more control over the order SCEVs are evaluated.
llvm-svn: 133959
|
| |
|
|
|
|
| |
at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
llvm-svn: 133953
|
| |
|
|
| |
llvm-svn: 133946
|
| |
|
|
|
|
|
| |
Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet)
encode the instruction properly, but this gets the parsing part.
llvm-svn: 133945
|
| |
|
|
| |
llvm-svn: 133944
|
| |
|
|
| |
llvm-svn: 133939
|
| |
|
|
| |
llvm-svn: 133938
|
| |
|
|
| |
llvm-svn: 133936
|
| |
|
|
|
|
|
|
|
| |
Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple
writeback instructions w/ SP as the base pointer.
rdar://9683231
llvm-svn: 133932
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
When the destination operand is the same as the first source register
operand for arithmetic instructions, the destination operand may be omitted.
For example, the following two instructions are equivalent:
sub r2, r2, #6
sub r2, #6
rdar://9682597
llvm-svn: 133925
|
| |
|
|
|
|
| |
getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.
llvm-svn: 133923
|
| |
|
|
|
|
| |
into XXXGenRegisterInfo.inc.
llvm-svn: 133922
|