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* ARM NEON relax parse time diagnostics for alignment specifiers.Jim Grosbach2011-12-193-9/+11
| | | | | | | There's more variation that we need to handle. Error checking will need to be on operand predicates. llvm-svn: 146884
* Tidy up.Jim Grosbach2011-12-191-7/+7
| | | | llvm-svn: 146882
* Remove a register class that can just as well be synthesized.Jakob Stoklund Olesen2011-12-191-8/+0
| | | | | | | Add the new TableGen register class synthesizer feature to the release notes. llvm-svn: 146875
* Handle sub-register operands in recomputeRegClass().Jakob Stoklund Olesen2011-12-191-4/+6
| | | | | | | | | | | Now that getMatchingSuperRegClass() returns accurate results, it can be used to compute constraints imposed by instructions using a sub-register of a virtual register. This means we can recompute the register class of any virtual register by combining the constraints from all its uses. llvm-svn: 146874
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-194-226/+6
| | | | | | | | | Use information computed while inferring new register classes to emit accurate, table-driven implementations of getMatchingSuperRegClass(). Delete the old manual, error-prone implementations in the targets. llvm-svn: 146873
* - Use getExitingBlock instead of getExitingBlocks.Jakub Staszak2011-12-181-13/+11
| | | | | | - Remove trailing spaces. llvm-svn: 146854
* Another variadics tweak.Benjamin Kramer2011-12-181-4/+3
| | | | llvm-svn: 146852
* Allow inlining of functions with returns_twice calls, if they have theJoerg Sonnenberger2011-12-183-8/+10
| | | | | | attribute themselve. llvm-svn: 146851
* Use the fancy new VariadicFunction template instead of a plain variadic ↵Benjamin Kramer2011-12-181-34/+33
| | | | | | | | function. Some compilers were complaining about passing StringRef to it. llvm-svn: 146850
* Hexagon: Remove unused variables.Benjamin Kramer2011-12-182-13/+0
| | | | llvm-svn: 146846
* Revert 146728 as it's causing failures on some of the external bots as well as Chad Rosier2011-12-171-25/+0
| | | | | | | | | | | internal nightly testers. Original commit message: By popular demand, link up types by name if they are isomorphic and one is an autorenamed version of the other. This makes the IR easier to read, because we don't end up with random renamed versions of the types after LTO'ing a large app. llvm-svn: 146838
* Revert r146822 at Pete Cooper's request as it broke clang self hosting.Kevin Enderby2011-12-171-42/+0
| | | | | | Hope I did this correctly :) llvm-svn: 146834
* Remove an unused X86ISD node type.Craig Topper2011-12-173-3/+0
| | | | llvm-svn: 146833
* X86: Factor the bswap asm matching to be slightly less horrible to read.Benjamin Kramer2011-12-171-74/+63
| | | | llvm-svn: 146831
* SimplifyCFG now predicts some conditional branches to true or false ↵Pete Cooper2011-12-171-0/+42
| | | | | | | | | | | | | depending on previous branch on same comparison operands. For example, if (a == b) { if (a > b) // this is false Fixes some of the issues on <rdar://problem/10554090> llvm-svn: 146822
* Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle.Evan Cheng2011-12-171-4/+7
| | | | llvm-svn: 146805
* Refactor code used in InstCombine::FoldAndOfICmps to new file.Pete Cooper2011-12-173-72/+109
| | | | | | This will be used by SimplifyCfg in a later commit. llvm-svn: 146803
* Add back the MC bits of 126425. Original patch by Nathan Jeffords. I added theRafael Espindola2011-12-1710-4/+58
| | | | | | asm parsing and testcase. llvm-svn: 146801
* Make sure that the lower bits on the VSELECT condition are properly set.Lang Hames2011-12-171-23/+29
| | | | llvm-svn: 146800
* Preserve more memory operands in ARMExpandPseudo.Jakob Stoklund Olesen2011-12-171-0/+4
| | | | | | I don't think this affects anything but verbose assembly. llvm-svn: 146787
* The powers that be have decided that LLVM IR should now support 16-bitDan Gohman2011-12-1713-37/+92
| | | | | | | | "half precision" floating-point with a first-class type. This patch adds basic IR support (but not codegen support). llvm-svn: 146786
* When recursing for the original size of a type, stop if we are at aEric Christopher2011-12-161-1/+7
| | | | | | | | | pointer or a reference type - we actually just want the size of the pointer then for that. Fixes rdar://10335756 llvm-svn: 146785
* Resolve part of a fixme and add a new one.Eric Christopher2011-12-161-2/+5
| | | | llvm-svn: 146784
* Add a fixme here.Eric Christopher2011-12-161-0/+1
| | | | llvm-svn: 146783
* Extraneous whitespace and 80-col.Eric Christopher2011-12-161-3/+2
| | | | llvm-svn: 146780
* Fix off-by-one error in bucket sort.Jakob Stoklund Olesen2011-12-161-1/+1
| | | | | | | | | The bad sorting caused a misaligned basic block when building 176.vpr in ARM mode. <rdar://problem/10594653> llvm-svn: 146767
* APInt: update asserts for base-36Dylan Noblesmith2011-12-161-1/+5
| | | | | | | | Hexatridecimal was added in r139695. And fix the unittest that now triggers the assert. llvm-svn: 146754
* Don't adjust for alignment padding in OffsetIsInRange.Jakob Stoklund Olesen2011-12-161-16/+1
| | | | | | | | | | | This adjustment is already included in the block offsets computed by BasicBlockInfo, and adjusting again here can cause the pass to loop. When CreateNewWater splits a basic block, OffsetIsInRange would reject the new CPE on the next pass because of the too conservative alignment adjustment. This caused the block to be split again, and so on. llvm-svn: 146751
* Hexagon: Fix a nasty order-of-initialization bug.Benjamin Kramer2011-12-162-2/+2
| | | | | | Reenable the tests. llvm-svn: 146750
* In DICompositeType, referenced to derived type is either metadata or null.Devang Patel2011-12-161-5/+5
| | | | llvm-svn: 146744
* Note ARM constant island alignment in the release notes.Jakob Stoklund Olesen2011-12-161-0/+1
| | | | | | | | The command line option should be removed, but not until the feature has gotten a lot of testing. The ARMConstantIslandPass tends to have subtle bugs that only show up after a while. llvm-svn: 146739
* Adds a JSON parser and a benchmark (json-bench) to catch performance ↵Manuel Klimek2011-12-162-0/+222
| | | | | | regressions. llvm-svn: 146735
* By popular demand, link up types by name if they are isomorphic and one is anChris Lattner2011-12-161-0/+25
| | | | | | | autorenamed version of the other. This makes the IR easier to read, because we don't end up with random renamed versions of the types after LTO'ing a large app. llvm-svn: 146728
* Don't try to match 'unpackl/h v, v' for 32xi8 and 16xi16 when only AVX1 is ↵Craig Topper2011-12-162-48/+58
| | | | | | supported. Fix 'unpackh v, v' for 256-bit types to understand 128-bit lanes. llvm-svn: 146726
* Target/Hexagon: Fix CMake build.NAKAMURA Takumi2011-12-161-1/+0
| | | | llvm-svn: 146724
* Avoid a confusing assert for silly options: -unroll-runtime -unroll-count=1.Andrew Trick2011-12-161-0/+5
| | | | | | No need for an explicit test case for an unsupported combination of options. llvm-svn: 146721
* ARM NEON aliases for vmovq.f*Jim Grosbach2011-12-161-0/+4
| | | | llvm-svn: 146714
* Thumb2 ADR assembly parsing w/o the .w suffix.Jim Grosbach2011-12-151-0/+4
| | | | llvm-svn: 146710
* Make sure we correctly note the existence of an i8 immediate for vblendvps ↵Eli Friedman2011-12-152-3/+3
| | | | | | and friends, so we compute fixups correctly. PR11586. llvm-svn: 146709
* Move parts of lib/Target that use CodeGen into lib/CodeGen.Nick Lewycky2011-12-156-33/+34
| | | | llvm-svn: 146702
* Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a ↵Eli Friedman2011-12-151-1/+1
| | | | | | value that isn't a 32-bit value. (This is just to be safe; I don't think this actually causes any issues in practice.) llvm-svn: 146700
* ARM NEON VCLE is an alias for VCGE w/ the source operands reversed.Jim Grosbach2011-12-151-0/+32
| | | | llvm-svn: 146699
* [asan] add the name of the module to the description of a global variable. ↵Kostya Serebryany2011-12-151-1/+5
| | | | | | This improves the readability of global-buffer-overflow reports. llvm-svn: 146698
* Add MCTargetDesc library to Hexagon targetTony Linthicum2011-12-1515-30/+186
| | | | llvm-svn: 146692
* ARM NEON VTBL/VTBX assembly parsing and encoding.Jim Grosbach2011-12-153-30/+23
| | | | llvm-svn: 146691
* Enable proper constant island alignment by default.Jakob Stoklund Olesen2011-12-151-1/+1
| | | | | | | The code size increase is tiny (< 0.05%) because so little code uses 16-byte constant pool entries. llvm-svn: 146690
* Add missing zmovl AVX patterns which were causing crashes.Chad Rosier2011-12-151-0/+6
| | | | | | Patch by Elena Demikhovsky <elena.demikhovsky@intel.com>! llvm-svn: 146689
* [asan] fix a bug (issue 19) where dlclose and the following mmap caused a ↵Kostya Serebryany2011-12-152-5/+32
| | | | | | false positive. compiler part. llvm-svn: 146688
* Silence warning.Jim Grosbach2011-12-151-1/+1
| | | | llvm-svn: 146686
* ARM NEON two-register double spaced register list parsing support.Jim Grosbach2011-12-151-14/+49
| | | | llvm-svn: 146685
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