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* Adjust to changes in getRegForInlineAsmConstraint prototypeChris Lattner2006-02-211-18/+18
| | | | llvm-svn: 26306
* Updates to match change of getRegForInlineAsmConstraint prototypeChris Lattner2006-02-215-7/+12
| | | | llvm-svn: 26305
* One more round of reorg so sabre doesn't freak out. :-)Evan Cheng2006-02-214-221/+239
| | | | llvm-svn: 26303
* A big more cleaning up.Evan Cheng2006-02-212-23/+18
| | | | llvm-svn: 26302
* Moving things to their proper places.Evan Cheng2006-02-213-303/+303
| | | | llvm-svn: 26301
* Split instruction info into multiple files, one for each of x87, MMX, and SSE.Evan Cheng2006-02-214-590/+644
| | | | llvm-svn: 26300
* missed optznChris Lattner2006-02-211-0/+11
| | | | llvm-svn: 26299
* The HasNoV9 hack isn't needed here, now that tblgen knows that ↵Chris Lattner2006-02-211-3/+2
| | | | | | | | CustomDAGSchedInserter instructions are expensive. llvm-svn: 26298
* Added separate alias instructions for SSE logical ops that operate on ↵Evan Cheng2006-02-211-96/+171
| | | | | | non-packed types. llvm-svn: 26297
* Added MMX and XMM packed integer move instructions, movd and movq.Evan Cheng2006-02-211-0/+46
| | | | llvm-svn: 26296
* Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.Evan Cheng2006-02-212-9/+27
| | | | | | Added generic vector types: VR64 and VR128. llvm-svn: 26295
* Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bitEvan Cheng2006-02-205-26/+49
| | | | | | packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32). llvm-svn: 26294
* Some updatesEvan Cheng2006-02-201-9/+31
| | | | llvm-svn: 26292
* Fix a problem Nate and Duraid reported where simplifying nodes can causeChris Lattner2006-02-201-4/+8
| | | | | | | them to get ressurected, in which case, deleting the undead nodes is unfriendly. llvm-svn: 26291
* Fix a problem on itanium with memset. The value to set has been promoted toChris Lattner2006-02-201-2/+6
| | | | | | i64 before this code, so zero_ext doesn't work. llvm-svn: 26290
* improved support for branch folding, still not enabled.Chris Lattner2006-02-181-143/+269
| | | | llvm-svn: 26289
* If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to takeEvan Cheng2006-02-181-1/+2
| | | | | | advantage of fisttpll. llvm-svn: 26288
* Fix bugs identified by VC++.Jeff Cohen2006-02-181-2/+2
| | | | llvm-svn: 26287
* Add a fold for add that exchanges it with a constant shift if possible, soNate Begeman2006-02-181-6/+24
| | | | | | that the shift may be more easily folded into other operations. llvm-svn: 26286
* Implement deletion of dead blocks, currently disabled.Chris Lattner2006-02-181-28/+75
| | | | llvm-svn: 26285
* Add checks to make sure we don't create bogus extend nodes, and fix a bugNate Begeman2006-02-182-4/+14
| | | | | | | where we were doing exactly that which was causing failures on x86 and alpha. llvm-svn: 26284
* Added fisttp for fp to int conversion.Evan Cheng2006-02-182-3/+29
| | | | llvm-svn: 26283
* Disable PIC for JIT.Evan Cheng2006-02-181-0/+3
| | | | llvm-svn: 26281
* a previous patch completely disabled trivial unswitching, this fixees it.Chris Lattner2006-02-181-1/+0
| | | | | | Thanks to nate for pointing this out :) llvm-svn: 26280
* initial trivial support for folding branches that have now-constant ↵Chris Lattner2006-02-181-3/+34
| | | | | | destinations. llvm-svn: 26279
* Jit does not support PIC yet.Evan Cheng2006-02-181-0/+2
| | | | llvm-svn: 26278
* When unswitching a loop, make sure to update loop info with exit blocks inChris Lattner2006-02-181-2/+4
| | | | | | the right loop. llvm-svn: 26277
* Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.llChris Lattner2006-02-181-2/+8
| | | | llvm-svn: 26275
* x86 / Darwin PIC support.Evan Cheng2006-02-1810-36/+143
| | | | llvm-svn: 26273
* Moved PICEnabled to include/llvm/Target/TargetOptions.hEvan Cheng2006-02-184-1/+3
| | | | llvm-svn: 26272
* Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn'tChris Lattner2006-02-172-9/+95
| | | | | | | exactly the API we wanted to call into. This fixes the crash on crafty last night. llvm-svn: 26269
* Clean up DemandedBitsAreZero interfaceNate Begeman2006-02-171-22/+26
| | | | | | | Make more use of the new mask helpers in valuetypes.h Combine (sra (srl x, c1), c1) -> sext_inreg if legal llvm-svn: 26263
* Don't expand sdiv by power of two before legalize, since it will likelyNate Begeman2006-02-171-2/+2
| | | | | | generate illegal nodes. llvm-svn: 26261
* unbreak the buildChris Lattner2006-02-171-1/+0
| | | | llvm-svn: 26260
* Unbreak x86 beEvan Cheng2006-02-171-17/+22
| | | | llvm-svn: 26259
* Fix loops where the header has an exit, fixing a loop-unswitch crash on craftyChris Lattner2006-02-171-13/+15
| | | | llvm-svn: 26258
* kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBCNate Begeman2006-02-1711-264/+115
| | | | | | | and SUBE nodes that actually expose what's going on and allow for significant simplifications in the targets. llvm-svn: 26255
* Fix another miscompilation exposed by lencode, where we lowered i64->f32Chris Lattner2006-02-171-1/+1
| | | | | | | conversions to __floatdidf instead of __floatdisf on targets that support f32 but not i64 (e.g. sparc). llvm-svn: 26254
* add note about div by power of 2Chris Lattner2006-02-171-0/+32
| | | | llvm-svn: 26253
* Fix bug noticed by VC++.Jeff Cohen2006-02-171-2/+2
| | | | llvm-svn: 26252
* Whoops, didn't mean to check this in yet.Nate Begeman2006-02-171-8/+0
| | | | llvm-svn: 26250
* Add a missing and useful pat fragNate Begeman2006-02-171-2/+9
| | | | llvm-svn: 26249
* start of some new simplification code, not thoroughly tested, use at your ownChris Lattner2006-02-171-14/+161
| | | | | | risk :) llvm-svn: 26248
* Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"Evan Cheng2006-02-171-0/+6
| | | | | | issue. Need to do more experiments. llvm-svn: 26247
* Kill the x86 pattern isel. boom.Nate Begeman2006-02-174-3973/+211
| | | | llvm-svn: 26246
* Remove the entry about using movapd for SSE reg-reg moves.Evan Cheng2006-02-171-6/+0
| | | | llvm-svn: 26245
* pxor (for FLD0SS) encoding was missing the OpSize prefix.Evan Cheng2006-02-161-1/+1
| | | | llvm-svn: 26244
* Remove the skeleton target, it doesn't produce useful code and there areChris Lattner2006-02-1614-614/+0
| | | | | | | other small targets that do that can be learned from. They also have the added advantage of being tested :) llvm-svn: 26243
* Dumb bug. Code sees a memcpy from X+c so it increments src offset. But itEvan Cheng2006-02-161-4/+10
| | | | | | | turns out not to point to a constant string but it forgot change the offset back. llvm-svn: 26242
* 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. ThisEvan Cheng2006-02-163-13/+29
| | | | | | | | | | | proves to be worth 20% on Ptrdist/ks. Might be related to dependency breaking support. 2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These are used for FR32 / FR64 reg-to-reg copies. 3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to spill / restore FsMOVAPSrr and FsMOVAPDrr. llvm-svn: 26241
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