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* Enhance the sinking code to handle diamond patterns. Patch byDuncan Sands2012-05-311-75/+69
| | | | | | Carlo Alberto Ferraris. llvm-svn: 157736
* Add intrinsic for pclmulqdq instruction.Craig Topper2012-05-311-15/+13
| | | | llvm-svn: 157731
* Cleanup and factoring of mips16 tablegen classes. Make register classesAkira Hatanaka2012-05-313-61/+89
| | | | | | | | | CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16 jalr instruction. Patch by Reed Kotler. llvm-svn: 157730
* Fix typo in assembly directive. Noticed by inspection.Eric Christopher2012-05-311-1/+1
| | | | llvm-svn: 157726
* Avoid depending on list orders and register numbering.Jakob Stoklund Olesen2012-05-301-6/+9
| | | | | | This code is covered by test/CodeGen/ARM/arm-modifier.ll. llvm-svn: 157720
* Extract some pointer hacking to a function.Jakob Stoklund Olesen2012-05-301-22/+22
| | | | | | Switch to MCSuperRegIterator while we're there. llvm-svn: 157717
* Prioritize smaller register classes for urgent evictions.Jakob Stoklund Olesen2012-05-301-1/+7
| | | | | | | | | | | | | | It helps compile exotic inline asm. In the test case, normal GR32 virtual registers use up eax-edx so the final GR32_ABCD live range has no registers left. Since all the live ranges were tiny, we had no way of prioritizing the smaller register class. This patch allows tiny unspillable live ranges to be evicted by tiny unspillable live ranges from a smaller register class. <rdar://problem/11542429> llvm-svn: 157715
* Add support for the mips inline asm 'm' output modifier.Eric Christopher2012-05-301-0/+5
| | | | | | Patch by Jack Carter. llvm-svn: 157709
* Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson2012-05-301-1/+1
| | | | | | wrote and the usual LLVM convention. llvm-svn: 157708
* Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson2012-05-301-0/+4
| | | | | | operands of an FMA node. llvm-svn: 157707
* Remove extra space.Chad Rosier2012-05-301-1/+1
| | | | llvm-svn: 157706
* Make sure that we're dealing with a binary SCEVExpr when simplifying.Benjamin Kramer2012-05-301-1/+2
| | | | llvm-svn: 157704
* Fix some uses of getSubRegisters() to use getSubReg() instead.Jakob Stoklund Olesen2012-05-303-10/+13
| | | | | | | It is better to address sub-registers directly by name instead of relying on their position in the sub-register list. llvm-svn: 157703
* Remove some redundant tests.Jakob Stoklund Olesen2012-05-301-3/+1
| | | | | | | An empty list is not represented as a null pointer. Let TRI do its own shortcuts. llvm-svn: 157702
* Teach SCEV's icmp simplification logic that a-b == 0 is equivalent to a == b.Benjamin Kramer2012-05-301-1/+20
| | | | | | | | | | | | | | | This also required making recursive simplifications until nothing changes or a hard limit (currently 3) is hit. With the simplification in place indvars can canonicalize loops of the form for (unsigned i = 0; i < a-b; ++i) into for (unsigned i = 0; i != a-b; ++i) which used to fail because SCEV created a weird umax expr for the backedge taken count. llvm-svn: 157701
* it's pointed out that R11 can be used for magic things, and doing things ↵Chris Lattner2012-05-301-1/+1
| | | | | | just for 64-bit registers is silly. Just optimize 3 more. llvm-svn: 157699
* Extend the (abi-irrelevant) return convention to be able to return more than ↵Chris Lattner2012-05-301-4/+7
| | | | | | | | | | | | two values in integer registers. This is already supported by the fastcc convention, but it doesn't hurt to support it in the standard conventions as well. In cases where we can cheat at the calling convention, this allows us to avoid returning things through memory in more cases. llvm-svn: 157698
* [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic.Chad Rosier2012-05-301-0/+36
| | | | | | Patch by Jush Lu <jush.msn@gmail.com>. llvm-svn: 157696
* Port support for SSE4a extrq/insertq to the old jit code emitter.Benjamin Kramer2012-05-301-1/+1
| | | | llvm-svn: 157685
* [asan] instrument cmpxchg and atomicrmwKostya Serebryany2012-05-301-8/+30
| | | | llvm-svn: 157683
* SCEV: Handle a corner case reducing AddRecExpr * AddRecExprAndrew Trick2012-05-301-1/+4
| | | | | | | | | If integer overflow causes one of the terms to reach zero, that can force the entire expression to zero. Fixes PR12929: cast<Ty>() argument of incompatible type llvm-svn: 157673
* Reformat the loop that does AddRecExpr * AddRecExpr reduction.Andrew Trick2012-05-301-55/+56
| | | | | | No functionality. llvm-svn: 157672
* Teach taildup to update livein set. rdar://11538365Evan Cheng2012-05-301-0/+25
| | | | llvm-svn: 157663
* If-converter models predicated defs as read + write. The read should be ↵Evan Cheng2012-05-301-1/+2
| | | | | | marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs. llvm-svn: 157662
* Add an insertPass API to TargetPassConfig. <rdar://problem/11498613>Bob Wilson2012-05-303-0/+49
| | | | | | | | | | Besides adding the new insertPass function, this patch uses it to enhance the existing -print-machineinstrs so that the MachineInstrs after a specific pass can be printed. Patch by Bin Zeng! llvm-svn: 157655
* bounds checking:Nuno Lopes2012-05-291-13/+51
| | | | | | | - hoist checks out of loops where SCEV is smart enough - add additional statistics to measure how much we loose for not supporting interprocedural and pointers loaded from memory llvm-svn: 157649
* Optional def can be either a def or a use (of reg0).Evan Cheng2012-05-291-1/+1
| | | | llvm-svn: 157640
* Add intrinsics, code gen, assembler and disassembler support for the SSE4a ↵Benjamin Kramer2012-05-292-2/+28
| | | | | | | | | | | extrq and insertq instructions. This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. llvm-svn: 157634
* Clear the entering, exiting and internal ranges of a bundle before collectingLang Hames2012-05-291-0/+3
| | | | | | | | | | ranges for the instruction about to be bundled. This fixes a bug in an external project where an assertion was triggered due to spurious 'multiple defs' within the bundle. Patch by Ivan Llopard. Thanks Ivan! llvm-svn: 157632
* Update CPPBackend to new API for AttrListPtr::get.Nicolas Geoffray2012-05-291-1/+1
| | | | llvm-svn: 157624
* ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy2012-05-299-33/+33
| | | | | | IntegersSubsetMapping. llvm-svn: 157612
* Add llvm.fabs intrinsic.Peter Collingbourne2012-05-281-0/+5
| | | | llvm-svn: 157594
* Fix suspicous hasOneUse() check, found by PVS Studio (PR12357).Benjamin Kramer2012-05-281-1/+1
| | | | llvm-svn: 157592
* InstCombine: Fix infinite loop when encountering switch on trivial icmp.Benjamin Kramer2012-05-281-1/+1
| | | | | | | | | | | | The test case feeds the following into InstCombine's visitSelect: %tobool8 = icmp ne i32 0, 0 %phitmp = select i1 %tobool8, i32 3, i32 0 Then instcombine replaces the right side of the switch with 0, doesn't notice that nothing changes and tries again indefinitely. This fixes PR12897. llvm-svn: 157587
* Remove unused variable.David Blaikie2012-05-281-2/+0
| | | | llvm-svn: 157586
* PR12696: Attribute bits above 1<<30 are not encoded in bitcodeMeador Inge2012-05-282-26/+3
| | | | | | | | | Attribute bits above 1<<30 are now encoded correctly. Additionally, the encoding/decoding functionality has been hoisted to helper functions in Attributes.h in an effort to help the encoding/decoding to stay in sync with the Attribute bitcode definitions. llvm-svn: 157581
* Random BitcodeReader cleanups.Benjamin Kramer2012-05-281-49/+25
| | | | llvm-svn: 157577
* PR1255: Case RangesStepan Dyatkovskiy2012-05-288-15/+34
| | | | | | | | | | | | | | | | | | | | | | | | | Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now? 1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst. 2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case. 3. IntItem can be easyly easily replaced with APInt. 4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes. Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code ConstantInt *V = ...; if (V->getValue().ugt(AnotherV->getValue()) { ... } will look awful. Much more better this way: IntItem V = ConstantIntVal->getValue(); if (AnotherV < V) { } Of course any reviews are welcome. P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks). Since in future these classes will founded on APInt, it will possible to use them in more generic ways. llvm-svn: 157576
* Implement the indirect counter increment code in a better way. Instead ofBill Wendling2012-05-281-53/+72
| | | | | | | | replicating the code for every place it's needed, we instead generate a function that does that for us. This function is local to the executable, so there shouldn't be any writing violations. llvm-svn: 157564
* switch AttrListPtr::get to take an ArrayRef, simplifying a lot of clients.Chris Lattner2012-05-287-46/+38
| | | | llvm-svn: 157556
* simplify code.Chris Lattner2012-05-281-3/+2
| | | | llvm-svn: 157555
* PR12967: Don't crash when trying to fold a shift that's larger than the ↵Benjamin Kramer2012-05-271-1/+1
| | | | | | type's size. llvm-svn: 157548
* Reimplement the intrinsic verifier to use the same table as ↵Chris Lattner2012-05-272-266/+107
| | | | | | | | | | | | | Intrinsic::getDefinition, making it stronger and more sane. Delete the code from tblgen that produced the old code. Besides being a path forward in intrinsic sanity, this also eliminates a bunch of machine generated code that was compiled into Function.o llvm-svn: 157545
* Have getOrCreateSubprogramDIE store the DIE for a subprogramPeter Collingbourne2012-05-271-5/+5
| | | | | | | | | definition in the map before calling itself to retrieve the DIE for the declaration. Without this change, if this causes getOrCreateSubprogramDIE to be recursively called on the definition, it will create multiple DIEs for that definition. Fixes PR12831. llvm-svn: 157541
* move some code around so that Verifier.cpp can get access to the intrinsic ↵Chris Lattner2012-05-271-46/+182
| | | | | | info table. llvm-svn: 157540
* enhance the intrinsic info table to encode what *kind* of Any argumentChris Lattner2012-05-271-1/+1
| | | | | | | it is (at the cost of 45 bytes of extra table space) so that the verifier can start using it. llvm-svn: 157536
* Path::GetTemporaryDirectory(): Add an assertion if TempDirectory is alive, ↵NAKAMURA Takumi2012-05-271-1/+3
| | | | | | to check when someone would remove the tempdir. llvm-svn: 157529
* Missed parens.Benjamin Kramer2012-05-271-1/+1
| | | | llvm-svn: 157527
* r157525 didn't work, just disable iterator checking.Benjamin Kramer2012-05-271-1/+1
| | | | | | | This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. llvm-svn: 157526
* SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer2012-05-271-1/+1
| | | | | | vector.begin()-1 is invalid too. llvm-svn: 157525
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