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* Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ↵Jeffrey Yasskin2011-07-1810-32/+41
| | | | | | | | | ambiguity errors like the one corrected by r135261. Migrate all LLVM callers of the old constructor to the new one. llvm-svn: 135431
* Compiler warning.Andrew Trick2011-07-181-3/+3
| | | | llvm-svn: 135426
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-1858-456/+397
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* During bottom up fast-isel, instructions emitted to materalize registers are ↵Devang Patel2011-07-182-0/+24
| | | | | | | | at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. [take 2] llvm-svn: 135423
* indvars: LinearFunctionTestReplace for non-canonical IVs.Andrew Trick2011-07-181-48/+292
| | | | | | | | | | For -disable-iv-rewrite, perform LFTR without generating a new "canonical" induction variable. Instead find the "best" existing induction variable for use in the loop exit test and compute the final value of that IV for use in the new loop exit test. In short, convert to a simple eq/ne exit test as long as it's cheap to do so. llvm-svn: 135420
* Do not treat atomic.load.sub differently than other atomic binary intrinsics.Akira Hatanaka2011-07-181-12/+2
| | | | llvm-svn: 135418
* Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from Akira Hatanaka2011-07-183-85/+23
| | | | | | | | moving them out of the loop. Previously, stores and loads to a stack frame object were inserted to accomplish this. Remove the code that was needed to do this. Patch by Sasa Stankovic. llvm-svn: 135415
* Re-apply r135319 with a fix for the constant island pass.Owen Anderson2011-07-183-48/+29
| | | | | | Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. llvm-svn: 135414
* Fix a crash when building 177.mesa for armv6.Jakob Stoklund Olesen2011-07-181-1/+1
| | | | | | | | | | | | When splitting a live range immediately before an LDR_POST instruction that redefines the address register, make sure to use the correct value number in leaveIntvBefore. We need the value number entering the instruction. <rdar://problem/9793765> llvm-svn: 135413
* indvars: Added verification that LFTR and other indvars goodness doesAndrew Trick2011-07-181-1/+20
| | | | | | not interfere with BackedgeTakenCount computation. llvm-svn: 135412
* indvars: Added isHighCostExpansion. Avoid generating extra ops in theAndrew Trick2011-07-181-17/+51
| | | | | | | preheader for the sole purpose of LFTR, since LFTR itself is usually not a clear optimization. llvm-svn: 135409
* Be more smart with VCVTSS2SD. Also place the patterns close to theBruno Cardoso Lopes2011-07-181-20/+10
| | | | | | definitions. llvm-svn: 135407
* Add AVX 128-bit sqrt versionsBruno Cardoso Lopes2011-07-181-0/+11
| | | | llvm-svn: 135404
* Change destination register operands of SC instructions so that uniqueAkira Hatanaka2011-07-181-8/+13
| | | | | | virtual registers are used. llvm-svn: 135403
* Migrate LLVM and Clang to use the new makeArrayRef(...) functions where ↵Frits van Bommel2011-07-1810-42/+35
| | | | | | | | previously explicit non-default constructors were used. Mostly mechanical with some manual reformatting. llvm-svn: 135390
* Fix PR10387.Jakob Stoklund Olesen2011-07-181-1/+1
| | | | | | | | | | | | | When trying to rematerialize a value before an instruction that has an early-clobber redefine of the virtual register, make sure to look up the correct value number. Early-clobber defs are moved one slot back, so getBaseIndex is needed to find the used value number. Bugpoint was unable to reduce the test case for this, see PR10388. llvm-svn: 135378
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-18149-1624/+1623
| | | | llvm-svn: 135375
* fix a warning in TinyPtrVector, adopt it in SSAUpdater, saving someChris Lattner2011-07-181-3/+3
| | | | | | mallocs. llvm-svn: 135366
* Simplify & microoptimize code. No intended functionality change.Benjamin Kramer2011-07-181-4/+2
| | | | llvm-svn: 135364
* Minor code cleanupsNadav Rotem2011-07-171-7/+6
| | | | llvm-svn: 135362
* tidy upChris Lattner2011-07-171-9/+9
| | | | llvm-svn: 135360
* Silence compiler warnings.Benjamin Kramer2011-07-161-5/+4
| | | | llvm-svn: 135358
* Remove unused LoopRanges from RegAllocGreedy.Jakub Staszak2011-07-161-6/+0
| | | | llvm-svn: 135354
* Remove "LoopInfo.h" include from BranchProbabilityInfo.h.Jakub Staszak2011-07-161-0/+5
| | | | llvm-svn: 135353
* Add MachineBlockFrequency analysis.Jakub Staszak2011-07-162-0/+60
| | | | llvm-svn: 135352
* Revert r135319 in an attempt to get to unbreak testers.Owen Anderson2011-07-162-27/+48
| | | | llvm-svn: 135343
* Silence unused variable warningMatt Beaumont-Gay2011-07-161-0/+1
| | | | llvm-svn: 135339
* indvars: fix a pass-sensitivity issue that would hit the SCEVExpanderAndrew Trick2011-07-161-2/+13
| | | | | | | assertion I added in r135333. Check for the existence of a preheader before expanding a recurrence. llvm-svn: 135335
* indvars: remove ExprToIVMap because it won't be needed by LFTR.Andrew Trick2011-07-161-9/+3
| | | | llvm-svn: 135334
* Fix SCEVEXpander to handle arbitrary phi expansion. Includes twoAndrew Trick2011-07-161-7/+18
| | | | | | | related bug fixes and corresponding assertions for uninitialized data and missing NULL check. Test cases will be included with the new LFTR. llvm-svn: 135333
* Add AVX 128-bit patterns for sint_to_fpBruno Cardoso Lopes2011-07-161-0/+20
| | | | llvm-svn: 135332
* He said *before* the last split point.Jakob Stoklund Olesen2011-07-161-1/+1
| | | | | | | This should unbreak the build-self-4-mingw32 tester. I have a very complicated test case that I will try to clean up. llvm-svn: 135329
* fix rdar://9776316 - type remapping needed for inline asm blobs,Chris Lattner2011-07-151-1/+17
| | | | | | fixing some objc llvm-test crashes with LTO. llvm-svn: 135324
* deconstify getType()'s.Chris Lattner2011-07-151-1/+1
| | | | llvm-svn: 135323
* LegalizeDAG doesn't need its own copy of this enum.Dan Gohman2011-07-151-7/+1
| | | | llvm-svn: 135320
* Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and ↵Owen Anderson2011-07-152-48/+27
| | | | | | tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change. llvm-svn: 135319
* Delete LegalizeDAG's own version of isTypeLegal and getTypeActionDan Gohman2011-07-151-26/+16
| | | | | | and just use the ones from TargetLowering directly. llvm-svn: 135318
* Fix a couple of things:Bruno Cardoso Lopes2011-07-151-61/+52
| | | | | | | | | | | | | | | | | | | | | | | | 1) Make non-legal 256-bit loads to be promoted to v4i64. This lets us canonize the loads and handle things the same way we use to handle for 128-bit registers. Despite of what one of the removed comments explained, the load promotion would not mess with VPERM, it's only a matter of doing the appropriate bitcasts when this instructions comes to be introduced. Also make LOAD v8i32 legal. 2) Doing 1) exposed two bugs: - v4i64 was being promoted to itself for several opcodes (introduced in r124447 by David Greene) causing endless recursion and the stack to explode. - there was no support for allOnes BUILD_VECTORs and ANDNP would fail to match because it was generating early target constant pools during lowering. 3) The testcases are already checked-in, doing 1) exposed the bugs in the current testcases. 4) Tidy up code to be more clear and explicit about AVX. llvm-svn: 135313
* Add a few patterns for 256-bit bitcasts. No testcases now, they areBruno Cardoso Lopes2011-07-151-0/+9
| | | | | | comming together with other tests. llvm-svn: 135312
* Delete an unused variable and a redundant assert.Dan Gohman2011-07-151-9/+1
| | | | llvm-svn: 135311
* Extract parts of RAGreedy::splitAroundRegion as SplitKit methods.Jakob Stoklund Olesen2011-07-153-299/+308
| | | | | | | | | | | This gets rid of some of the gory splitting details in RAGreedy and makes them available to future SplitKit clients. Slightly generalize the functionality to support multi-way splitting. Specifically, SplitEditor::splitLiveThroughBlock() supports switching between different register intervals in a block. llvm-svn: 135307
* Modernize comments.Dan Gohman2011-07-151-7/+4
| | | | llvm-svn: 135305
* PR10370: Make sure we know how to relax push correctly on x86-64.Eli Friedman2011-07-151-0/+3
| | | | llvm-svn: 135303
* Use DebugLoc directly to map inlined functions' instructions to respective ↵Devang Patel2011-07-152-5/+9
| | | | | | lexical scope. llvm-svn: 135302
* Fix pointer heuristic. Check whether predicator is ICMP_NE instead of if it isJakub Staszak2011-07-151-2/+2
| | | | | | not isEquality(). llvm-svn: 135296
* Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ↵Owen Anderson2011-07-155-19/+14
| | | | | | to simplify the path towards an auto-generated disassembler. llvm-svn: 135290
* ObjectFile: Add a method to check whether a section contains a symbol.Benjamin Kramer2011-07-153-0/+37
| | | | | | | - No ELF or COFF implementation yet, I don't have a way to test that. Should be straightforward to add though. llvm-svn: 135288
* Disable loop idiom recognition of memset/memcpy if the function being compiledChad Rosier2011-07-151-0/+5
| | | | | | | | | is named after a common idiom (i.e., memset/memcpy). Otherwise, we can run into infinite recursion. Ideally, the user should use the correct -fno-builtin flag, but in case they don't we should play nicely. rdar://9763412 llvm-svn: 135286
* Remove unnecessary duplicate instruction definitions that simply overloaded ↵Owen Anderson2011-07-151-9/+8
| | | | | | the type of VEXT. This can be achieved with a Pat definition, and is much more disassembler friendly. llvm-svn: 135283
* MachOObjectFile: Get symbol functions ready for 64 bit.Benjamin Kramer2011-07-151-13/+58
| | | | llvm-svn: 135282
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