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* llvmc: Allow multiple output languages.Mikhail Glushenkov2010-09-211-23/+35
| | | | llvm-svn: 114433
* Fixed ambiguous call.Lang Hames2010-09-211-1/+2
| | | | llvm-svn: 114431
* Fix buglet when the TST instruction directly uses the AND result.Gabor Greif2010-09-211-5/+6
| | | | | | | I am unable to write a test for this case, help is solicited, though... What I did is to tickle the code in the debugger and verify that we do the right thing. llvm-svn: 114430
* Added an additional PBQP problem builder which adds coalescing costs (both ↵Lang Hames2010-09-211-14/+127
| | | | | | between pairs of virtuals, and between virtuals and physicals). llvm-svn: 114429
* Move the search for the appropriate AND instructionGabor Greif2010-09-213-23/+47
| | | | | | | | | | into OptimizeCompareInstr. This necessitates the passing of CmpValue around, so widen the virtual functions to accomodate. No functionality changes. llvm-svn: 114428
* a few more trivial updates. This fixes PerformInsertVectorEltInMemory to notChris Lattner2010-09-212-15/+13
| | | | | | | pass a completely incorrect SrcValue, which would result in a miscompile with combiner-aa. llvm-svn: 114411
* convert the targets off the non-MachinePointerInfo of getLoad.Chris Lattner2010-09-2111-102/+116
| | | | llvm-svn: 114410
* add some accessorsChris Lattner2010-09-211-0/+7
| | | | llvm-svn: 114409
* it's more elegant to put the "getConstantPool" andChris Lattner2010-09-215-29/+40
| | | | | | | | "getFixedStack" on the MachinePointerInfo class. While this isn't the problem I'm setting out to solve, it is the right way to eliminate PseudoSourceValue, so lets go with it. llvm-svn: 114406
* update the X86 backend to use the MachinePointerInfo version of oneChris Lattner2010-09-211-38/+44
| | | | | | | of the getLoad methods. This fixes at least one bug where an incorrect svoffset is passed in (a potential combiner-aa miscompile). llvm-svn: 114404
* Fix a bug where the x86 backend would lower memcpy/memset of segment ↵Chris Lattner2010-09-211-0/+9
| | | | | | | | relative operations into non-segment-relative copies. llvm-svn: 114402
* reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner2010-09-2110-66/+85
| | | | | | | instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. llvm-svn: 114401
* add some helpful accessors.Chris Lattner2010-09-211-0/+8
| | | | llvm-svn: 114400
* add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take aChris Lattner2010-09-211-18/+47
| | | | | | | MachinePointerInfo. Among other virtues, this doesn't silently truncate the svoffset to 32-bits. llvm-svn: 114399
* simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner2010-09-212-6/+6
| | | | | | MachinePointerInfo llvm-svn: 114397
* chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner2010-09-212-12/+4
| | | | | | eliminating some weird "infer a frame address" logic which was dead. llvm-svn: 114396
* don't implicitly drop the offset of a machinememoperand when legalizing atomics.Chris Lattner2010-09-211-2/+2
| | | | llvm-svn: 114395
* force clients of MachineFunction::getMachineMemOperand to provide aChris Lattner2010-09-213-24/+15
| | | | | | | MachinePointerInfo, propagating the type out a level of API. Remove the old MachineFunction::getMachineMemOperand impl. llvm-svn: 114393
* convert targets to the new MF.getMachineMemOperand interface.Chris Lattner2010-09-219-30/+42
| | | | llvm-svn: 114391
* start pushing MachinePointerInfo out through the MachineMemOperand interfaceChris Lattner2010-09-212-9/+16
| | | | | | to the MachineFunction construction methods. llvm-svn: 114390
* refactor the Value*/offset pair from MachineMemOperand out to a newChris Lattner2010-09-211-5/+5
| | | | | | | | | MachinePointerInfo struct, no functionality change. This also adds an assert to MachineMemOperand::MachineMemOperand that verifies that the Value* is either null or is an IR pointer type. llvm-svn: 114389
* fix rdar://8453210, a crash handling a call through a GS relative load.Chris Lattner2010-09-211-1/+7
| | | | | | For now, just disable folding the load into the call. llvm-svn: 114386
* Revert unrelated change that was accidentally included in the previous commit.Rafael Espindola2010-09-211-4/+1
| | | | llvm-svn: 114383
* Implement support for .local and its "interesting" interactions with .comm.Rafael Espindola2010-09-213-11/+36
| | | | llvm-svn: 114382
* Enable machine sinking critical edge splitting. e.g.Evan Cheng2010-09-201-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 %z = select i1 %c, double %a, double %y ret double %z } Was: _foo: divsd LCPI0_0(%rip), %xmm0 testb $1, %dil jne LBB0_2 movaps %xmm1, %xmm0 LBB0_2: ret Now: _foo: testb $1, %dil je LBB0_2 divsd LCPI0_0(%rip), %xmm0 ret LBB0_2: movaps %xmm1, %xmm0 ret This avoids the divsd when early exit is taken. rdar://8454886 llvm-svn: 114372
* When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson2010-09-201-2/+13
| | | | | | | | | | | | Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. llvm-svn: 114348
* Simplify ARM callee-saved register handling by removing the distinctionJim Grosbach2010-09-203-167/+59
| | | | | | | | | | | | | | | | | | | between the high and low registers for prologue/epilogue code. This was a Darwin-only thing that wasn't providing a realistic benefit anymore. Combining the save areas simplifies the compiler code and results in better ARM/Thumb2 codegen. For example, previously we would generate code like: push {r4, r5, r6, r7, lr} add r7, sp, #12 stmdb sp!, {r8, r10, r11} With this change, we combine the register saves and generate: push {r4, r5, r6, r7, r8, r10, r11, lr} add r7, sp, #12 rdar://8445635 llvm-svn: 114340
* Produce a R_X86_64_32 when the value is >=0.Rafael Espindola2010-09-201-2/+5
| | | | llvm-svn: 114339
* Avoid splitting critical edge twice for a set of PHI uses.Evan Cheng2010-09-201-17/+23
| | | | llvm-svn: 114338
* Fix the "unable to rename temporary" lit test failing on Windows. rename is ↵Francois Pichet2010-09-201-4/+11
| | | | | | now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. llvm-svn: 114320
* Revert r114312 while I sort out some issues.Owen Anderson2010-09-191-1/+1
| | | | llvm-svn: 114313
* Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,Owen Anderson2010-09-191-1/+1
| | | | | | | r114268 fixed the last of the blockers to enabling it. I will be monitoring for failures. llvm-svn: 114312
* Add one more Core i7 model number.Jakob Stoklund Olesen2010-09-191-0/+2
| | | | llvm-svn: 114310
* idiom recognition should catch this.Chris Lattner2010-09-191-0/+32
| | | | llvm-svn: 114304
* add a readme.Chris Lattner2010-09-191-0/+25
| | | | llvm-svn: 114303
* add corei7, the laptop version.Chris Lattner2010-09-191-0/+1
| | | | llvm-svn: 114302
* X86Subtarget.h: Fix Cygwin's TD.NAKAMURA Takumi2010-09-181-1/+1
| | | | llvm-svn: 114297
* Add the exit instruction to the PTX target.Eric Christopher2010-09-1822-16/+705
| | | | | | Patch by Che-Liang Chiou <clchiou@gmail.com>! llvm-svn: 114294
* Fix build.Michael J. Spencer2010-09-181-0/+1
| | | | llvm-svn: 114292
* Make sure the STT_FILE symbol is the first one in the symbol table.Rafael Espindola2010-09-181-0/+13
| | | | llvm-svn: 114285
* Unbreak msvc build.Benjamin Kramer2010-09-181-1/+1
| | | | llvm-svn: 114284
* do not rely on the implicit-dereference semantics of dyn_cast_or_nullGabor Greif2010-09-181-1/+1
| | | | llvm-svn: 114278
* do not rely on the implicit-dereference semantics of dyn_cast_or_nullGabor Greif2010-09-181-4/+4
| | | | llvm-svn: 114277
* Fixed non-const iterator error.Lang Hames2010-09-181-1/+1
| | | | llvm-svn: 114273
* Added a separate class (PBQPBuilder) for PBQP Problem construction. This ↵Lang Hames2010-09-187-2300/+309
| | | | | | | | | | | | class can be extended to support custom constraints. For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming no issues with the builder system come up. To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor. llvm-svn: 114272
* Fix code that break critical edges for PHI uses. Watch out for multiple PHIs ↵Evan Cheng2010-09-181-71/+66
| | | | | | in different blocks. llvm-svn: 114270
* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-181-7/+7
| | | | | | | | | | is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". llvm-svn: 114268
* Thumb opcodes for thumb calls.Eric Christopher2010-09-181-1/+5
| | | | llvm-svn: 114263
* Add addrmode5 fp load support. Swap float/thumb operand adding to handleEric Christopher2010-09-181-5/+21
| | | | | | thumb with floating point. llvm-svn: 114256
* Floating point stores have a 3rd addressing mode type.Eric Christopher2010-09-181-1/+9
| | | | llvm-svn: 114254
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