| Commit message (Collapse) | Author | Age | Files | Lines |
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This back-end was deprecated in favor of the NVPTX back-end.
NV_CONTRIB
llvm-svn: 157417
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Expand test case for this.
Patch by Reed Kotler.
llvm-svn: 157410
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First code from the Mips16 compiler. Includes trivial test program.
Patch by Reed Kotler.
llvm-svn: 157408
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I'm not sure it's really worth expressing this as a range rather than 3 specific equalities, but it doesn't seem fundamentally wrong either.
llvm-svn: 157398
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Submitted by: Anton Lokhmotov <Anton.Lokhmotov@arm.com>
Approved by: o Anton Korobeynikov
o Micah Villmow
o David Neto
llvm-svn: 157393
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LowerSwitch::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.
test/Transform/LowerSwitch/feature.ll - this test was refactored: grep + count was replaced with FileCheck usage.
llvm-svn: 157384
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llvm-svn: 157381
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llvm-svn: 157380
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llvm-svn: 157377
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llvm-svn: 157375
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llvm-svn: 157374
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to pass the tables around.
llvm-svn: 157373
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sizeof/sizeof.
llvm-svn: 157369
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llvm-svn: 157368
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uint16_t. Simplify loop iterating over one of those tables. No functional change intended.
llvm-svn: 157367
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intended.
llvm-svn: 157358
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Live ranges with a constrained register class may benefit from splitting
around individual uses. It allows the remaining live range to use a
larger register class where it may allocate. This is like spilling to a
different register class.
This is only attempted on constrained register classes.
<rdar://problem/11438902>
llvm-svn: 157354
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llvm-svn: 157349
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llvm-svn: 157348
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Now that the coalescer keeps live intervals and machine code in sync at
all times, it needs to deal with identity copies differently.
When merging two virtual registers, all identity copies are removed
right away. This means that other identity copies must come from
somewhere else, and they are going to have a value number.
Deal with such copies by merging the value numbers before erasing the
copy instruction. Otherwise, we leave dangling value numbers in the live
interval.
This fixes PR12927.
llvm-svn: 157340
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Patch by Jush Lu <jush.msn@gmail.com>.
llvm-svn: 157336
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llvm-svn: 157329
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Apparently LLVM only stopped emitting this after LLVM 3.0
llvm-svn: 157325
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inline threshold if the global inline threshold is lower (as for -Oz).
Reviewed by Chandler Carruth and Bill Wendling.
llvm-svn: 157323
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llvm-svn: 157320
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llvm-svn: 157319
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llvm-svn: 157317
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llvm-svn: 157315
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llvm-svn: 157313
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case.
llvm-svn: 157312
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llvm-svn: 157309
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Part of rdar://11496790
llvm-svn: 157303
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teach computeAllocSize about realloc, reallocf, and valloc
llvm-svn: 157298
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llvm-svn: 157292
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llvm-svn: 157274
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llvm-svn: 157273
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llvm-svn: 157264
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Fixes PR12898: SCEVExpander crash.
llvm-svn: 157263
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move EmitGEPOffset from InstCombine to Transforms/Utils/Local.h
(a draft of this) patch reviewed by Andrew, thanks.
llvm-svn: 157261
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objectsize intrinsic.
After a lot of discussion, we realized it's not the best option for run-time bounds checking
llvm-svn: 157255
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Also make sure registers aren't erased twice if the dead def mentions
the register twice.
This fixes PR12911.
llvm-svn: 157254
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leader table. That's because it wasn't expecting instructions to turn up as
leader for a value number that is not its own, but equality propagation could
create this situation. One solution is to have the leader table use a WeakVH
but this slows down GVN by about 5%. Instead just have equality propagation not
add instructions to the leader table, only constants and arguments. In theory
this might cause GVN to run more (each time it changes something it runs again)
but it doesn't seem to occur enough to cause a slow down.
llvm-svn: 157251
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introduced in r157043. Fixes PR12908.
llvm-svn: 157236
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instruction encodings can be excluded during mips16 processing.
This revision fixes the issue raised by Jim Grosbach.
bool hasStandardEncoding() const { return !inMips16Mode(); }
When micromips is added it will be
bool StandardEncoding() const { return !inMips16Mode()&& !inMicroMipsMode(); }
No additional testing is needed other than to assure that there is no regression
from this patch.
Patch by Reed Kotler.
llvm-svn: 157234
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32-bit offset jump tables just use real branch instructions and so aren't
marked as data regions. We were still emitting the .end_data_region
marker though, which assert()ed.
rdar://11499158
llvm-svn: 157221
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llvm-svn: 157218
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No in-tree targets exercise this path.
Patch by Micah Villmow.
llvm-svn: 157215
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t2RSB defined the operand correctly, but tRSBS didn't.
llvm-svn: 157200
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llvm-svn: 157197
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llvm-svn: 157195
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