| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 61012
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llvm-svn: 61009
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target constants are allowed to have an illegal
type.
llvm-svn: 61006
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Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll
Failed with exit(1) at line 1
while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738
Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493.
0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98
1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593
2 libSystem.B.dylib 0x96cac09b _sigtramp + 43
3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359
4 libSystem.B.dylib 0x96d24ec2 raise + 26
5 libSystem.B.dylib 0x96d3447f abort + 73
6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101
7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub
...
llvm-svn: 61001
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types into the DAG if they were not already there.
Check this with an assertion.
llvm-svn: 60997
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NDEBUG is unset and -debug is passed.
llvm-svn: 60986
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self-hosting LLVM:
llvm[2]: Linking Release executable opt (without symbols)
...
Undefined symbols:
"llvm::APFloat::IEEEsingle", referenced from:
__ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(Constants.o)
__ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(AsmWriter.o)
__ZN4llvm7APFloat10IEEEsingleE$non_lazy_ptr in libLLVMCore.a(ConstantFold.o)
"llvm::APFloat::IEEEdouble", referenced from:
__ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(Constants.o)
__ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(AsmWriter.o)
__ZN4llvm7APFloat10IEEEdoubleE$non_lazy_ptr in libLLVMCore.a(ConstantFold.o)
ld: symbol(s) not found
This is in release mode. To replicate, compile llvm and llvm-gcc in optimized
mode. Then build llvm, in optimized mode, with the newly created compiler.
llvm-svn: 60977
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Add missing DIType constructor, needed by DIVariable::getType().
llvm-svn: 60976
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llvm-svn: 60975
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llvm-svn: 60974
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a pretification of the IR.
llvm-svn: 60973
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width register load followed by a truncating
store for the copy, since the load will not place
the value in the lower bits. Probably partial
loads/stores can never happen here, but fix it
anyway.
llvm-svn: 60972
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llvm-svn: 60971
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llvm-svn: 60965
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use of illegal integer types: instead, use a stack slot
and copying via integer registers. The existing code
is still used if the bitconvert is to a legal integer
type.
This fires on the PPC testcases 2007-09-08-unaligned.ll
and vec_misaligned.ll. It looks like equivalent code
is generated with these changes, just permuted, but
it's hard to tell.
With these changes, nothing in LegalizeDAG produces
illegal integer types anymore. This is a prerequisite
for removing the LegalizeDAG type legalization code.
While there I noticed that the existing code doesn't
handle trunc store of f64 to f32: it turns this into
an i64 store, which represents a 4 byte stack smash.
I added a FIXME about this. Hopefully someone more
motivated than I am will take care of it.
llvm-svn: 60964
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which are identical to the original patterns.
- Change the multiply with overflow so that we distinguish between signed and
unsigned multiplication. Currently, unsigned multiplication with overflow
isn't working!
llvm-svn: 60963
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everyone is doing this these days :-). Patch by Daniel M Gessel!
llvm-svn: 60958
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linux.
llvm-svn: 60951
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do an extending load of the 4 bytes rather than a
potentially illegal (type) i32 load followed by a
sign extend.
llvm-svn: 60945
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lowering f64 function arguments.
llvm-svn: 60944
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Added support for TRUNC v8i16 to v8i8 for X86 (MMX)
llvm-svn: 60916
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ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.
Similar for SUB and MUL instructions.
llvm-svn: 60915
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llvm-svn: 60901
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optimization of SGE/SLE with unit stride, now that it works properly.
llvm-svn: 60881
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llvm-svn: 60875
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llvm-svn: 60872
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llvm-svn: 60869
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llvm-svn: 60867
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llvm-svn: 60866
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vec_extract-sse4.ll.
llvm-svn: 60865
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llvm-svn: 60861
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them. The DAG combiner expects that nodes that are transformed have one value
result.
llvm-svn: 60857
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llvm-svn: 60851
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llvm-svn: 60850
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arithmetic with overflow instruction.
llvm-svn: 60844
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for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform. Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.
llvm-svn: 60834
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causing a bunch of failures when running
"make ENABLE_EXPENSIVE_CHECKS=1 check".
llvm-svn: 60832
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bit convert that changes the number of elements of a shuffle.
llvm-svn: 60829
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some overflow issues. Patch by Thomas Jablin.
llvm-svn: 60828
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llvm-svn: 60826
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actual function ptr instead of ptr to stub if function is already compiled.
llvm-svn: 60822
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llvm-svn: 60821
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parallel, allowing it to decide that P/Q must alias if A/B
must alias in things like:
P = gep A, 0, i, 1
Q = gep B, 0, i, 1
This allows GVN to delete 62 more instructions out of 403.gcc.
llvm-svn: 60820
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llvm-svn: 60818
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node latencies. Use CalcLatency instead of manual code in
CalculatePriorities to keep it consistent. Previously it
computed slightly different results.
llvm-svn: 60817
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- Emit DW_AT_byte_size for struct and union of size zero.
- Emit DW_AT_declaration for forward type declaration.
llvm-svn: 60812
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- Fix bug 3185, with misc other cleanups.
- Needed to implement SPUInstrInfo::InsertBranch(). CAUTION: Not sure what
gets or needs to get passed to InsertBranch() to insert a conditional
branch. This will abort for now until a good test case shows up.
llvm-svn: 60811
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overflow/carry from the "arithmetic with overflow" intrinsics. It searches the
machine basic block from bottom to top to find the SETO/SETC instruction that is
its conditional. If an instruction modifies EFLAGS before it reaches the
SETO/SETC instruction, then it defaults to the normal instruction emission.
llvm-svn: 60807
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The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.
A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.
The PointerIntPair class and an internal union are now used, which
reduce the overall size.
llvm-svn: 60806
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invalidateCachedPointerInfo. Thanks to Bill for sending me
a testcase.
llvm-svn: 60805
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