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* [AArch64]Enable the narrow ld promotion only on profitable microarchitecturesJun Bum Lim2015-11-061-8/+22
| | | | | | | | | The benefit from converting narrow loads into a wider load (r251438) could be micro-architecturally dependent, as it assumes that a single load with two bitfield extracts is cheaper than two narrow loads. Currently, this conversion is enabled only in cortex-a57 on which performance benefits were verified. llvm-svn: 252316
* Bring r252305 back with a test fix.Rafael Espindola2015-11-062-24/+20
| | | | | | | | | | We now create the .eh_frame section early, just like every other special section. This means that the special flags are visible in code that explicitly asks for ".eh_frame". llvm-svn: 252313
* Revert "Simplify the creation of .eh_frame/.debug_frame sections."Rafael Espindola2015-11-061-18/+24
| | | | | | | | This reverts commit r252305. Investigating a test failure. llvm-svn: 252306
* Simplify the creation of .eh_frame/.debug_frame sections.Rafael Espindola2015-11-061-24/+18
| | | | llvm-svn: 252305
* git clang-format and fix variable names. NFC.Rafael Espindola2015-11-061-42/+34
| | | | llvm-svn: 252304
* Use SHT_X86_64_UNWIND on every OS.Rafael Espindola2015-11-061-7/+5
| | | | | | | That is the ABI required type. Linkers still check the section name, so everything should still work. llvm-svn: 252300
* Pass SectionStart directly to the one function that uses it.Rafael Espindola2015-11-061-8/+5
| | | | llvm-svn: 252299
* [mips][ias] Range check uimm4 operands and fixed a bug this revealed.Daniel Sanders2015-11-063-14/+25
| | | | | | | | | | | | | | | Summary: The bug was that the sldi instructions have immediate widths dependant on their element size. So sldi.d has a 1-bit immediate and sldi.b has a 4-bit immediate. All of these were using 4-bit immediates previously. Reviewers: vkalintiris Subscribers: llvm-commits, atanasyan, dsanders Differential Revision: http://reviews.llvm.org/D14018 llvm-svn: 252297
* [mips][ias] Range check uimm3 operands.Daniel Sanders2015-11-062-7/+8
| | | | | | | | | | | | Summary: Reviewers: vkalintiris Subscribers: atanasyan, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14016 llvm-svn: 252296
* [mips][ias] Range check uimm2 operands and fix a bug this revealed.Daniel Sanders2015-11-069-46/+64
| | | | | | | | | | | | | | | Summary: The bug was that the MIPS32R6/MIPS64R6/microMIPS32R6 versions of LSA and DLSA (unlike the MSA version) failed to account for the off-by-one encoding of the immediate. The range is actually 1..4 rather than 0..3. Reviewers: vkalintiris Subscribers: atanasyan, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14015 llvm-svn: 252295
* [mips][ias] Range check uimmz operands.Daniel Sanders2015-11-062-2/+34
| | | | | | | | | | Reviewers: vkalintiris Subscribers: dsanders, atanasyan, llvm-commits Differential Revision: http://reviews.llvm.org/D14013 llvm-svn: 252294
* [mips] Define patterns for the atomic_{load,store}_{8,16,32,64} nodes.Vasileios Kalintiris2015-11-063-4/+26
| | | | | | | | | | | | | | | | Summary: Without these patterns we would generate a complete LL/SC sequence. This would be problematic for memory regions marked as WRITE-only or READ-only, as the instructions LL/SC would read/write to the protected memory regions correspondingly. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14397 llvm-svn: 252293
* AMDGPU/SI: Emit HSA kernels with symbol type STT_AMDGPU_HSA_KERNELTom Stellard2015-11-066-0/+60
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D13804 llvm-svn: 252291
* Add a new attribute: norecurseJames Molloy2015-11-067-1/+12
| | | | | | This attribute allows the compiler to assume that the function never recurses into itself, either directly or indirectly (transitively). This can be used among other things to demote global variables to locals. llvm-svn: 252282
* Revert r252249 (and r252255, r252258), "[WinEH] Clone funclets with multiple ↵NAKAMURA Takumi2015-11-062-979/+15
| | | | | | | | parents" It behaved flaky due to iterating pointer key values on std::set and std::map. llvm-svn: 252279
* Code style fix (caused by wrongly default clang-format style) (NFC)Xinliang David Li2015-11-062-10/+17
| | | | llvm-svn: 252276
* Simplify the alignment handling in FDE emission.Rafael Espindola2015-11-061-16/+15
| | | | llvm-svn: 252271
* Delete dead store. NFC.Rafael Espindola2015-11-061-1/+0
| | | | llvm-svn: 252270
* Range-for some LiveIntervals code under reviewReid Kleckner2015-11-061-9/+7
| | | | llvm-svn: 252267
* [WinEH] Split EH_RESTORE out of CATCHRET for 32-bit EHReid Kleckner2015-11-066-52/+90
| | | | | | | | | | | | | | | | | | | | | | | This adds the EH_RESTORE x86 pseudo instr, which is responsible for restoring the stack pointers: EBP and ESP, and ESI if stack realignment is involved. We only need this on 32-bit x86, because on x64 the runtime restores CSRs for us. Previously we had to keep the CATCHRET instruction around during SEH so that we could convince X86FrameLowering to restore our frame pointers. Now we can split these instructions earlier. This was confusing, because we had a return instruction which wasn't really a return and was ultimately going to be removed by X86FrameLowering. This change also simplifies X86FrameLowering, which really shouldn't be building new MBBs. No observable functional change currently, but with the new register mask stuff in D14407, CATCHRET will become a register allocator barrier, and our existing tests rely on us having reasonable register allocation around SEH. llvm-svn: 252266
* Use a range loop.Rafael Espindola2015-11-061-3/+1
| | | | llvm-svn: 252260
* Fix build warningsAndrew Kaylor2015-11-061-4/+4
| | | | llvm-svn: 252255
* [WinEH] Clone funclets with multiple parentsAndrew Kaylor2015-11-062-15/+979
| | | | | | | | | | Windows EH funclets need to always return to a single parent funclet. However, it is possible for earlier optimizations to combine funclets (probably based on one funclet having an unreachable terminator) in such a way that this condition is violated. These changes add code to the WinEHPrepare pass to detect situations where a funclet has multiple parents and clone such funclets, fixing up the unwind and catch return edges so that each copy of the funclet returns to the correct parent funclet. Differential Revision: http://reviews.llvm.org/D13274?id=39098 llvm-svn: 252249
* Pass the streamer to the constructor instead of every other method. NFC.Rafael Espindola2015-11-061-76/+66
| | | | llvm-svn: 252246
* Simplify the constructor. NFC.Rafael Espindola2015-11-051-5/+4
| | | | llvm-svn: 252243
* git-clang-format an area I am about to change.Rafael Espindola2015-11-051-32/+29
| | | | llvm-svn: 252241
* Small simplification by moving early continue earlier.Rafael Espindola2015-11-051-6/+4
| | | | llvm-svn: 252237
* Re-apply r251050 with a for PR25421Sanjoy Das2015-11-051-1/+58
| | | | | | | | | | | | | | | | | | | | | | | | | The bug: I missed adding break statements in the switch / case. Original commit message: [SCEV] Teach SCEV some axioms about non-wrapping arithmetic Summary: - A s< (A + C)<nsw> if C > 0 - A s<= (A + C)<nsw> if C >= 0 - (A + C)<nsw> s< A if C < 0 - (A + C)<nsw> s<= A if C <= 0 Right now `C` needs to be a constant, but we can later generalize it to be a non-constant if needed. Reviewers: atrick, hfinkel, reames, nlewycky Subscribers: sanjoy, llvm-commits Differential Revision: http://reviews.llvm.org/D13686 llvm-svn: 252236
* Revert r251050 to fix miscompile when running Clang -O1Richard Trieu2015-11-051-56/+1
| | | | | | | See bug for details: https://llvm.org/bugs/show_bug.cgi?id=25421 Some comparisons were incorrectly replaced with a constant value. llvm-svn: 252231
* DI: Reverse direction of subprogram -> function edge.Peter Collingbourne2015-11-0518-252/+147
| | | | | | | | | | | | | | | | | | | | | | | Previously, subprograms contained a metadata reference to the function they described. Because most clients need to get or set a subprogram for a given function rather than the other way around, this created unneeded inefficiency. For example, many passes needed to call the function llvm::makeSubprogramMap() to build a mapping from functions to subprograms, and the IR linker needed to fix up function references in a way that caused quadratic complexity in the IR linking phase of LTO. This change reverses the direction of the edge by storing the subprogram as function-level metadata and removing DISubprogram's function field. Since this is an IR change, a bitcode upgrade has been provided. Fixes PR23367. An upgrade script for textual IR for out-of-tree clients is attached to the PR. Differential Revision: http://reviews.llvm.org/D14265 llvm-svn: 252219
* Remove windows line endings introduced by r252177. NFC.Tim Northover2015-11-059-128/+128
| | | | llvm-svn: 252217
* [ASan] Disable instrumentation for inalloca variables.Alexey Samsonov2015-11-051-1/+4
| | | | | | | | inalloca variables were not treated as static allocas, therefore didn't participate in regular stack instrumentation. We don't want them to participate in dynamic alloca instrumentation as well. llvm-svn: 252213
* Refactor: Simplify boolean conditional return statements in ↵Alexander Kornienko2015-11-051-3/+1
| | | | | | | | | | lib/llvm/ExecutionEngine/Orc Patch by Richard Thomson! Differential revision: http://reviews.llvm.org/D9973 llvm-svn: 252212
* [WinEH] Fix funclet prologues with stack realignmentReid Kleckner2015-11-056-48/+70
| | | | | | | | | | | | | | We already had a test for this for 32-bit SEH catchpads, but those don't actually create funclets. We had a bug that only appeared in funclet prologues, where we would establish EBP and ESI as our FP and BP, and then downstream prologue code would overwrite them. While I was at it, I fixed Win64+funclets+stackrealign. This issue doesn't come up as often there due to the ABI requring 16 byte stack alignment, but now we can rest easy that AVX and WinEH will work well together =P. llvm-svn: 252210
* Refactor: Simplify boolean conditional return statements in llvm/lib/AnalysisAlexander Kornienko2015-11-054-18/+6
| | | | | | | | Patch by Richard Thomson! Differential revision: http://reviews.llvm.org/D9967 llvm-svn: 252209
* [WebAssembly] Fix copypasta.Dan Gohman2015-11-052-3/+3
| | | | | | Noticed by dschff in http://reviews.llvm.org/rL252203 llvm-svn: 252208
* [WebAssembly] Rename Immediate instructions to Const.Dan Gohman2015-11-052-16/+16
| | | | | | This more closely reflects the naming convention in the spec. llvm-svn: 252204
* [WebAssembly] Add AsmString strings for most instructions.Dan Gohman2015-11-057-135/+212
| | | | | | | | | Mangling type information into MachineInstr opcode names was a temporary measure, and it's starting to get hairy. At the same time, the MC instruction printer wants to use AsmString strings for printing. This patch takes the first step, starting the process of adding AsmStrings for instructions. llvm-svn: 252203
* [WebAssembly] Update wasm builtin functions to match spec changes.Dan Gohman2015-11-051-15/+7
| | | | | | | The page_size operator has been removed from the spec, and the resize_memory operator has been changed to grow_memory. llvm-svn: 252202
* replace MachineCombinerPattern namespace and enum with enum class; NFCISanjay Patel2015-11-056-52/+61
| | | | | | | | Also, remove an enum hack where enum values were used as indexes into an array. We may want to make this a real class to allow pattern-based queries/customization (D13417). llvm-svn: 252196
* [WebAssembly] Add WebAssemblyMCInstLower.cpp.Dan Gohman2015-11-055-4/+168
| | | | | | | This isn't used yet; it's just a start towards eventually using MC to do instruction printing, and eventually binary encoding. llvm-svn: 252194
* Reapply r250906 with many suggested updates from Rafael Espindola.Kevin Enderby2015-11-054-50/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The needed lld matching changes to be submitted immediately next, but this revision will cause lld failures with this alone which is expected. This removes the eating of the error in Archive::Child::getSize() when the characters in the size field in the archive header for the member is not a number. To do this we have all of the needed methods return ErrorOr to push them up until we get out of lib. Then the tools and can handle the error in whatever way is appropriate for that tool. So the solution is to plumb all the ErrorOr stuff through everything that touches archives. This include its iterators as one can create an Archive object but the first or any other Child object may fail to be created due to a bad size field in its header. Thanks to Lang Hames on the changes making child_iterator contain an ErrorOr<Child> instead of a Child and the needed changes to ErrorOr.h to add operator overloading for * and -> . We don’t want to use llvm_unreachable() as it calls abort() and is produces a “crash” and using report_fatal_error() to move the error checking will cause the program to stop, neither of which are really correct in library code. There are still some uses of these that should be cleaned up in this library code for other than the size field. The test cases use archives with text files so one can see the non-digit character, in this case a ‘%’, in the size field. These changes will require corresponding changes to the lld project. That will be committed immediately after this change. But this revision will cause lld failures with this alone which is expected. llvm-svn: 252192
* [SimplifyLibCalls] Use hasFloatVersion(). NFCI.Davide Italiano2015-11-051-15/+13
| | | | llvm-svn: 252186
* [DebugInfo] Fix ARM/AArch64 prologue_end position. Related to D11268.Oleg Ranevskyy2015-11-059-116/+131
| | | | | | | | | | | | | | | | | | | Summary: This review is related to another review request http://reviews.llvm.org/D11268, does the same and merely fixes a couple of issues with it. D11268 is quite old and has merge conflicts against the current trunk. This request - rebases D11268 onto the new trunk; - resolves the merge conflicts; - fixes the prologue_end tests, which do not pass due to the subprogram definitions not marked as distinct. Reviewers: echristo, rengolin, kubabrecka Subscribers: aemerson, rengolin, jyknight, dsanders, llvm-commits, asl Differential Revision: http://reviews.llvm.org/D14338 llvm-svn: 252177
* Add cfi instr for CFA calculation when movpc is expanded to call and popPetar Jovanovic2015-11-051-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the issue of wrong CFA calculation in the following case: 0x08048400 <+0>: push %ebx 0x08048401 <+1>: sub $0x8,%esp 0x08048404 <+4>: **call 0x8048409 <test+9>** 0x08048409 <+9>: **pop %eax** 0x0804840a <+10>: add $0x1bf7,%eax 0x08048410 <+16>: mov %eax,%ebx 0x08048412 <+18>: call 0x80483f0 <bar> 0x08048417 <+23>: add $0x8,%esp 0x0804841a <+26>: pop %ebx 0x0804841b <+27>: ret The highlighted instructions are a product of movpc instruction. The call instruction changes the stack pointer, and pop instruction restores its value. However, the rule for computing CFA is not updated and is wrong on the pop instruction. So, e.g. backtrace in gdb does not work when on the pop instruction. This adds cfi instructions for both call and pop instructions. cfi_adjust_cfa_offset** instruction is used with the appropriate offset for setting the rules to calculate CFA correctly. Patch by Violeta Vukobrat. Differential Revision: http://reviews.llvm.org/D14021 llvm-svn: 252176
* [WebAssembly] Rename ior operator to or to match the specDerek Schuff2015-11-051-1/+1
| | | | | | | | | | | | Summary: The spec uses "or" for inclusive-or and "xor" for exclusive-or Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff Differential Revision: http://reviews.llvm.org/D14362 llvm-svn: 252174
* [ARM] Compute known bits for ARMISD::CMOVJames Molloy2015-11-051-0/+10
| | | | | | | | | | We can conservatively know that CMOV's known bits are the intersection of known bits for each of its operands. This helps PerformCMOVToBFICombine find more opportunities. I tried hard to create a testcase for this and failed - we have to sufficiently confuse DAG.computeKnownBits which can see through all the cheap tricks I tried to narrow my larger testcase down :( This code is actually exercised in CodeGen/ARM/bfi.ll, there's just no functional difference because DAG.computeKnownBits gets the right answer in that case. llvm-svn: 252168
* Fix a signed/unsigned mismatch warning; NFC.Aaron Ballman2015-11-051-1/+1
| | | | llvm-svn: 252164
* revert rev. 252153 due to build failure on ubuntuAsaf Badouh2015-11-054-101/+1
| | | | | | [X86][AVX512] add comi with Sae llvm-svn: 252154
* [X86][AVX512] add comi with SaeAsaf Badouh2015-11-054-1/+101
| | | | | | | | add builtin_ia32_vcomisd and builtin_ia32_vcomisd Differential Revision: http://reviews.llvm.org/D14331 llvm-svn: 252153
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