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* [WebAssembly] Reapply r252858, with svn add for the new file.Dan Gohman2015-11-1210-173/+219
| | | | | | | | | | | | | | | | | | | | | | Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252910
* [x86] translating "fp" (floating point) instructions from ↵Michael Zuckerman2015-11-122-0/+16
| | | | | | | | | | | {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp} LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr. GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions. Differential Revision: http://reviews.llvm.org/D14217 llvm-svn: 252908
* Cull non-standard variants of ARM architectures (NFC)Artyom Skrobov2015-11-124-34/+10
| | | | | | | | | | | | | | | Summary: This patch changes ARMV5, ARMV5E, ARMV6SM, ARMV6HL, ARMV7, ARMV7L, ARMV7HL, ARMV7EM to be treated as aliases for the corresponding standard architectures, instead of as actual architectures. Reviewers: rengolin Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D14577 llvm-svn: 252903
* Revert r252858: "[WebAssembly] Switch to MC for instruction printing."Hans Wennborg2015-11-129-121/+173
| | | | | | | | It broke the CMake build: "Cannot find source file: WebAssemblyRegNumbering.cpp" llvm-svn: 252897
* Re-apply "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-0/+18
| | | | | | | | | realigning the stack."" r252219 reversed the direction of subprogram -> function edge. Fixed the IR to account for this. llvm-svn: 252895
* [ARM] CMOV->BFI combining: handle both senses of CMPZJames Molloy2015-11-121-0/+10
| | | | | | | | I completely misunderstood what ARMISD::CMPZ means. It's not "compare equal to zero", it's "compare, only setting the zero/Z flag". It can either be equal-to-zero or not-equal-to-zero, and we weren't checking what sense it was. If it's equal-to-zero, we can swap the operands around and pretend like it is not-equal-to-zero, which is both a bug fix and lets us handle more cases. llvm-svn: 252891
* Revert "[ARM] Enable shrink-wrapping by default."Renato Golin2015-11-121-5/+0
| | | | | | This reverts commit r252825, as it broke ASAN on ARM. Investigating... llvm-svn: 252889
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-128-1/+112
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-128-17/+154
| | | | | | Differential Revision: http://reviews.llvm.org/D11406 llvm-svn: 252885
* Revert "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-18/+0
| | | | | | | | | realigning the stack." This reverts commit r252882. LLParser complains for invalid field 'function' in DISubprogram. llvm-svn: 252884
* [mips] Use correct frame register for DWARF info when dynamically realigning ↵Vasileios Kalintiris2015-11-122-0/+18
| | | | | | | | | | | | | | | | | | | the stack. Summary: This patch overrides TargetFrameLowering::getFrameIndexReference() in order to specify the correct register when the function needs dynamic stack realignment. The values returned from this function are used in order to create DW_AT_locations for DWARF info. These locations would use the wrong registers as it's been reported in PR25028. Reviewers: dsanders Subscribers: dean, llvm-commits Differential Revision: http://reviews.llvm.org/D13511 llvm-svn: 252882
* [InstCombine] Add trivial folding (bitreverse (bitreverse x)) -> xJames Molloy2015-11-121-0/+10
| | | | | | There are plenty more instcombines we could probably do with bitreverse, but this seems like a very obvious and trivial starting point and was brought up by Hal in his review. llvm-svn: 252879
* [SDAG] Introduce a new BITREVERSE node along with a corresponding LLVM intrinsicJames Molloy2015-11-127-2/+64
| | | | | | | | | | Several backends have instructions to reverse the order of bits in an integer. Conceptually matching such patterns is similar to @llvm.bswap, and it was mentioned in http://reviews.llvm.org/D14234 that it would be best if these patterns were matched in InstCombine instead of reimplemented in every different target. This patch introduces an intrinsic @llvm.bitreverse.i* that operates similarly to @llvm.bswap. For plumbing purposes there is also a new ISD node ISD::BITREVERSE, with simple expansion and promotion support. The intention is that InstCombine's BSWAP detection logic will be extended to support BITREVERSE too, and @llvm.bitreverse intrinsics emitted (if the backend supports lowering it efficiently). llvm-svn: 252878
* Revert "Revert "[FunctionAttrs] Identify norecurse functions""James Molloy2015-11-121-1/+78
| | | | | | This reapplies this patch, with test fixes. llvm-svn: 252871
* [Object, MachO] Mark symbols from DATA and BSS sections as ST_DataKuba Brecka2015-11-121-0/+3
| | | | | | | | In `MachOObjectFile::getSymbolType` we currently always return `SymbolRef::ST_Function` for symbols from any section. In order for llvm-symbolizer to correctly symbolize Mach-O globals, symbols from data and BSS sections should return `SymbolRef::ST_Data`. Differential Revision: http://reviews.llvm.org/D14576 llvm-svn: 252867
* dwarfdump: Added macro support to llvm-dwarfdump tool.Amjad Aboud2015-11-126-1/+123
| | | | | | | | Added "macro" option to "-debug-dump" flag, which trigger parsing and dumping of the ".debug_macinfo" section. Differential Revision: http://reviews.llvm.org/D14294 llvm-svn: 252866
* Add AVR backend skeletonDylan McKay2015-11-129-0/+138
| | | | | | | | | | | | | This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. llvm-svn: 252865
* Revert "[FunctionAttrs] Identify norecurse functions"James Molloy2015-11-121-78/+1
| | | | | | This reverts commit r252862. This introduced test failures and I'm reverting while I investigate how this happened. llvm-svn: 252863
* [FunctionAttrs] Identify norecurse functionsJames Molloy2015-11-121-1/+78
| | | | | | | | | | | | | A function can be marked as norecurse if: * The SCC to which it belongs has cardinality 1; and either a) It does not call any non-norecurse function. This includes self-recursion; or b) It only has one callsite and the function that callsite is within is marked norecurse. a) is best propagated bottom-up and b) is best propagated top-down. We build up the norecurse attributes bottom-up using the existing SCC pass, and mark functions with no obvious recursion (but not provably norecurse) to sweep later, top-down. llvm-svn: 252862
* Mostly revert 252842 due to failures on some buildbots.David Blaikie2015-11-121-59/+5
| | | | | | | | | | | | | | I imagine there's some UB in here somewhere, though Valgrind doesn't seem to have picked it up (not sure if I have a working asan build right now to test there). GDB bot seems to be crashing: http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/26267/steps/check-all/logs/FAIL%3A%20LLVM%3A%3Adwarfdump-dwp.test Hexagon ELF bot is, presumably, just getting different output: http://lab.llvm.org:8011/builders/clang-hexagon-elf/builds/32927/steps/check-all/logs/FAIL%3A%20LLVM%3A%3Adwarfdump-dwp.test llvm-svn: 252859
* [WebAssembly] Switch to MC for instruction printing.Dan Gohman2015-11-129-173/+121
| | | | | | | | | | | | | | | | | | | | This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252858
* output_csv libfuzzer optionMike Aizatsky2015-11-124-8/+25
| | | | | | | | | | | Summary: The option outputs statistics in CSV format preceded by 1 header line. This is intended for machine processing of the output. -verbosity=0 should likely be set. Differential Revision: http://reviews.llvm.org/D14600 llvm-svn: 252856
* dwarfdump: Add error checking to fix the buildbots/correctnessDavid Blaikie2015-11-121-4/+4
| | | | llvm-svn: 252845
* dwarfdump: Add some error handling for DWP index sections of the wrong sizeDavid Blaikie2015-11-121-0/+7
| | | | llvm-svn: 252843
* dwarfdump: Dump the contents of DWP indexesDavid Blaikie2015-11-121-5/+82
| | | | llvm-svn: 252842
* LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalizationMatthias Braun2015-11-121-73/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Factor out code to query and modify the sign bit of a floatingpoint value as an integer. This also works if none of the targets integer types is big enough to hold all bits of the floatingpoint value. - Legalize FABS(x) as FCOPYSIGN(x, 0.0) if FCOPYSIGN is available, otherwise perform bit manipulation on the sign bit. The previous code used "x >u 0 ? x : -x" which is incorrect for x being -0.0! It also takes 34 instructions on ARM Cortex-M4. With this patch we only require 5: vldr d0, LCPI0_0 vmov r2, r3, d0 lsrs r2, r3, #31 bfi r1, r2, #31, #1 bx lr (This could be further improved if the compiler would recognize that r2, r3 is zero). - Only lower FCOPYSIGN(x, y) = sign(x) ? -FABS(x) : FABS(x) if FABS is available otherwise perform bit manipulation on the sign bit. - Perform the sign(x) test by masking out the sign bit and comparing with 0 rather than shifting the sign bit to the highest position and testing for "<s 0". For x86 copysignl (on 80bit values) this gets us: testl $32768, %eax rather than: shlq $48, %rax sets %al testb %al, %al Differential Revision: http://reviews.llvm.org/D11172 llvm-svn: 252839
* [libFuzzer] experimental flag -drill (another search heuristic; Mike ↵Kostya Serebryany2015-11-126-20/+89
| | | | | | Aizatsky's idea) llvm-svn: 252838
* [TLS on Darwin] use a different mask for tls calls on x86-64.Manman Ren2015-11-124-0/+16
| | | | | | | | | Calls involved in thread-local variable lookup save more registers than normal calls. rdar://problem/23073171 llvm-svn: 252837
* Fix problems in coding styleXinliang David Li2015-11-121-13/+23
| | | | llvm-svn: 252829
* [ARM] Enable shrink-wrapping by default.Quentin Colombet2015-11-111-0/+5
| | | | | | | | Differential Revision: http://reviews.llvm.org/D14357 rdar://problem/21942589 llvm-svn: 252825
* [WinEH] Don't forward branches across empty EH pad BBsReid Kleckner2015-11-112-1/+2
| | | | | | | For really simple SEH catchpads, we tried to forward the invoke unwind edge across the empty block. llvm-svn: 252822
* [LIR] General refactor to improve compile-time and simplify code.Chad Rosier2015-11-111-16/+26
| | | | | | | | | | | First create a list of candidates, then transform. This simplifies the code in that you have don't have to worry that you may be using an invalidated iterator. Previously, each time we created a memset/memcpy we would reevaluate the entire loop potentially resulting in lots of redundant work for large basic blocks. llvm-svn: 252817
* [IR] Add support for empty tokensDavid Majnemer2015-11-119-13/+50
| | | | | | | | | | | | | | When working with tokens, it is often the case that one has instructions which consume a token and produce a new token. Currently, we have no mechanism to represent an initial token state. Instead, we can create a notional "empty token" by inventing a new constant which captures the semantics we would like. This new constant is called ConstantTokenNone and is written textually as "token none". Differential Revision: http://reviews.llvm.org/D14581 llvm-svn: 252811
* Introduce deoptimization operand bundlesSanjoy Das2015-11-112-0/+14
| | | | | | | | | | | | | | | | | | | | | Summary: This change introduces the notion of "deoptimization" operand bundles. LLVM can recognize and optimize these in more precise ways than it can a generic "unknown" operand bundles. The current form of this special recognition / optimization is an enum entry in LLVMContext, a LangRef blurb and a verifier rule. Over time we will teach LLVM to do more aggressive optimization around deoptimization operand bundles, exploiting known facts about kinds of state deoptimization operand bundles are allowed to track. Reviewers: reames, majnemer, chandlerc, dexonsmith Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14551 llvm-svn: 252806
* Report Windows error code in a fatal error after a system call.Paul Robinson2015-11-111-2/+9
| | | | llvm-svn: 252800
* unique_ptrify the AllocValueProfData helper function introduced in r252783David Blaikie2015-11-111-6/+5
| | | | llvm-svn: 252799
* [Symbolizer]: Add -pretty-print optionHemant Kulkarni2015-11-111-6/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D13671 llvm-svn: 252798
* Move the enum attributes defined in Attributes.h to a table-gen file.Akira Hatanaka2015-11-111-1/+17
| | | | | | | | | | | | | | This is a step towards consolidating some of the information regarding attributes in a single place. This patch moves the enum attributes in Attributes.h to the table-gen file. Additionally, it adds definitions of target independent string attributes that will be used in follow-up commits by the inliner to check attribute compatibility. rdar://problem/19836465 llvm-svn: 252796
* Add a libLTO diagnostic handler that supports lto_get_error_message APIYunzhong Gao2015-11-111-8/+2
| | | | | | | | | | | | | | This is a follow-up from the previous discussion on the thread: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151019/307763.html The LibLTO lto_get_error_message() API reads error messages from a std::string sLastErrorString. Instead of passing this string around as an argument, this patch creates a diagnostic handler and then sends this handler to the constructor of LTOCodeGenerator. Differential Revision: http://reviews.llvm.org/D14313 llvm-svn: 252791
* [DAGCombiner] Improve zextload optimization.Geoff Berry2015-11-111-22/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Don't fold (zext (and (load x), cst)) -> (and (zextload x), (zext cst)) if (and (load x) cst) will match as a zextload already and has additional users. For example, the following IR: %load = load i32, i32* %ptr, align 8 %load16 = and i32 %load, 65535 %load64 = zext i32 %load16 to i64 store i32 %load16, i32* %dst1, align 4 store i64 %load64, i64* %dst2, align 8 used to produce the following aarch64 code: ldr w8, [x0] and w9, w8, #0xffff and x8, x8, #0xffff str w9, [x1] str x8, [x2] but with this change produces the following aarch64 code: ldrh w8, [x0] str w8, [x1] str x8, [x2] Reviewers: resistor, mcrosier Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14340 llvm-svn: 252789
* dwarfdump: DWP type unit index dumping skeletonDavid Blaikie2015-11-111-0/+10
| | | | llvm-svn: 252786
* Refactoring and fix another instance of asan errorXinliang David Li2015-11-111-5/+10
| | | | llvm-svn: 252783
* Format my previous commitDavid Blaikie2015-11-112-6/+5
| | | | llvm-svn: 252782
* dwarfdump: First piece of support for DWP dumpingDavid Blaikie2015-11-113-0/+52
| | | | | | Just a tiny piece of index dumping - the header in this instance. llvm-svn: 252781
* [WinEH] Only generate UnwindHelp slot for MSVCXXJoseph Tremoulet2015-11-111-12/+12
| | | | | | | | | | | | Summary: Other personalities don't use this special frame slot. Reviewers: majnemer, andrew.w.kaylor, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14580 llvm-svn: 252778
* Support: Recognize Borland DWARF extensions.Dawn Perchik2015-11-111-0/+25
| | | | | | | | | | | This patch adds DWARF values for the Delphi language and Borland C++ language extensions. Reviewed by: dblaikie Subscribers: llvm-commits, majnemer Differential Revision: http://reviews.llvm.org/D14522 llvm-svn: 252776
* Add target preference for GatherAllAliases max depthMatt Arsenault2015-11-112-1/+2
| | | | llvm-svn: 252775
* Reverting r252760Colin LeMahieu2015-11-111-14/+6
| | | | llvm-svn: 252770
* clang-format lib/CodeGen/AsmPrinter/DwarfCompileUnit.cppDehao Chen2015-11-111-7/+8
| | | | llvm-svn: 252769
* Emit discriminator for inlined callsites.Dehao Chen2015-11-112-0/+3
| | | | | | | | | | | | Summary: Inlined callsites need to be emitted in debug info so that sample profile can be annotated to the correct inlined instance. Reviewers: dnovillo, dblaikie Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D14511 llvm-svn: 252768
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