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* Add reverseColor to raw_ostream.Argyrios Kyrtzidis2012-04-163-0/+50
| | | | | | | To be used in printing unprintable source in clang diagnostics. Patch by Seth Cantrell! llvm-svn: 154800
* Change type profile for vpermv back to using operand type for the mask ↵Craig Topper2012-04-162-5/+5
| | | | | | argument to match intrinsic behavior. Add a bitcast to the lowering code to convert mask from v8i32 to v8f32 for vpermps. llvm-svn: 154798
* Flip the arguments when converting vpermd/vpermps intrinsics into ↵Craig Topper2012-04-161-3/+3
| | | | | | instructions. The intrinsic has the mask as the last operand, but the instruction has it as the second. llvm-svn: 154797
* Add a Fixme.Bill Wendling2012-04-161-0/+2
| | | | llvm-svn: 154793
* Simplify checking for pointer types in BBVectorize (this change was ↵Hal Finkel2012-04-161-5/+2
| | | | | | suggested by Duncan). llvm-svn: 154787
* Remove dead SD nodes after the combining pass. Fixes PR12201.Hal Finkel2012-04-161-0/+1
| | | | llvm-svn: 154786
* Rewrite how machine block placement handles loop rotation.Chandler Carruth2012-04-161-66/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a complex change that resulted from a great deal of experimentation with several different benchmarks. The one which proved the most useful is included as a test case, but I don't know that it captures all of the relevant changes, as I didn't have specific regression tests for each, they were more the result of reasoning about what the old algorithm would possibly do wrong. I'm also failing at the moment to craft more targeted regression tests for these changes, if anyone has ideas, it would be welcome. The first big thing broken with the old algorithm is the idea that we can take a basic block which has a loop-exiting successor and a looping successor and use the looping successor as the layout top in order to get that particular block to be the bottom of the loop after layout. This happens to work in many cases, but not in all. The second big thing broken was that we didn't try to select the exit which fell into the nearest enclosing loop (to which we exit at all). As a consequence, even if the rotation worked perfectly, it would result in one of two bad layouts. Either the bottom of the loop would get fallthrough, skipping across a nearer enclosing loop and thereby making it discontiguous, or it would be forced to take an explicit jump over the nearest enclosing loop to earch its successor. The point of the rotation is to get fallthrough, so we need it to fallthrough to the nearest loop it can. The fix to the first issue is to actually layout the loop from the loop header, and then rotate the loop such that the correct exiting edge can be a fallthrough edge. This is actually much easier than I anticipated because we can handle all the hard parts of finding a viable rotation before we do the layout. We just store that, and then rotate after layout is finished. No inner loops get split across the post-rotation backedge because we check for them when selecting the rotation. That fix exposed a latent problem with our exitting block selection -- we should allow the backedge to point into the middle of some inner-loop chain as there is no real penalty to it, the whole point is that it *won't* be a fallthrough edge. This may have blocked the rotation at all in some cases, I have no idea and no test case as I've never seen it in practice, it was just noticed by inspection. Finally, all of these fixes, and studying the loops they produce, highlighted another problem: in rotating loops like this, we sometimes fail to align the destination of these backwards jumping edges. Fix this by actually walking the backwards edges rather than relying on loopinfo. This fixes regressions on heapsort if block placement is enabled as well as lots of other cases where the previous logic would introduce an abundance of unnecessary branches into the execution. llvm-svn: 154783
* Merge vpermps/vpermd and vpermpd/vpermq SD nodes.Craig Topper2012-04-164-31/+20
| | | | llvm-svn: 154782
* Fix SDTypeProfile for vpermps. The mask operand should be v8i32.Craig Topper2012-04-161-2/+4
| | | | llvm-svn: 154781
* Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices ↵Craig Topper2012-04-151-9/+12
| | | | | | in vpermps/vpermd. Hardware only looks at lower 3-bits. llvm-svn: 154780
* Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with ↵Craig Topper2012-04-151-17/+8
| | | | | | normal shuffle vectors. llvm-svn: 154778
* Fix PR12529. The Vxx family of instructions are only supported by AVX.Nadav Rotem2012-04-151-3/+13
| | | | | | Use non-vex instructions for SSE4. llvm-svn: 154770
* Wire up support for diagnostic ranges in the ARMAsmParser.Benjamin Kramer2012-04-151-3/+12
| | | | | | | | | | | | | | As an example, attach range info to the "invalid instruction" message: $ clang -arch arm -c asm.c asm.c:2:11: error: invalid instruction __asm__("foo r0"); ^ <inline asm>:1:2: note: instantiated into assembly here foo r0 ^~~ llvm-svn: 154765
* When emulating vselect using OR/AND/XOR make sure to bitcast the result back ↵Nadav Rotem2012-04-151-1/+2
| | | | | | to the original type. llvm-svn: 154764
* Added VPERM optimization for AVX2 shufflesElena Demikhovsky2012-04-155-4/+76
| | | | llvm-svn: 154761
* HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with ↵NAKAMURA Takumi2012-04-151-0/+2
| | | | | | -Asserts. llvm-svn: 154759
* Target/Hexagon: Tweak to fix msvc build.NAKAMURA Takumi2012-04-151-2/+2
| | | | llvm-svn: 154758
* Rename "fpaccuracy" metadata to the more generic "fpmath". That's because I'mDuncan Sands2012-04-142-9/+9
| | | | | | | | | thinking of generalizing it to be able to specify other freedoms beyond accuracy (such as that NaN's don't have to be respected). I'd like the 3.1 release (the first one with this metadata) to have the more generic name already rather than having to auto-upgrade it in 3.2. llvm-svn: 154744
* Fix an error in BBVectorize important for vectorizing pointer types.Hal Finkel2012-04-141-0/+31
| | | | | | | | | | When vectorizing pointer types it is important to realize that potential pairs cannot be connected via the address pointer argument of a load or store. This is because even after vectorization, the address is still a scalar because the address of the higher half of the pair is implicit from the address of the lower half (it need not be, and should not be, explicitly computed). llvm-svn: 154735
* Enhance BBVectorize to more-properly handle pointer values and vectorize GEPs.Hal Finkel2012-04-141-2/+27
| | | | llvm-svn: 154734
* misched: Added CanHandleTerminators.Andrew Trick2012-04-131-3/+3
| | | | | | | | | This is a special flag for targets that really want their block terminators in the DAG. The default scheduler cannot handle this correctly, so it becomes the specialized scheduler's responsibility to schedule terminators. llvm-svn: 154712
* Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ↵Richard Smith2012-04-132-27/+33
| | | | | | ~*x & y. llvm-svn: 154705
* Remove iostream from New Value Jump.Sirish Pande2012-04-131-1/+0
| | | | llvm-svn: 154703
* Add support to BBVectorize for vectorizing selects.Hal Finkel2012-04-131-0/+8
| | | | llvm-svn: 154700
* Add support for Hexagon Architectural feature, New Value Jump.Sirish Pande2012-04-137-10/+684
| | | | llvm-svn: 154696
* Pass to replace tranfer/copy instructions into combine instruction where ↵Sirish Pande2012-04-135-0/+484
| | | | | | possible. llvm-svn: 154695
* Reduce malloc traffic in DwarfAccelTableBenjamin Kramer2012-04-132-58/+28
| | | | | | | | | - Don't copy offsets into HashData, the underlying vector won't change once the table is finalized. - Allocate HashData and HashDataContents in a BumpPtrAllocator. - Allocate string map entries in the same allocator. - Random cleanups. llvm-svn: 154694
* On Darwin targets, only use vfma etc. if the source use fma() intrinsic ↵Evan Cheng2012-04-131-2/+5
| | | | | | explicitly. llvm-svn: 154689
* Add some comments, and fix a few places that missed setting Changed.Dan Gohman2012-04-131-2/+24
| | | | llvm-svn: 154687
* For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-131-2/+2
| | | | | | | targets so if the branch target has the high bit set it does not get printed as: beq 0xffffffff8008c404 llvm-svn: 154685
* Consider ObjC runtime calls objc_storeWeak and others which make a copy ofDan Gohman2012-04-131-14/+29
| | | | | | | their argument as "escape" points for objc_retainBlock optimization. This fixes rdar://11229925. llvm-svn: 154682
* By default, use Early-CSE instead of GVN for vectorization cleanup.Hal Finkel2012-04-131-2/+9
| | | | | | | | | | As has been suggested by Duncan and others, Early-CSE and GVN should do similar redundancy elimination, but Early-CSE is much less expensive. Most of my autovectorization benchmarks show a performance regresion, but all of these are < 0.1%, and so I think that it is still worth using the less expensive pass. llvm-svn: 154673
* Remove unused variable.Benjamin Kramer2012-04-131-3/+0
| | | | llvm-svn: 154661
* Silence various build warnings from Hexagon backend that show up in release ↵Craig Topper2012-04-135-240/+220
| | | | | | builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds. llvm-svn: 154660
* Use the new Use-aware dominates method to apply the objc runtimeDan Gohman2012-04-131-8/+5
| | | | | | | library return value optimization for phi uses. Even when the phi itself is not dominated, the specific use may be dominated. llvm-svn: 154647
* Code-gen may inject code into the IR before it emits the ASM. The linkerBill Wendling2012-04-131-0/+6
| | | | | | | | obviously cannot know that this code is present, let alone used. So prevent the internalize pass from internalizing those global values which code-gen may insert. llvm-svn: 154645
* Don't move objc_autorelease calls past autorelease pool boundaries whenDan Gohman2012-04-131-3/+43
| | | | | | | optimizing autorelease calls on phi nodes with null operands. This fixes rdar://11207070. llvm-svn: 154642
* Def here is an Instruction, so !isa<Instruction>(Def) is always false,Dan Gohman2012-04-131-3/+2
| | | | | | as Eli noticed. llvm-svn: 154641
* Add forms of dominates and isReachableFromEntry that accept a UseDan Gohman2012-04-121-0/+81
| | | | | | | | directly instead of a user Instruction. This allows them to test whether a def dominates a particular operand if the user instruction is a PHI. llvm-svn: 154631
* Fix a few more places in the ARM disassembler so that branches getKevin Enderby2012-04-122-4/+30
| | | | | | symbolic operands added when using the C disassembler API. llvm-svn: 154628
* Update CMake build.Ted Kremenek2012-04-122-4/+5
| | | | llvm-svn: 154622
* Hexagon: fix CMake error.Evandro Menezes2012-04-121-1/+1
| | | | llvm-svn: 154620
* HexagonPacketizer patch.Sirish Pande2012-04-1219-540/+7580
| | | | llvm-svn: 154616
* This patch improves the MCJIT runtime dynamic loader by adding new handlingPreston Gurd2012-04-126-63/+234
| | | | | | | | | | of zero-initialized sections, virtual sections and common symbols and preventing the loading of sections which are not required for execution such as debug information. Patch by Andy Kaylor! llvm-svn: 154610
* Generalize r153635 to deal with TokenFactor chains; also clean up the logic ↵Evan Cheng2012-04-121-41/+51
| | | | | | and fix the tests. rdar://11069732, rdar://11236106 llvm-svn: 154604
* Hexagon: enable assembler output through the MC layer.Evandro Menezes2012-04-1216-376/+685
| | | | llvm-svn: 154597
* Remove README entry obsoleted by register masks.Benjamin Kramer2012-04-121-16/+0
| | | | llvm-svn: 154588
* Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are ↵Craig Topper2012-04-121-4/+4
| | | | | | integer instructions. llvm-svn: 154580
* ARM 'adr' fixups don't need the interworking addend tweaking.Jim Grosbach2012-04-121-0/+3
| | | | | | | | They reference the PC directly, so things work properly that way. rdar://11231229 llvm-svn: 154576
* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-112-3/+9
| | | | | | otherwise expand FNEG during legalization. llvm-svn: 154546
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