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* MachineInstr: Remove unused parameter.Matthias Braun2015-05-1913-25/+20
| | | | llvm-svn: 237726
* [Speculation] NFC: more header commentsJingyue Wu2015-05-191-0/+9
| | | | | | explaining how it differs from SpeculativeExecuteBB in SimplifyCFG. llvm-svn: 237724
* Remove unnecessary cast. NFCPete Cooper2015-05-191-1/+1
| | | | llvm-svn: 237722
* [DWARF parser] Add basic support for DWZ DWARF multifile extensions.Alexey Samsonov2015-05-193-43/+55
| | | | | | | | | | | | | | | | | | | | | This change implements basic support for DWARF alternate sections proposal: http://www.dwarfstd.org/ShowIssue.php?issue=120604.1&type=open LLVM tools now understand new forms: DW_FORM_GNU_ref_alt and DW_FORM_GNU_strp_alt, which are used as references to .debug_info and .debug_str sections respectively, stored in a separate file, and possibly shared between different executables / shared objects. llvm-dwarfdump and llvm-symbolizer don't yet know how to access this alternate debug file (usually pointed by .gnu_debugaltlink section), but they can at lease properly parse and dump regular files, which refer to it. This change should fix crashes of llvm-dwarfdump and llvm-symbolizer on files produced by running "dwz" tool. Such files are already installed on some modern Linux distributions. llvm-svn: 237721
* Dereferenceable, dereferenceable_or_null metadata for loadsSanjoy Das2015-05-192-1/+25
| | | | | | | | | | | | | | | | | | | | Summary: Introduce dereferenceable, dereferenceable_or_null metadata for loads with the same semantic as corresponding attributes. This patch depends on http://reviews.llvm.org/D9253 Patch by Artur Pilipenko! Reviewers: hfinkel, sanjoy, reames Reviewed By: sanjoy, reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9365 llvm-svn: 237720
* use 'auto *' for pointers; clearer usage, no deep copyingSanjay Patel2015-05-191-2/+2
| | | | llvm-svn: 237719
* tidy upSanjay Patel2015-05-191-5/+5
| | | | | | | | 1. remove duplicate local variable 2. add local variable with name to match comment 3. remove useless comment llvm-svn: 237715
* use range-based for-loopSanjay Patel2015-05-191-7/+4
| | | | llvm-svn: 237711
* MIR Serialization: print and parse LLVM IR using MIR format.Alex Lorenz2015-05-1912-9/+302
| | | | | | | | | | | | | | | | This commit is the initial commit for the MIR serialization project. It creates a new library under CodeGen called 'MIR'. This new library adds a new machine function pass that prints out the LLVM IR using the MIR format. This pass is then added as a last pass when a 'stop-after' option is used in llc. The new library adds the initial functionality for parsing of MIR files as well. This commit also extends the llc tool so that it can recognize and parse MIR input files. Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames Differential Revision: http://reviews.llvm.org/D9616 llvm-svn: 237708
* RegisterCoalescer: Improve a comment.Matthias Braun2015-05-191-6/+5
| | | | | | | Explain the relation of the example to the variables in the code, explain what bad behaviour the code avoids in this case. llvm-svn: 237706
* use range-based for loopSanjay Patel2015-05-191-5/+5
| | | | llvm-svn: 237705
* [RewriteStatepointsForGC] Fix up naming in "relocationViaAlloca" and run it ↵Igor Laevsky2015-05-191-56/+56
| | | | | | | | through clang-format. Differential Revision: http://reviews.llvm.org/D9774 llvm-svn: 237703
* Remove the InstructionSimplifierPass immediately after InstructionCombiningPass.Wei Mi2015-05-191-4/+0
| | | | | | | | | | InstructionCombiningPass was added after LoopUnrollPass in r237395. Because InstructionCombiningPass is strictly more powerful than InstructionSimplifierPass, remove the unnecessary InstructionSimplifierPass. Differential Revision: http://reviews.llvm.org/D9838 llvm-svn: 237702
* [RewriteStatepointsForGC] For some values (like gep's and bitcasts) it's ↵Igor Laevsky2015-05-191-6/+278
| | | | | | | | cheaper to clone them after statepoint than to emit proper relocates for them. This change implements this logic. There is alredy similar optimization in CodeGenPrepare, but doing so during RewriteStatepointsForGC allows to capture more opprtunities such as relocates in loops and longer instruction chains. Differential Revision: http://reviews.llvm.org/D9774 llvm-svn: 237701
* [mips][microMIPSr6] Implement NOR, OR, ORI, XOR and XORI instructionsZoran Jovanovic2015-05-192-7/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D8800 llvm-svn: 237697
* [mips][microMIPSr6] Implement AND and ANDI instructionsZoran Jovanovic2015-05-192-3/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D8772 llvm-svn: 237696
* Rangify for loop in Cleanup(), NFC.Yaron Keren2015-05-191-2/+2
| | | | llvm-svn: 237695
* Prevent Cleanup() from running more than once.Yaron Keren2015-05-191-0/+3
| | | | llvm-svn: 237694
* [mips] Correct and improve special-case shuffle instructions.Daniel Sanders2015-05-196-114/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The documentation writes vectors highest-index first whereas LLVM-IR writes them lowest-index first. As a result, instructions defined in terms of left_half() and right_half() had the halves reversed. In addition to correcting them, they have been improved to allow shuffles that use the same operand twice or in reverse order. For example, ilvev used to accept masks of the form: <0, n, 2, n+2, 4, n+4, ...> but now accepts: <0, 0, 2, 2, 4, 4, ...> <n, n, n+2, n+2, n+4, n+4, ...> <0, n, 2, n+2, 4, n+4, ...> <n, 0, n+2, 2, n+4, 4, ...> One further improvement is that splati.[bhwd] is now the preferred instruction for splat-like operations. The other special shuffles are no longer used for splats. This lead to the discovery that <0, 0, ...> would not cause splati.[hwd] to be selected and this has also been fixed. This fixes the enc-3des test from the test-suite on Mips64r6 with MSA. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9660 llvm-svn: 237689
* As r237678 was reverted, this is no longer needed.Yaron Keren2015-05-191-2/+1
| | | | llvm-svn: 237687
* [mips][microMIPSr6] Implement DIV, DIVU, MOD and MODU instructionsZoran Jovanovic2015-05-192-5/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D8769 llvm-svn: 237685
* Fix Visual C++ errors C2784, C2780, C2782 after r237678.Yaron Keren2015-05-191-1/+2
| | | | | | It does not like std::min(unsigned, uint32_t). llvm-svn: 237683
* [X86] ABI change for x86-32: pass 3 vector arguments in-register instead of ↵Michael Kuperstein2015-05-191-27/+62
| | | | | | | | | | | | | | | | 4, except on Darwin. This changes the ABI used on 32-bit x86 for passing vector arguments. Historically, clang passes the first 4 vector arguments in-register, and additional vector arguments on the stack, regardless of platform. That is different from the behavior of gcc, icc, and msvc, all of which pass only the first 3 arguments in-register. The 3-register convention is documented, unofficially, in Agner's calling convention guide, and, officially, in the recently released version 1.0 of the i386 psABI. Darwin is kept as is because the OS X ABI Function Call Guide explicitly documents the current (4-register) behavior. This fixes PR21510 Differential revision: http://reviews.llvm.org/D9644 llvm-svn: 237682
* SelectionDAG: Cleanup and simplify FoldConstantArithmeticMatthias Braun2015-05-191-100/+91
| | | | | | | | | | | This cleans up the FoldConstantArithmetic code by factoring out the case of two ConstantSDNodes into an own function. This avoids unnecessary complexity for many callers who already have ConstantSDNode arguments. This also avoids an intermeidate SmallVector datastructure and a loop over that datastructure. llvm-svn: 237651
* [BitcodeReader] Error out if we read an invalid function argument typeFilipe Cabecinhas2015-05-191-1/+4
| | | | | | Bug found with AFL fuzz. llvm-svn: 237650
* [lib/Fuzzer] more efficient reload logic; also don't spam git too muchKostya Serebryany2015-05-193-8/+11
| | | | llvm-svn: 237649
* [BitcodeReader] It's a malformed block if CodeLenWidth is too bigFilipe Cabecinhas2015-05-191-0/+4
| | | | | | Bug found with AFL fuzz. llvm-svn: 237646
* DAGCombiner: Factor common pattern into isOneConstant() function. NFCMatthias Braun2015-05-191-35/+32
| | | | llvm-svn: 237645
* DAGCombiner: Factor common pattern into isAllOnesConstant() function. NFCMatthias Braun2015-05-191-46/+43
| | | | llvm-svn: 237644
* DAGCombiner: Use isNullConstant() where possibleMatthias Braun2015-05-191-19/+13
| | | | llvm-svn: 237643
* Store intrinsic ID by value in Function instead of a string lookup. NFC.Pete Cooper2015-05-193-35/+16
| | | | | | | | | | | | On 64-bit targets, Function has 4-bytes of padding in its struct layout. This uses the space for the intrinsic ID. It is set and recalculated whenever the function name is set. This is similar to the current behavior which clears the function from the intrinsic ID cache when its renamed. The intrinsic cache itself is removed as the only purpose was to speedup calls to getIntrinsicID() which now just reading the new field in the struct. Reviewed by Duncan. http://reviews.llvm.org/D9836 llvm-svn: 237642
* Move Function::lookupIntrinsicID to a static method. NFCPete Cooper2015-05-191-15/+14
| | | | llvm-svn: 237641
* Re-land r237175: [X86] Always return the sret parameter in eax/rax ...Reid Kleckner2015-05-181-21/+15
| | | | | | | | | This reverts commit r237210. Also fix X86/complex-fca.ll to match the code that we used to generate on win32 and now generate everwhere to conform to SysV. llvm-svn: 237639
* Revert accidental change in r237633Matthias Braun2015-05-181-1/+1
| | | | llvm-svn: 237635
* [mips][microMIPSr6] Implement LSA instructionJozef Kolek2015-05-183-2/+31
| | | | | | | | This patch implements LSA instruction using mapping. Differential Revision: http://reviews.llvm.org/D8919 llvm-svn: 237634
* DAGCombiner: Factor common pattern into isNullConstant() function. NFCMatthias Braun2015-05-181-71/+59
| | | | llvm-svn: 237633
* [BitcodeReader] Make sure the type of the inserted value matches the type of ↵Filipe Cabecinhas2015-05-181-0/+3
| | | | | | | | the aggregate at those indices Bug found with AFL-fuzz. llvm-svn: 237628
* Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced ↵David Blaikie2015-05-1828-211/+212
| | | | | | init only llvm-svn: 237624
* AArch64: work around ld64 bug more aggressively.Tim Northover2015-05-181-5/+4
| | | | | | | | | | | | | | | ld64 currently mishandles internal pointer relocations (i.e. ARM64_RELOC_UNSIGNED referred to by section & offset rather than symbol). The existing __cfstring clause was an early discovery and workaround for this, but the problem is wider and we should avoid such relocations wherever possible for now. This code should be reverted to allowing internal relocations as soon as possible. PR23437. llvm-svn: 237621
* Fix some odd whitespace and formatting errors while makingEric Christopher2015-05-181-35/+23
| | | | | | changes in ConstantsContext.h. llvm-svn: 237620
* Extract the load/store type verification to a separate function.Filipe Cabecinhas2015-05-182-9/+42
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Added isLoadableOrStorableType to PointerType. We were doing some checks in some places, occasionally assert()ing instead of telling the caller. With this patch, I'm putting all type checking in the same place for load/store type instructions, and verifying the same thing every time. I also added a check for load/store of a function type. Applied extracted check to Load, Store, and Cmpxcg. I don't have exhaustive tests for all of these, but all Error() calls in TypeCheckLoadStoreInst are being tested (in invalid.test). Reviewers: dblaikie, rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9785 llvm-svn: 237619
* [lib/Fuzzer] when -sync_command=<CMD> is given, periodically execute 'CMD ↵Kostya Serebryany2015-05-186-1/+29
| | | | | | CORPUS' to synchronize with other processes llvm-svn: 237617
* [YAML] Plug a memory leakBenjamin Kramer2015-05-181-2/+4
| | | | | | | The destructor of BlockScalarNode is never called. Store the contained string in BumpPtrAllocated memory instead. llvm-svn: 237614
* MachineInstr: Change return value of getOpcode() to unsigned.Matthias Braun2015-05-1815-48/+48
| | | | | | | | | This was previously returning int. However there are no negative opcode numbers and more importantly this was needlessly different from MCInstrDesc::getOpcode() (which even is the value returned here) and SDValue::getOpcode()/SDNode::getOpcode(). llvm-svn: 237611
* [Verifier] Assert gc_relocate always return a pointer type Chen Li2015-05-181-2/+12
| | | | | | | | | | | | | | Summary: Add an assertion in verifier.cpp to make sure gc_relocate relocate a gc pointer, and its return type has the same address space with the relocated pointer. Reviewers: reames, AndyAyers, sanjoy, pgavlin Reviewed By: pgavlin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9695 llvm-svn: 237605
* [PlaceSafepoints] Assertion on that gc_result can not have preceding phis ↵Chen Li2015-05-181-2/+2
| | | | | | | | | | | | | | | | should only apply to invoke statepoint Summary: When PlaceSafepoints pass replaces old return result with gc_result from statepoint, it asserts that gc_result can not have preceding phis in its parent block. This is only true on invoke statepoint, which terminates the block and puts its result at the beginning of the normal successor block. Call statepoint does not terminate the block and thus its result is in the same block with it. There should be no restriction on whether there are phis or not. Reviewers: reames, igor-laevsky Reviewed By: igor-laevsky Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9803 llvm-svn: 237597
* MC: clang-format MCContext. NFC.Jim Grosbach2015-05-181-8/+9
| | | | llvm-svn: 237595
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-1874-279/+279
| | | | | | | The naming was a mish-mash of old and new style. Update to be consistent with the new. NFC. llvm-svn: 237594
* Exploit dereferenceable_or_null attribute in LICM passSanjoy Das2015-05-182-30/+114
| | | | | | | | | | | | | | | | | | | | Summary: Allow hoisting of loads from values marked with dereferenceable_or_null attribute. For values marked with the attribute perform context-sensitive analysis to determine whether it's known-non-null or not. Patch by Artur Pilipenko! Reviewers: hfinkel, sanjoy, reames Reviewed By: reames Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9253 llvm-svn: 237593
* ARM: allow jump tables to be placed as constant islands.Tim Northover2015-05-187-170/+312
| | | | | | | | | | | | | | | | | Previously, they were forced to immediately follow the actual branch instruction. This was usually OK (the LEAs actually accessing them got emitted nearby, and weren't usually separated much afterwards). Unfortunately, a sufficiently nasty phi elimination dumps many instructions right before the basic block terminator, and this can increase the range too much. This patch frees them up to be placed as usual by the constant islands pass, and consequently has to slightly modify the form of TBB/TBH tables to refer to a PC-relative label at the final jump. The other jump table formats were already position-independent. rdar://20813304 llvm-svn: 237590
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