| Commit message (Collapse) | Author | Age | Files | Lines |
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what 'Available' is, please add a comment near it and rename it
if appropriate.
llvm-svn: 44703
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isTriviallyReMaterializable -> hasNoSideEffects
isReallyTriviallyReMaterializable -> isTriviallyReMaterializable
llvm-svn: 44702
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a while ago. We now produce:
_foo:
mflr r0
std r0, 16(r1)
ld r2, 16(r1)
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
instead of:
_foo:
mflr r0
std r0, 16(r1)
lis r0, 0
ori r0, r0, 16
ldx r2, r1, r0
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
for:
void foo(void **X) {
*X = __builtin_return_address(0);
}
on ppc64.
llvm-svn: 44701
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llvm-svn: 44700
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different places to mean different things. Document what the
one in PPCFunctionInfo means and when it is valid.
llvm-svn: 44699
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http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html
llvm-svn: 44696
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some (disabled) debugging code
to make such problems easier to diagnose in the future, written by Duncan Sands.
llvm-svn: 44695
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llvm-svn: 44694
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llvm-svn: 44692
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llvm-svn: 44691
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_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
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llvm-svn: 44686
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llvm-svn: 44676
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llvm-svn: 44671
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to a <8 x i16> or <16 x i8> vector.
llvm-svn: 44669
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Simpler and safer.
llvm-svn: 44663
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llcbeta.
llvm-svn: 44660
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only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
llvm-svn: 44658
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the X86 backend are needed before this should be enabled by default.
llvm-svn: 44657
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_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
llvm-svn: 44656
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llvm-svn: 44655
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SelectionDAGLegalize::ScalarizeVectorOp
llvm-svn: 44654
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same.
llvm-svn: 44651
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llvm-svn: 44650
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llvm-svn: 44649
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to create a JIT. This lets you specify JIT-specific configuration items
like the JITMemoryManager to use.
llvm-svn: 44647
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delete one ExecutionEngine ctor, minor cleanup.
llvm-svn: 44646
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a preferred spill candiate.
llvm-svn: 44644
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of the source with result of extension.
llvm-svn: 44643
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own JITMemoryManager interface. There is no functionality change with
this patch.
llvm-svn: 44640
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llvm-svn: 44638
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llvm-svn: 44637
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- Fix typo in SPUCallingConv.td
- Credit myself for CellSPU work
- Add CellSPU to 'all' host target list
llvm-svn: 44627
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not yet clear why, but in the meantime work around the
problem by making less use of readnone/readonly info.
llvm-svn: 44626
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llvm-svn: 44623
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llvm-svn: 44621
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llvm-svn: 44620
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llvm-svn: 44619
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llvm-svn: 44614
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llvm-svn: 44613
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llvm-svn: 44612
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last use.
llvm-svn: 44611
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llvm-svn: 44610
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llvm-svn: 44609
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llvm-svn: 44608
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llvm-svn: 44607
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This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
low spill weight so it would not be picked in case spilling is needed (avoid
pushing other intervals in the same BB to be spilled).
llvm-svn: 44601
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the stored register is killed.
llvm-svn: 44600
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compilation (no files missing). Test cases remain to be checked in.
llvm-svn: 44598
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llvm-svn: 44597
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