| Commit message (Collapse) | Author | Age | Files | Lines |
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Filling no-ops is done just before emitting of assembly,
when the instruction stream is final. No-ops are inserted
to align the instructions so the dual-issue of the pipeline
is utilized. This speeds up generated code with a minimum of
1% on a select set of algorithms.
This pass may be redundant if the instruction scheduler and
all subsequent passes that modify the instruction stream
(prolog+epilog inserter, register scavenger, are there others?)
are made aware of the instruction alignments.
llvm-svn: 123226
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to get a testcase.
llvm-svn: 123225
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actually reached in the testcase in PR8954, but it's safe and good
practice.
llvm-svn: 123224
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is floating around in the ether.
llvm-svn: 123223
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phi nodes. It is called from MergeBlockIntoPredecessor which is
called from GVN, which claims to preserve these.
I'm skeptical that this is the actual problem behind PR8954, but
this is a stab in the right direction.
llvm-svn: 123222
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llvm-svn: 123221
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neccesarily an uncond branch to the header. This fixes
PR8955 (the assertion tripping).
llvm-svn: 123219
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llvm-svn: 123218
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the cause of our gcc bootstrap miscompare."
It didn't.
llvm-svn: 123215
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PathV2::is_directory.
llvm-svn: 123209
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gcc bootstrap miscompare.
llvm-svn: 123207
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point values to their integer representation through the SSE intrinsic
calls. This is the last part of a README.txt entry for which I have real
world examples.
llvm-svn: 123206
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determining which bits are demanded by
a comparison against a constant.
llvm-svn: 123203
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llvm-svn: 123202
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restore the stack pointer from the frame pointer on thumbv6.
Fixes rdar://8819685
llvm-svn: 123196
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llvm-svn: 123193
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There's an inherent tension in DAGCombine between assuming
that things will be put in canonical form, and the Depth
mechanism that disables transformations when recursion gets
too deep. It would not surprise me if there's a lot of little
bugs like this one waiting to be discovered. The mechanism
seems fragile and I'd suggest looking at it from a design viewpoint.
llvm-svn: 123191
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operation in some cases.
llvm-svn: 123190
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llvm-svn: 123189
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instructions but are restricted pseudo forms.
llvm-svn: 123177
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instructions but are restricted pseudo forms.
llvm-svn: 123176
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llvm-svn: 123175
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llvm-svn: 123172
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llvm-svn: 123171
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and fixes here and there.
llvm-svn: 123170
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llvm-svn: 123169
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IDs when available rather than using a mixture of IDs and textual name
comparisons.
llvm-svn: 123165
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rolled std::find.
llvm-svn: 123164
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intrinsics element dependencies. Reviewed by Nick.
llvm-svn: 123161
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These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
llvm-svn: 123155
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llvm-svn: 123152
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PathV2::fs::exists.
llvm-svn: 123151
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llvm-svn: 123149
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back to life.
llvm-svn: 123146
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llvm-svn: 123145
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buildbot stability.
llvm-svn: 123144
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llvm-svn: 123142
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llvm-svn: 123141
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llvm-svn: 123139
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NUW AddRec's much more aggressively. We now get a trip count
for @test2 in nsw.ll
llvm-svn: 123138
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llvm-svn: 123136
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perform rounding other than truncation in the IR. Common C code for this
turns into really an LLVM intrinsic call that blocks a lot of further
optimizations.
llvm-svn: 123135
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a + {b,+,stride} into {a+b,+,stride} (because a is LIV),
then the resultant AddRec is NUW/NSW if the client says it
is.
llvm-svn: 123133
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void f(int* begin, int* end) { std::fill(begin, end, 0); }
which turns into a != exit expression where one pointer is
strided and (thanks to step #1) known to not overflow, and
the other is loop invariant.
The observation here is that, though the IV is strided by
4 in this case, that the IV *has* to become equal to the
end value. It cannot "miss" the end value by stepping over
it, because if it did, the strided IV expression would
eventually wrap around.
Handle this by turning A != B into "A-B != 0" where the A-B
part is known to be NUW.
llvm-svn: 123131
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when no virtual registers have been allocated.
It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that
Map.grow(MRI.getLastVirtReg());
can be replaced with the simpler
Map.resize(MRI.getNumVirtRegs());
This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.
llvm-svn: 123130
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llvm-svn: 123129
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physical register numbers.
This makes the hack used in LiveInterval official, and lets LiveInterval be
oblivious of stack slots.
The isPhysicalRegister() and isVirtualRegister() predicates don't know about
this, so when a variable may contain a stack slot, isStackSlot() should always
be tested first.
llvm-svn: 123128
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llvm-svn: 123126
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without informing memdep. This could cause nondeterminstic weirdness
based on where instructions happen to get allocated, and will hopefully
breath some life into some broken testers.
llvm-svn: 123124
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llvm-svn: 123123
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