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* Keep track of inlined functions and their locations. This information is ↵Devang Patel2009-04-115-6/+163
| | | | | | | | collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section. llvm-svn: 68847
* DebugLabelFolder ruthlessly deletes redundant labels. However, sometimes the ↵Devang Patel2009-04-101-1/+1
| | | | | | redundant labels is referenced by debug info somewhere else. This patch provies a way so that dwarf writer can mark labels as used. llvm-svn: 68813
* Clean up a bunch of whitespace issues and fix a comment typo.Bob Wilson2009-04-101-72/+74
| | | | | | No functional changes. llvm-svn: 68808
* fix two problems with machine sinking:Chris Lattner2009-04-101-12/+26
| | | | | | | | | | | 1. Sinking would crash when the first instruction of a block was sunk due to iterator problems. 2. Instructions could be sunk to their current block, causing an infinite loop. This fixes PR3968 llvm-svn: 68787
* Now that register classes have names, include the name in debug output.Dan Gohman2009-04-101-2/+4
| | | | llvm-svn: 68786
* Added code to handle spilling and reloading of FSRs.Sanjiv Gupta2009-04-104-14/+61
| | | | llvm-svn: 68783
* Don't fold a load if the other operand is a TLS address.Rafael Espindola2009-04-101-6/+27
| | | | | | | | | | | | | | With this we generate movl %gs:0, %eax leal i@NTPOFF(%eax), %eax instead of movl $i@NTPOFF, %eax addl %gs:0, %eax llvm-svn: 68778
* Add a new Type::getPointerTo method, which is shorthand forChris Lattner2009-04-101-0/+4
| | | | | | llvm::PointerType::get(). Patch by Anders Johnsen! llvm-svn: 68772
* a few fixes to "addrspace(256) is reference offset of GS segment register".Chris Lattner2009-04-101-17/+60
| | | | | | It turns out that there are still several problems with this, will file a bugzilla. llvm-svn: 68749
* Pass in the std::string parameter instead of returning it by value.Bill Wendling2009-04-103-26/+30
| | | | llvm-svn: 68747
* Constify getter methods.Bill Wendling2009-04-102-2/+3
| | | | llvm-svn: 68745
* Remove the obsolete SelectionDAG::getNodeValueTypes and simplifyDan Gohman2009-04-096-67/+50
| | | | | | code that uses it by using SelectionDAG::getVTList instead. llvm-svn: 68744
* StringMap<DIE*>::iterator::first() returns a pointer to the first character ofBill Wendling2009-04-092-4/+8
| | | | | | | | the key. This will cause it to create a new std::string, which isn't wanted. Instead, pass back the "const char*". Modify the EmitString() method to take a "const char*". llvm-svn: 68741
* Silence unused variable warning.Devang Patel2009-04-091-1/+1
| | | | llvm-svn: 68735
* ignore register zero in isRegTiedToUseOperand, following the example ofChris Lattner2009-04-091-1/+1
| | | | | | isRegTiedToDefOperand. Thanks to Bob for pointing this out! llvm-svn: 68734
* Give register alias checking the hash table treatment too.Owen Anderson2009-04-091-1/+3
| | | | llvm-svn: 68730
* Use a StringMap instead of std::map for storing std::string->DIE* maps. ThisBill Wendling2009-04-091-10/+10
| | | | | | gives a micro speedup in the Dwarf writer. llvm-svn: 68728
* llvm.dbg.func_start also defines beginning of function scope.Devang Patel2009-04-091-7/+3
| | | | llvm-svn: 68727
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-099-35/+28
| | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). llvm-svn: 68714
* The way we are trying to figure out banksel immediate operand may yield ↵Sanjiv Gupta2009-04-091-2/+3
| | | | | | different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand. llvm-svn: 68713
* reg0 references are not real registers. This fixes a crash on the Chris Lattner2009-04-091-1/+1
| | | | | | attached testcase. llvm-svn: 68712
* Arguments to indirect calls were being passed incorrectly. They are not ↵Sanjiv Gupta2009-04-091-2/+6
| | | | | | fixed to start after return value. llvm-svn: 68705
* Fix code size computation on x86-64, patch by Zoltan Varga!Chris Lattner2009-04-091-1/+1
| | | | llvm-svn: 68690
* r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were ↵Sanjiv Gupta2009-04-091-5/+10
| | | | | | custom lowering an ADD to ADDC. llvm-svn: 68671
* Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,Dan Gohman2009-04-092-45/+78
| | | | | | | | | | | | | | | in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the way it checked for live-out values, and simplify the way it find users by using SDNode::use_iterator's (relatively) new features. Also, make it slightly more permissive on targets with free truncates. In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are larger than necessary. If the target's SwitchAmountTy has enough bits, use it. This exposes the truncate to optimization early, enabling more optimizations. llvm-svn: 68670
* Convert TargetRegisterInfo's super-register checking to use a pre-computed ↵Owen Anderson2009-04-091-3/+5
| | | | | | hash table just like subregister checking does. llvm-svn: 68669
* Don't copy the operand of a SwitchInst into virtual registers asDan Gohman2009-04-091-3/+13
| | | | | | | | | | eagerly. This helps avoid CopyToReg nodes in some cases where they aren't needed, and also helps subsequent optimizer heuristics in cases where the extra nodes would cause the node to appear to have multiple results. This doesn't have a significant impact currently; it'll help an upcoming change. llvm-svn: 68667
* Fix grammaros in comments.Dan Gohman2009-04-091-2/+2
| | | | llvm-svn: 68666
* Add sys::Path::makeAbsolute().Daniel Dunbar2009-04-091-0/+12
| | | | llvm-svn: 68663
* If subprogram type is not tagged as DW_TAG_subroutine_type then use it ↵Devang Patel2009-04-081-2/+3
| | | | | | directly as a return value type. llvm-svn: 68647
* Re-apply 68552.Rafael Espindola2009-04-0817-194/+234
| | | | | | Tested by bootstrapping llvm-gcc and using that to build llvm. llvm-svn: 68645
* Fix PR3795: Apply Dan's suggested fix forBob Wilson2009-04-081-2/+6
| | | | | | ARMTargetLowering::isLegalAddressingMode. llvm-svn: 68619
* Soft float support for FREM.Duncan Sands2009-04-082-0/+14
| | | | llvm-svn: 68614
* Soft float support for undef. Reported by Xerxes Rånby.Duncan Sands2009-04-082-0/+6
| | | | llvm-svn: 68607
* Avoid a hard coded constant.Rafael Espindola2009-04-081-1/+1
| | | | llvm-svn: 68603
* Emit .line debug directives for stoppoints. The debug location is retrieved ↵Sanjiv Gupta2009-04-085-24/+19
| | | | | | by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes. llvm-svn: 68602
* Instcombine should not promote whole computation trees to "strange"Chris Lattner2009-04-081-0/+20
| | | | | | | | | | | | | integer types, unless they are already strange. This prevents it from turning the code produced by SROA into crazy libcalls and stuff that the code generator can't handle. In the attached example, the result was an i96 multiply that caused the x86 backend to assert. Note that if TargetData had an idea of what the legal types are for a target that this could be used to stop instcombine from introducing i64 muls, as Scott wanted. llvm-svn: 68598
* Handle indirect function calls.Sanjiv Gupta2009-04-085-89/+346
| | | | | | | Every function has the address of its frame in the beginning of code section. The frame address is retrieved and used to pass arguments. llvm-svn: 68597
* disable this code for now, re-breaking PR2975, but fixingChris Lattner2009-04-081-3/+3
| | | | | | a testcase I'm about to attach to that pr. llvm-svn: 68592
* Remove AllowInverse: it leaks memory and is not the rightChris Lattner2009-04-081-21/+0
| | | | | | abstraction for CommandLine. llvm-svn: 68588
* change printStringChar to emit characters as unsigned char instead of char,Chris Lattner2009-04-081-9/+5
| | | | | | | | | | | avoiding sign extension for the top octet. For "negative" chars, we'd print stuff like: .asciz "\702... now we print: .asciz "\302... llvm-svn: 68577
* Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman2009-04-089-62/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. llvm-svn: 68576
* Revert prev. patch for now.Devang Patel2009-04-071-4/+6
| | | | llvm-svn: 68569
* Temporarily revert r68552. This was causing a failure in the self-hosting LLVMBill Wendling2009-04-0717-231/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | builds. --- Reverse-merging (from foreign repository) r68552 into '.': U test/CodeGen/X86/tls8.ll U test/CodeGen/X86/tls10.ll U test/CodeGen/X86/tls2.ll U test/CodeGen/X86/tls6.ll U lib/Target/X86/X86Instr64bit.td U lib/Target/X86/X86InstrSSE.td U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86RegisterInfo.cpp U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86CodeEmitter.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86InstrInfo.h U lib/Target/X86/X86ISelDAGToDAG.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86ISelLowering.h U lib/Target/X86/X86InstrInfo.cpp U lib/Target/X86/X86InstrBuilder.h U lib/Target/X86/X86RegisterInfo.td llvm-svn: 68560
* Right now DBG_LABEL are required for llvm.dbg.region_start and ↵Devang Patel2009-04-071-6/+4
| | | | | | llvm.dbg.region_end in non-fast mode also. llvm-svn: 68559
* Reduce code duplication on the TLS implementation.Rafael Espindola2009-04-0717-193/+231
| | | | | | | | | | This introduces a small regression on the generated code quality in the case we are just computing addresses, not loading values. Will work on it and on X86-64 support. llvm-svn: 68552
* Don't attempt to handle aggregate argument values in FastISel; letDan Gohman2009-04-071-1/+5
| | | | | | SelectionDAG do those. This fixes PR3955. llvm-svn: 68546
* PR2985 / <rdar://problem/6584986>Jim Grosbach2009-04-077-194/+318
| | | | | | | | | | When compiling in Thumb mode, only the low (R0-R7) registers are available for most instructions. Breaking the low registers into a new register class handles this. Uses of R12, SP, etc, are handled explicitly where needed with copies inserted to move results into low registers where the rest of the code generator can deal with them. llvm-svn: 68545
* fix style.Torok Edwin2009-04-071-3/+3
| | | | llvm-svn: 68542
* Another attempt at fixing PR2975.Torok Edwin2009-04-071-0/+25
| | | | | | Types can have references to eachother, so we can't just call destroy on them. llvm-svn: 68523
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