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* [PDB] Add a module descriptor for every object fileReid Kleckner2017-06-131-22/+12
| | | | | | | | | | | | | | Summary: Expose the module descriptor index and fill it in for section contributions. Reviewers: zturner Subscribers: llvm-commits, ruiu, hiraditya Differential Revision: https://reviews.llvm.org/D34126 llvm-svn: 305296
* [MIPS] BuildCondBr should preserve MO flagsSimon Dardis2017-06-131-6/+3
| | | | | | | | | | | | | | | | | While simplifying branches in the MachineInstr representation, the routine BuildCondBr must preserve flags on register MachineOperands. In particular, it must preserve the <undef> flag. This fixes a bug that is unlikely to occur in any real scenario, but which bugpoint is likely to introduce. Patch By Nick Johnson! Reviewers: ahatanak, sdardis Differential Revision: https://reviews.llvm.org/D34041 llvm-svn: 305290
* [Hexagon] Stop pmpy recognition when shift conversion failsKrzysztof Parzyszek2017-06-131-1/+2
| | | | | | | The conversion of shifts from right shifts to left shifts may fail. In such case, the pmpy recognition cannot proceed. llvm-svn: 305289
* [ARM] Add scheduling classes for VFNM[AS]Oliver Stannard2017-06-131-6/+12
| | | | | | | | | | The VFNM[AS] instructions did not have scheduling information attached, which was causing assertion failures with the Cortex-A57 scheduling model and -fp-contract=fast, because the Cortex-A57 sched model claims to be complete. Differential Revision: https://reviews.llvm.org/D34139 llvm-svn: 305288
* Strip UTF8 BOM that got added in rL305091Simon Pilgrim2017-06-131-1/+0
| | | | | | Seems my recent move to VS2017 has resulted in a few text editor issues..... llvm-svn: 305285
* [X86][SSE] Refactor getTargetConstantBitsFromNode to avoid large APInts ↵Simon Pilgrim2017-06-131-36/+66
| | | | | | | | | | (PR32037) Much of PR32037's compile time regression is due to getTargetConstantBitsFromNode always creating large (>64bit) APInts during the bitcasting from the source data to the destination bitwidth. This commit avoids this bitcast stage if the data is already the correct bitwidth. llvm-svn: 305284
* Strip UTF8 BOM that got added for some reason in rL305163Simon Pilgrim2017-06-131-1/+1
| | | | llvm-svn: 305282
* PPCISelLowering.cpp: Fix warnings in r305214. [-Wdocumentation]NAKAMURA Takumi2017-06-131-3/+3
| | | | llvm-svn: 305277
* [AVX-512] Mark masked VPCMP instructions as commutable.Craig Topper2017-06-132-14/+27
| | | | llvm-svn: 305276
* [AVX-512] Mark masked version of vpcmpeq as being commutable.Craig Topper2017-06-131-0/+1
| | | | llvm-svn: 305275
* [X86] Add masked integer compare instructions to load folding tables.Craig Topper2017-06-131-0/+58
| | | | llvm-svn: 305274
* Inliner: Avoid calling shouldInline until it's absolutely necessaryDavid Blaikie2017-06-131-15/+21
| | | | | | | | | This restores the order of evaluation (& conditionalized evaluation) of isTriviallyDeadInstruction, InlineHistoryIncludes, and shouldInline (with the addition of a shouldInline call after isTriviallyDeadInstruction) from before r305245. llvm-svn: 305267
* [WebAssembly] Fix symbol type for addresses of external functionsSam Clegg2017-06-131-2/+8
| | | | | | | | | | | | | | These symbols were previously not being marked as functions so were appearing as globals instead, and with the incorrect relocation type. Without this fix, objects that take address of external functions include them as global imports rather than function imports which then fails at link time. Differential Revision: https://reviews.llvm.org/D34068 llvm-svn: 305263
* Fix signed/unsigned comparison warning; NFCGeorge Burgess IV2017-06-131-1/+1
| | | | llvm-svn: 305262
* Revert "Revert "Fix alignment bug in COFF emission.""Eric Beckmann2017-06-131-46/+67
| | | | | | | | | | This revert was done so that my other patch to add test framework could land separately. Now the revert can be reverted and this patch can reland. This reverts commit 18b3c75b2b0d32601fb60a06b9672c33d6f0dff9. llvm-svn: 305259
* Update the test framework for llvm-cvtres to be more comprehensive.Eric Beckmann2017-06-131-15/+21
| | | | | | | | | | Summary: Added test cases for multiple machine types, file merging, multiple languages, and more resource types. Also fixed new bugs these tests exposed. Subscribers: javed.absar, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D34047 llvm-svn: 305258
* Revert "Fix alignment bug in COFF emission."Eric Beckmann2017-06-131-88/+61
| | | | | | | | | I accidentally combined this patch with one for adding more tests, they should be separated. This reverts commit 3da218a523be78df32e637d3446ecf97c9ea0465. llvm-svn: 305257
* Fix alignment bug in COFF emission.Eric Beckmann2017-06-131-61/+88
| | | | | | | | | | | | Summary: Fix alignment issue in D34020, by aligning all sections to 8 bytes. Reviewers: zturner Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D34072 llvm-svn: 305256
* [WebAssembly] MC: Fix value of R_WEBASSEMBLY_TABLE_INDEX relocationsSam Clegg2017-06-121-14/+20
| | | | | | | | | | | | | Previously we were writing the value function index space value but for these types of relocations we want to be writing the table element index space value. Add a test case for these relocation types that fails without this change. Differential Revision: https://reviews.llvm.org/D33962 llvm-svn: 305253
* [IR] Stop deleting other signatures of User::operator new when we override ↵Craig Topper2017-06-121-18/+0
| | | | | | | | | | | | | | | | | | one signature in a class derived from User User has 3 signatures for operator new today. They take a single size, a size and a number of users, and a size, number of users, and descriptor size. Historically there used to only be one signature that took size and a number of uses. Long ago derived classes implemented their own versions that took just a size and would call the size and use count version. Then they left an unimplemented signature for the size and use count signature from User. As we moved to C++11 this unimplemented signature because = delete. Since then operator new has picked up two new signatures for operator new. But when the 3 argument version was added it was never added to the delete list in all of the derived classes where the 2 argument version is deleted. This makes things inconsistent. I believe once one version of operator new is created in a derived class name hiding will take care of making all of the base class signatures unavailable. So I don't think the deleted lines are needed at all. This patch removes all of the deletes in cases where there is an override or there is already a delete of another signature (that should trigger name hiding too). Differential Revision: https://reviews.llvm.org/D34120 llvm-svn: 305251
* [pdb] Don't choke on unknown symbol types.Zachary Turner2017-06-121-6/+48
| | | | | | | | | When we get an unknown symbol type, we might as well at least dump it. Same goes for round-tripping through YAML, we can dump the record contents as raw bytes even if we don't know how to interpret it semantically. llvm-svn: 305248
* Inliner: Don't remove calls to readnone+nounwind (but not always_inline) ↵David Blaikie2017-06-121-9/+10
| | | | | | functions in the AlwaysInliner llvm-svn: 305245
* Fix an assertion failure when duplicate dbg.declares are present.Adrian Prantl2017-06-121-0/+7
| | | | | | | | | | This fixes PR33157. https://bugs.llvm.org//show_bug.cgi?id=33157 We might also think about disallowing duplicate dbg.declare intrinsics entirely, but this may complicate some passes needlessly. llvm-svn: 305244
* fix typos/formatting; NFCSanjay Patel2017-06-122-7/+4
| | | | llvm-svn: 305243
* Support: Don't set RLIMIT_AS on child processes when applying a memory limitDavid Blaikie2017-06-121-10/+0
| | | | | | | | | | | | | | | | | | | | | | It doesn't seem relevant to set an address space limit - this isn't important in any sense that I'm aware & it gets in the way of things that use a lot of address space, like llvm-symbolizer. This came up when I realized that bugpoint regression tests were much slower with -gsplit-dwarf than plain -g. Turned out that bugpoint subprocesses (opt, etc) were crashing and doing symbolization - but bugpoint runs those subprocesses with a 400MB memory limit. So with plain -g, mmaping the opt binary would exceed the memory limit, fail, and thus be really fast - no symbolization occurred. Whereas with -gsplit-dwarf, comically, having less to map in, it would succeed and then spend lots of time symbolizing. I've fixed at least the critical part of bugpoint's perf problem there by adding an option to allow bugpoint to disable symbolization. Thus improving the perfromance for -gsplit-dwarf and making the -g-esque speed available without this quirk/accidental benefit. llvm-svn: 305242
* Slightly better fix for dealing with no-id-stream PDBs.Zachary Turner2017-06-121-0/+10
| | | | | | | | | The last fix required the user to manually add the required feature. This caused an LLD test to fail because I failed to update LLD. In practice we can hide this logic so it can just be transparently added when we write the PDB. llvm-svn: 305236
* [llvm-pdbdump] Don't fail on PDBs with no ID stream.Zachary Turner2017-06-121-0/+4
| | | | | | | | | Older PDBs don't have this. Its presence is detected by using the various "feature" flags that come at the end of the PDB Stream. Detect this, and don't try to dump the ID stream if the features tells us it's not present. llvm-svn: 305235
* [RS4GC] Drop invalid metadata after pointers are relocatedAnna Thomas2017-06-121-17/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: After RS4GC, we should drop metadata that is no longer valid. These metadata is used by optimizations scheduled after RS4GC, and can cause a miscompile. One such metadata is invariant.load which is used by LICM sinking transform. After rewriting statepoints, the address of a load maybe relocated. With invariant.load metadata on a load instruction, LICM sinking assumes the loaded value (from a dererenceable address) to be invariant, and rematerializes the load operand and the load at the exit block. This transforms the IR to have an unrelocated use of the address after a statepoint, which is incorrect. Other metadata we conservatively remove are related to dereferenceability and noalias metadata. This patch drops such metadata on store and load instructions after rewriting statepoints. Reviewers: reames, sanjoy, apilipenko Reviewed by: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33756 llvm-svn: 305234
* AMDGPU/GlobalISel: Mark 32-bit G_ADD as legalTom Stellard2017-06-121-0/+2
| | | | | | | | | | | | Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D33992 llvm-svn: 305232
* [ADT] Reduce duplication between {Contextual,}FoldingSet; NFCGeorge Burgess IV2017-06-121-21/+21
| | | | | | | | | | | | | This is a precursor to another change (coming soon) that aims to make FoldingSet's API more type-safe. Without this, the type-safety change would just duplicate 4 more public methods between the already very similar classes. This renames FoldingSetImpl to FoldingSetBase so it's consistent with the FooBase -> FooImpl<T> -> Foo<T> convention we seem to have with other containers. llvm-svn: 305231
* AArch64: don't try to emit an add (shifted reg) for SP.Tim Northover2017-06-121-0/+8
| | | | | | | | | | The "Add/sub (shifted reg)" instructions use the 31 encoding for xzr and wzr rather than the SP, so we need to use different variants. Situations where this actually comes up are rare enough (see test-case) that I think falling back to DAG is fine. llvm-svn: 305230
* Fix a null pointer dereference in llvm-pdbutil pretty.Zachary Turner2017-06-121-2/+3
| | | | | | | | Static data members were causing a problem because I mistakenly assumed all members would affect a class's layout and so the Layout member would be non-null. llvm-svn: 305229
* SplitKit: Fix partially live subreg splittingMatthias Braun2017-06-121-2/+1
| | | | | | | | | Fix thinko/typo in subreg aware liverange splitting logic. I'm not sure how to write a proper testcase for this. The original problem only happens on an out-of-tree target. Forcing subreg enabled targets to spill and split in a predictable way is near impossible. llvm-svn: 305228
* IR: Replace the "Linker Options" module flag with "llvm.linker.options" ↵Peter Collingbourne2017-06-126-44/+41
| | | | | | | | | | named metadata. The new metadata is easier to manipulate than module flags. Differential Revision: https://reviews.llvm.org/D31349 llvm-svn: 305227
* [llvm-ar] Make llvm-lib behave more like the MSVC archiverReid Kleckner2017-06-121-6/+8
| | | | | | | | | | | | | | | | | | | | | | Summary: Use the filepath used to open the archive member as the archive member name instead of the file basename. This path might be absolute or relative. This is important because the archive member name will show up in the PDB, and we want our PDBs to look as much like MSVC's as possible. This also helps avoid an issue in our PDB module descriptor writing code, which assumes that all module names are unique. Relative paths still aren't guaranteed to be unique, but they're much better than basenames, which definitely aren't unique. Reviewers: ruiu, zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33575 llvm-svn: 305223
* Same expressions on both sides of the returnSylvestre Ledru2017-06-121-1/+1
| | | | | | | | | | | | | | | | | | | Summary: I guess we want PointerToMemberFunction & PointerToDataMember Fix coverity cid 1376038 Reviewers: zturner Reviewed By: zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34110 llvm-svn: 305219
* [PowerPC] Match vec_revb builtins to P9 instructions.Tony Jiang2017-06-124-7/+105
| | | | | | | | | | | | Power9 has instructions that will reverse the bytes within an element for all sizes (half-word, word, double-word and quad-word). These can be used for the vec_revb builtins in altivec.h. However, we implement these to match vector shuffle nodes as that will cover both the builtins and vector shuffles that occur in the SDAG through other means. Differential Revision: https://reviews.llvm.org/D33690 llvm-svn: 305214
* [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.Tony Jiang2017-06-124-5/+51
| | | | | | | | | | | Note that if we need the result of both the divide and the modulo then we compute the modulo based on the result of the divide and not using the new hardware instruction. Commit on behalf of STEFAN PINTILIE. Differential Revision: https://reviews.llvm.org/D33940 llvm-svn: 305210
* AMDGPU: Don't add same implicit use multiple timesMatt Arsenault2017-06-121-4/+2
| | | | | | | For the last component, the same register use was added as an implicit use and another implicit kill use. llvm-svn: 305205
* [SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just ↵Geoff Berry2017-06-121-14/+1
| | | | | | | | | | | | | | | | | | | | | -fno-math-errno Summary: This change enables the sin(x) cos(x) -> sincos(x) optimization on GNU target triples. This optimization was being inhibited when -ffast-math wasn't set because sincos in GLibC does not set errno, while sin and cos do. However, this optimization will only run if the attributes on the sin/cos calls include readnone, which is how clang represents the fact that it doesn't care about the errno values set by these functions (via the -fno-math-errno flag). Reviewers: hfinkel, bogner Subscribers: mcrosier, javed.absar, llvm-commits, paul.redmond Differential Revision: https://reviews.llvm.org/D32921 llvm-svn: 305204
* AMDGPU: Teach isLegalAddressingMode about flat offsetsMatt Arsenault2017-06-121-3/+11
| | | | | | | Also fix reporting r+r as a valid addressing mode without offsets. llvm-svn: 305203
* AMDGPU: Start selecting flat instruction offsetsMatt Arsenault2017-06-122-18/+42
| | | | llvm-svn: 305201
* AMDGPU: Verify that flat offsets aren't used pre-GFX9Matt Arsenault2017-06-121-2/+11
| | | | | | | For convenience the operand is always present in the instruction, but it isn't valid to use except on GFX9. llvm-svn: 305200
* [Falkor] Enable SW Prefetch.Haicheng Wu2017-06-121-0/+4
| | | | | | | | SW prefetch is good for Falkor. Differential Revision: http://reviews.llvm.org/D34084 llvm-svn: 305199
* AMDGPU: Start adding offset fields to flat instructionsMatt Arsenault2017-06-125-25/+94
| | | | llvm-svn: 305194
* StackColoring: smarter check for slot overlapThan McIntosh2017-06-121-60/+177
| | | | | | | | | | | | | | | | | | | | | | | Summary: The old check for slot overlap treated 2 slots `S` and `T` as overlapping if there existed a CFG node in which both of the slots could possibly be active. That is overly conservative and caused stack blowups in Rust programs. Instead, check whether there is a single CFG node in which both of the slots are possibly active *together*. Fixes PR32488. Patch by Ariel Ben-Yehuda <ariel.byd@gmail.com> Reviewers: thanm, nagisa, llvm-commits, efriedma, rnk Reviewed By: thanm Subscribers: dotdash Differential Revision: https://reviews.llvm.org/D31583 llvm-svn: 305193
* [DAG] add helper to bind memop chains; NFCISanjay Patel2017-06-124-49/+23
| | | | | | | | | | This step is just intended to reduce code duplication rather than change any functionality. A follow-up would be to replace PPCTargetLowering::spliceIntoChain() usage with this new helper. Differential Revision: https://reviews.llvm.org/D33649 llvm-svn: 305192
* [InstCombine] lshr (sext iM X to iN), N-M --> zext (ashr X, min(N-M, M-1)) to iNSanjay Patel2017-06-121-4/+10
| | | | | | | | | | | | | | | | | | | This is a follow-up to https://reviews.llvm.org/D33879 / https://reviews.llvm.org/rL304939 , and was discussed in https://reviews.llvm.org/D33338. We prefer this form because a narrower shift may be cheaper, and we can more easily fold a zext than a sext. http://rise4fun.com/Alive/slVe Name: shz %s = sext i8 %x to i12 %r = lshr i12 %s, 4 => %a = ashr i8 %x, 4 %r = zext i8 %a to i12 llvm-svn: 305190
* Const correctness for TTI::getRegisterBitWidthDaniel Neilson2017-06-1210-10/+10
| | | | | | | | | | | | | | Summary: The method TargetTransformInfo::getRegisterBitWidth() is declared const, but the type erasing implementation classes (TargetTransformInfo::Concept & TargetTransformInfo::Model) that were introduced by Chandler in https://reviews.llvm.org/D7293 do not have the method declared const. This is an NFC to tidy up the const consistency between TTI and its implementation. Reviewers: chandlerc, rnk, reames Reviewed By: reames Subscribers: reames, jfb, arsenm, dschuff, nemanjai, nhaehnle, javed.absar, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D33903 llvm-svn: 305189
* [X86][SSE] Change memop fragment to inherit from vec128load with local ↵Simon Pilgrim2017-06-121-8/+4
| | | | | | | | | | | | alignment controls First possible step towards merging SSE/AVX memory folding pattern fragments. Also allows us to remove the duplicate non-temporal load logic. Differential Revision: https://reviews.llvm.org/D33902 llvm-svn: 305184
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