summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* back out r101423 and r101397, they break llvm-gcc self-host on darwin10Gabor Greif2010-04-1641-536/+539
| | | | llvm-svn: 101434
* fix PR6832: we were using the alignment of a pointer when we Chris Lattner2010-04-161-6/+4
| | | | | | wanted the alignment of the pointee. llvm-svn: 101432
* improve comments.Chris Lattner2010-04-161-47/+70
| | | | llvm-svn: 101429
* pull all the ConvertToScalarInfo code together into oneChris Lattner2010-04-161-562/+568
| | | | | | place. llvm-svn: 101427
* more refactoring: suck some stuff out of SRoA into Chris Lattner2010-04-161-88/+96
| | | | | | ConvertToScalarInfo. llvm-svn: 101425
* shift intrinsic operandGabor Greif2010-04-161-1/+1
| | | | llvm-svn: 101423
* introduce a new ConvertToScalarInfo struct to simplify Chris Lattner2010-04-151-62/+83
| | | | | | | CanConvertToScalar/MergeInType. Eliminate a pointless LLVMContext argument to MergeInType. llvm-svn: 101422
* Avoid sinking machine instructions into a loop.Jakob Stoklund Olesen2010-04-151-0/+11
| | | | | | | | | | MachineLoopInfo is already available when MachineSinking runs, so the check is free. There is no test case because it would require a critical edge into a loop, and CodeGenPrepare splits those. This check is just to be extra careful. llvm-svn: 101420
* Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen2010-04-151-1/+1
| | | | | | am2offset. Modified the instruction table entry and added a new test case. llvm-svn: 101415
* Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle ↵Evan Cheng2010-04-152-62/+1
| | | | | | is doing the right thing and codegen looks correct for both Thumb and Thumb2. llvm-svn: 101410
* tidy interface to isOnlyCopiedFromConstantGlobalChris Lattner2010-04-151-15/+14
| | | | llvm-svn: 101405
* reapply r101364, which has been backed out in r101368Gabor Greif2010-04-1540-540/+537
| | | | | | | | | | | | | with a fix rotate CallInst operands, i.e. move callee to the back of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101397
* Fix PR6847. RegScavenger should ignore DebugValues.Jakob Stoklund Olesen2010-04-151-0/+3
| | | | llvm-svn: 101392
* Make sure the initialization of a GC root is after its definition.Nicolas Geoffray2010-04-151-3/+4
| | | | llvm-svn: 101388
* Revert r100896 and around - this breaks the only mingw32 buildbot we have.Anton Korobeynikov2010-04-151-2/+2
| | | | llvm-svn: 101387
* prune includesGabor Greif2010-04-151-2/+0
| | | | llvm-svn: 101385
* ARM SelectDYN_ALLOC should emit a copy from SP rather than referencing SP ↵Evan Cheng2010-04-151-1/+1
| | | | | | | | directly. In cases where there are two dyn_alloc in the same BB it would have caused the old SP value to be reused and badness ensues. rdar://7493908 llvm is generating poor code for dynamic alloca, I'll fix that later. llvm-svn: 101383
* DEBUG() print out "Unknown format" msg.Johnny Chen2010-04-151-1/+3
| | | | llvm-svn: 101382
* ReuseFrameIndexVals is used in multiple files, so it can't be static.Dan Gohman2010-04-152-3/+9
| | | | llvm-svn: 101379
* EnablePPC64RS and EnablePPC32RS are used in multiple files, so theyDan Gohman2010-04-152-4/+11
| | | | | | can't be static. llvm-svn: 101377
* Fix a bunch of namespace polution.Dan Gohman2010-04-1514-22/+52
| | | | llvm-svn: 101376
* Fix namespace polution.Dan Gohman2010-04-151-0/+4
| | | | llvm-svn: 101375
* Make getPredecessorWithUniqueSuccessorForBB return the unique successorDan Gohman2010-04-151-12/+10
| | | | | | in addition to the predecessor. llvm-svn: 101374
* typosGabor Greif2010-04-151-2/+2
| | | | llvm-svn: 101371
* back out r101364, as it trips the linux nightlybot on some clang C++ testsGabor Greif2010-04-1540-537/+540
| | | | llvm-svn: 101368
* rotate CallInst operands, i.e. move callee to the backGabor Greif2010-04-1540-540/+537
| | | | | | | | | | of the operand array the motivation for this patch are laid out in my mail to llvm-commits: more efficient access to operands and callee, faster callgraph-construction, smaller compiler binary llvm-svn: 101364
* enhance the load/store narrowing optimization to handle aChris Lattner2010-04-151-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | tokenfactor in between the load/store. This allows us to optimize test7 into: _test7: ## @test7 ## BB#0: ## %entry movl (%rdx), %eax ## kill: SIL<def> ESI<kill> movb %sil, 5(%rdi) ret instead of: _test7: ## @test7 ## BB#0: ## %entry movl 4(%esp), %ecx movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF andl 4(%ecx), %eax movzbl 8(%esp), %edx shll $8, %edx addl %eax, %edx movl 12(%esp), %eax movl (%eax), %eax movl %edx, 4(%ecx) ret llvm-svn: 101355
* teach codegen to turn trunc(zextload) into load when possible.Chris Lattner2010-04-151-1/+1
| | | | | | | | This doesn't occur much at all, it only seems to formed in the case when the trunc optimization kicks in due to phase ordering. In that case it is saves a few bytes on x86-32. llvm-svn: 101350
* add a simple dag combine to replace trivial shl+lshr withChris Lattner2010-04-151-0/+9
| | | | | | and. This happens with the store->load narrowing stuff. llvm-svn: 101348
* Implement rdar://7860110 (also in target/readme.txt) narrowingChris Lattner2010-04-152-35/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a load/or/and/store sequence into a narrower store when it is safe. Daniel tells me that clang will start producing this sort of thing with bitfields, and this does trigger a few dozen times on 176.gcc produced by llvm-gcc even now. This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll into: movl %eax, 36(%rdi) instead of: movl $4294967295, %eax ## imm = 0xFFFFFFFF andq 32(%rdi), %rax shlq $32, %rcx addq %rax, %rcx movq %rcx, 32(%rdi) and each of the testcases into a single store. Each of them used to compile into craziness like this: _test4: movl $65535, %eax ## imm = 0xFFFF andl (%rdi), %eax shll $16, %esi addl %eax, %esi movl %esi, (%rdi) ret llvm-svn: 101343
* Add more const qualifiers for LLVM IR pointers in CodeGen.Dan Gohman2010-04-158-24/+26
| | | | llvm-svn: 101342
* Fix build.Anders Carlsson2010-04-151-1/+1
| | | | llvm-svn: 101335
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-1554-497/+515
| | | | llvm-svn: 101334
* Allow lowering for palignr instructions for mmx sized vectors. AddEric Christopher2010-04-152-3/+23
| | | | | | patterns to handle the lowering. llvm-svn: 101331
* More 80 violations.Evan Cheng2010-04-155-29/+54
| | | | llvm-svn: 101330
* Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.Johnny Chen2010-04-152-4/+7
| | | | llvm-svn: 101329
* 80 col violations.Evan Cheng2010-04-151-8/+16
| | | | llvm-svn: 101325
* Add comment.Devang Patel2010-04-151-0/+3
| | | | llvm-svn: 101317
* There is no need to track compile unit offsets if there is only one compile ↵Devang Patel2010-04-142-6/+0
| | | | | | unit. llvm-svn: 101315
* Remove dead code.Devang Patel2010-04-141-4/+0
| | | | llvm-svn: 101314
* IPO needs ScalarOpts and InstCombine in its libsTobias Grosser2010-04-141-0/+2
| | | | | | | | The commit "Adding IPSCCP and Internalize passes to the C-bindings" introduced new dependencies for IPO. Add these to the CMAKE build as otherwise the BUILD_SHARED_LIBS=1 build fails. llvm-svn: 101313
* Fixed another assert exposed by fuzzing. Now, the DisassembleVFPLdStMulFrm()Johnny Chen2010-04-141-0/+6
| | | | | | | function checks whether we have a valid submode for VLDM/VSTM (must be either "ia" or "db") before calling ARM_AM::getAM5Opc(AMSubMode, unsigned char). llvm-svn: 101306
* Add -arm-long-calls option to force calls to be indirect. This makes theJim Grosbach2010-04-141-2/+44
| | | | | | | | kernel linker happier when dealing with kexts. Radar 7805069 llvm-svn: 101303
* Constify GetConstantStringInfo.Dan Gohman2010-04-141-12/+13
| | | | llvm-svn: 101298
* Don't use DILocation when processing a DebugLoc.Nicolas Geoffray2010-04-141-8/+9
| | | | llvm-svn: 101294
* For t2BFI disassembly, apply the same error checking as in r101205.Johnny Chen2010-04-142-3/+6
| | | | | | Change the error msg to read "Encoding error: msb < lsb". llvm-svn: 101293
* Move a bunch of methods from CallSite to CallSiteBase, so that they canDan Gohman2010-04-141-77/+0
| | | | | | be used in ImmutableCallSite too. llvm-svn: 101292
* Fixed another assert exposed by fuzzing. The utility function getRegisterEnum()Johnny Chen2010-04-144-319/+352
| | | | | | | | | | | | | | was asserting because the (RegClass, RegNum) combination doesn't make sense from an encoding point of view. Since getRegisterEnum() is used all over the place, to change the code to check for encoding error after each call would not only bloat the code, but also make it less readable. An Err flag is added to the ARMBasicMCBuilder where a client can set a non-zero value to indicate some kind of error condition while building up the MCInst. ARMBasicMCBuilder::BuildIt() checks this flag and returns false if a non-zero value is detected. llvm-svn: 101290
* - Code clean up to reduce indentation.Evan Cheng2010-04-141-51/+54
| | | | | | - TryToOptimizeStoreOfMallocToGlobal should check if TargetData is available and bail out if it is not. The transformations being done requires TD. llvm-svn: 101285
* Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson2010-04-141-9/+16
| | | | | | | does not have a legal type. The legalizer does not know how to handle those nodes. Radar 7854640. llvm-svn: 101282
OpenPOWER on IntegriCloud