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* CMake: fixes 64 bit Visual Studio IDE build. Fixes bug 4936.Oscar Fuentes2010-05-131-1/+6
| | | | | | Patch by Dimitry Andric! llvm-svn: 103727
* Add a utility function for conservatively clearing kill flags, and makeDan Gohman2010-05-132-1/+13
| | | | | | use of it in MachineCSE. llvm-svn: 103726
* An Instruction has a trivial kill only if its use is in the sameDan Gohman2010-05-131-2/+5
| | | | | | basic block. llvm-svn: 103725
* MC: Factor out MCAssembler::ComputeFragmentSize.Daniel Dunbar2010-05-131-36/+44
| | | | llvm-svn: 103724
* MC: Add section layout order indices to MCSectionData.Daniel Dunbar2010-05-131-0/+4
| | | | llvm-svn: 103715
* MC: Move ordinal calculation, to make sure fragments synthesized for layout ↵Daniel Dunbar2010-05-131-21/+21
| | | | | | get assigned ordinals properly. llvm-svn: 103711
* MC: Create dummy fragments to avoid ever having empty sections, which ↵Daniel Dunbar2010-05-131-8/+9
| | | | | | simplifies layout. llvm-svn: 103710
* MC: Add MCAsmLayout::FragmentReplaced() helper function.Daniel Dunbar2010-05-131-4/+6
| | | | llvm-svn: 103709
* Properly set thread-local flag on globals during cpp emissionAnton Korobeynikov2010-05-131-0/+5
| | | | llvm-svn: 103702
* Remove heinous tabs.Nick Lewycky2010-05-131-7/+7
| | | | llvm-svn: 103700
* Replace the core comparison login in merge functions. We can now mergeNick Lewycky2010-05-131-192/+276
| | | | | | | | | | | | | | | | | | | | | | | | vector<>::push_back() in: int foo(vector<int> &a, vector<unsigned> &b) { a.push_back(10); b.push_back(11); } to two calls to the same push_back function, or fold away the two copies of push_back() in: struct T { int; }; struct S { char; }; vector<T*> t; vector<S*> s; void f(T *x) { t.push_back(x); } void g(S *x) { s.push_back(x); } but leave f() and g() separate, since they refer to two different global variables. llvm-svn: 103698
* Fix -Asserts warning.Daniel Dunbar2010-05-131-4/+2
| | | | llvm-svn: 103697
* MC: Eliminate MCSectionData::{,Address,File}Size, which can now be computed byDaniel Dunbar2010-05-131-42/+28
| | | | | | utility functions. llvm-svn: 103695
* Fix -Asserts warning.Daniel Dunbar2010-05-131-0/+1
| | | | llvm-svn: 103694
* MC: Switch to using explicit MCAlignFragments with OnlyAlignAddress bit insteadDaniel Dunbar2010-05-131-22/+31
| | | | | | | | of manually doing padding/editing layout in LayoutSection(). - This probably seems like six-of-one and half-dozen of another, but there is a method to my madness. llvm-svn: 103693
* Bring back VLD1q and VST1q and use them for reloading / spilling Q ↵Evan Cheng2010-05-132-29/+83
| | | | | | registers. This allows folding loads and stores into VMOVQ. llvm-svn: 103692
* MC: Add MCAlignFragment::OnlyAlignAddress bit. This is a bit of magic that ↵Daniel Dunbar2010-05-131-1/+17
| | | | | | says the align fragment shouldn't contribute to the logical section size, it is will be used for cleaning up the code to handle section alignment. llvm-svn: 103690
* MC: Add MCSectionData::AddressSize, which is the size of the address space ↵Daniel Dunbar2010-05-131-6/+15
| | | | | | consumed by the section. This can differ from both the section logical size, and the section size on disk (although the current code handles this without making an explicit distinction). llvm-svn: 103689
* Take allocation hints from copy instructions to/from physregs.Jakob Stoklund Olesen2010-05-131-18/+68
| | | | | | This causes way more identity copies to be generated, ripe for coalescing. llvm-svn: 103686
* More asserts around physreg usesJakob Stoklund Olesen2010-05-131-1/+11
| | | | llvm-svn: 103685
* Expand VMOVQQ into a pair of VMOVQ.Evan Cheng2010-05-131-0/+27
| | | | llvm-svn: 103684
* Mark some pattern-less instructions as neverHasSideEffects.Evan Cheng2010-05-132-1/+9
| | | | llvm-svn: 103683
* fix rdar://7965971 and a fixme: use ParseIdentifier inChris Lattner2010-05-131-13/+9
| | | | | | | | ParseDirectiveDarwinZerofill instead of hard coding the check for identifier. This allows quoted symbol names to be used. llvm-svn: 103682
* reapply r103668 with a fix. Never make "minor syntax changes"Chris Lattner2010-05-132-3/+36
| | | | | | after testing before committing. llvm-svn: 103681
* If REG_SEQUENCE source is livein, copy it first. Also, update livevariables ↵Evan Cheng2010-05-131-4/+23
| | | | | | information when a copy is introduced. llvm-svn: 103680
* Do not attempt copy coalescing if the source and dest sub-register indices ↵Evan Cheng2010-05-121-2/+4
| | | | | | do not match. llvm-svn: 103679
* revert r103668 for now, it is apparently breaking things.Chris Lattner2010-05-122-36/+3
| | | | llvm-svn: 103677
* moffset forms of moves are x86-32 only, make the parserChris Lattner2010-05-122-3/+36
| | | | | | | | lower them to the correct x86-64 instructions since we don't have a clean way to handle this in td files yet. rdar://7947184 llvm-svn: 103668
* Fix some potential issues in the pseudo instruction expansion phase: copy ↵Evan Cheng2010-05-121-35/+61
| | | | | | implicit operands and memoperands. Also, expand instructions even if their defs are "dead" since they may have implicit kill operands. llvm-svn: 103667
* MC: Move MCAlignFragment::EmitNops value out of the constructor.Daniel Dunbar2010-05-122-7/+6
| | | | llvm-svn: 103665
* MC: Eliminate MCZeroFillFragment, it is no longer needed.Daniel Dunbar2010-05-122-24/+2
| | | | llvm-svn: 103664
* MC: Explicitly check that only virtual fragments appear in virtual sections.Daniel Dunbar2010-05-121-0/+23
| | | | llvm-svn: 103663
* MC: Switch MCFillFragment to storing total fill size instead of a count. ↵Daniel Dunbar2010-05-121-3/+3
| | | | | | This allows using ValueSize==0 to represent a virtual fill. llvm-svn: 103662
* MC: Drop support for alignment in ZeroFill fragment, we can just useDaniel Dunbar2010-05-122-12/+10
| | | | | | MCAlignFragments for this. llvm-svn: 103661
* fix the encoding of the obscure "moffset" forms of moves, i386Chris Lattner2010-05-121-5/+6
| | | | | | part first. rdar://7947184 llvm-svn: 103660
* Clear CachedFunctionInfo upon Pass::releaseMemory. Because ValueMap will abortNick Lewycky2010-05-122-1/+9
| | | | | | | | | | on RAUW of functions, this is a correctness issue instead of a mere memory usage problem. No testcase until the new MergeFunctions can land. llvm-svn: 103653
* Simplify.Daniel Dunbar2010-05-121-5/+3
| | | | llvm-svn: 103651
* MC: Factor out MCAssembler::LayoutFragmentDaniel Dunbar2010-05-121-74/+78
| | | | llvm-svn: 103649
* MC: Tweak section layout to not relying on accumulating address value.Daniel Dunbar2010-05-121-7/+13
| | | | llvm-svn: 103648
* Remove a dead fixme.Evan Cheng2010-05-121-1/+0
| | | | llvm-svn: 103642
* Make sure to add kill flags to the last use of a virtreg when it is redefined.Jakob Stoklund Olesen2010-05-121-12/+22
| | | | | | The X86 floating point stack pass and others depend on good kill flags. llvm-svn: 103635
* MC: Simplify LayoutSection to just take the index of the section to layout.Daniel Dunbar2010-05-121-18/+16
| | | | llvm-svn: 103627
* MC: Track section layout order explicitly, and use to simplify.Daniel Dunbar2010-05-121-31/+15
| | | | llvm-svn: 103616
* stylistic change to MCSectionCOFF::PrintSwitchToSection COMDAT handlingNathan Jeffords2010-05-121-7/+7
| | | | | | Made a stylistic changed to the code/comments related to the unsupported COMDAT selection type IMAGE_COMDAT_SELECT_LARGEST based on from Anton Korobeynikov. llvm-svn: 103590
* Remove unused variable. Tweak a comment while there.Duncan Sands2010-05-121-2/+2
| | | | llvm-svn: 103586
* Add support for movi32 of global values to the new (MC) asm printer.Rafael Espindola2010-05-123-6/+34
| | | | llvm-svn: 103576
* updated support for the COFF .linkonceNathan Jeffords2010-05-122-7/+27
| | | | | | Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself. llvm-svn: 103568
* vst instructions are modeled as this:Evan Cheng2010-05-121-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | v1024 = REG_SEQUENCE ... v1025 = EXTRACT_SUBREG v1024, 5 v1026 = EXTRACR_SUBREG v1024, 6 = VSTxx <addr>, v1025, v1026 The REG_SEQUENCE ensures the sources that feed into the VST instruction are getting the right register allocation so they form a large super- register. The extract_subreg will be coalesced away all would just work: v1024 = REG_SEQUENCE ... = VSTxx <addr>, v1024:5, v1024:6 The problem is if the coalescer isn't run, the extract_subreg instructions would stick around and there is no assurance v1025 and v1026 will get the right registers. As a short term workaround, teach the NEON pre-allocation pass to transfer the sub-register indices over. An alternative would be do it 2addr pass when reg_sequence's are eliminated. But that *seems* wrong and require updating liveness information. Another alternative is to do this in the scheduler when the instructions are created. But that would mean somehow the scheduler this has to be done for correctness reason. That's yucky as well. So for now, we are leaving this in the target specific pass. llvm-svn: 103540
* Teach local regalloc about virtual registers with sub-indices.Evan Cheng2010-05-121-9/+37
| | | | llvm-svn: 103539
* Code clean up.Evan Cheng2010-05-121-1/+2
| | | | llvm-svn: 103538
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