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* [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support ↵Craig Topper2017-10-262-15/+20
| | | | | | | | | | | | | | 64-bit extensions. If the extend type is 64-bits, emit a 32-bit -> 64-bit extend after the UDIVREM8_ZEXT_HREG/UDIVREM8_SEXT_HREG operation. This gives a shorter encoding for the second extend in the sext case, and allows us to completely remove the second extend in the zext case. This also adds known bit and num sign bits support for UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG. Differential Revision: https://reviews.llvm.org/D38275 llvm-svn: 316702
* [X86] Teach the assembly parser to warn on duplicate registers in gather ↵Craig Topper2017-10-261-0/+71
| | | | | | | | | | instructions. Fixes PR32238. Differential Revision: https://reviews.llvm.org/D39077 llvm-svn: 316700
* [LICM] Restructure implicit exit handling to be more clear [NFCI]Philip Reames2017-10-261-27/+34
| | | | | | When going to explain this to someone else, I got tripped up by the complicated meaning of IsKnownNonEscapingObject in load-store promotion. Extract a helper routine and clarify naming/scopes to make this a bit more obvious. llvm-svn: 316699
* Support/reg*.h: Make headers include their dependenciesDavid Blaikie2017-10-263-0/+7
| | | | llvm-svn: 316696
* [COFF] Support ordinals in def files with space between @ and the numberMartin Storsjo2017-10-261-3/+8
| | | | | | | | | | Both GNU ld and MS link.exe support declaring ordinals this way. A test will be added in lld. Differential Revision: https://reviews.llvm.org/D39327 llvm-svn: 316690
* [x86] use an insert op to put one variable element into a constant of vectorsSanjay Patel2017-10-261-3/+51
| | | | | | | | Instead of loading (a potential ton of) scalar constants, load those as a vector and then insert into it. Differential Revision: https://reviews.llvm.org/D38756 llvm-svn: 316685
* Clear LastMappingSymbols and LastEMS(Info) when resetting the ↵Yichao Yu2017-10-262-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | ARM(AArch64)ELFStreamer Summary: This causes a segfault on ARM when (I think) the pass manager is used multiple times. Reset set the (last) current section to NULL without saving the corresponding LastEMSInfo back into the map. The next use of the streamer then save the LastEMSInfo for the NULL section leaving the LastEMSInfo mapping for the last current section (the one that was there before the reset) NULL which cause the LastEMSInfo to be set to NULL when the section is being used again. The reuse of the section (pointer) might mean that the map was holding dangling pointers previously which is why I went for clearing the map and resetting the info, making it as similar to the state right after the constructor run as possible. The AArch64 one doesn't have segfault (since LastEMS isn't a pointer) but it seems to have the same issue. The segfault is likely caused by https://reviews.llvm.org/D30724 which turns LastEMSInfo into a pointer. As mentioned above, it seems that the actual issue was older though. No test is included since the test is believed to be too complicated for such an obvious fix and not worth doing. Reviewers: llvm-commits, shankare, t.p.northover, peter.smith, rengolin Reviewed By: rengolin Subscribers: mgorny, aemerson, rengolin, javed.absar, kristof.beyls Differential Revision: https://reviews.llvm.org/D38588 llvm-svn: 316679
* [DynamicLibrary] Fix build on musl libcKeno Fischer2017-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | Summary: On musl libc, stdin/out/err are defined as `FILE* const` globals, and their address is not implicitly convertible to void *, or at least gcc 6 doesn't allow it, giving errors like: ``` error: cannot initialize return object of type 'void *' with an rvalue of type 'FILE *const *' (aka '_IO_FILE *const *') EXPLICIT_SYMBOL(stderr); ^~~~~~~~~~~~~~~~~~~~~~~ ``` Add an explicit cast to fix that problem. Reviewers: marsupial, krytarowski, dim Reviewed By: dim Differential Revision: https://reviews.llvm.org/D39297 llvm-svn: 316672
* [MachineModuleInfoImpls] Replace qsort with array_pod_sortMandeep Singh Grang2017-10-261-10/+4
| | | | | | | | | | | | | | | | Summary: This seems to be the only place in llvm we directly call qsort. We can replace this with a call to array_pod_sort. Also minor cleanup of the sorting function. Reviewers: bkramer, Eugene.Zelenko, rafael Reviewed By: bkramer Subscribers: efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D39214 llvm-svn: 316671
* Reapply r316582 [Local] Fix a bug in the domtree update logic for ↵Balaram Makam2017-10-261-3/+7
| | | | | | | | | | | | MergeBasicBlockIntoOnlyPred. Summary: This reverts r316612 to reapply r316582. The buildbot failure was unrelated to this commit. Reviewers: Subscribers: llvm-svn: 316669
* Represent runtime preemption in the IR.Sean Fertile2017-10-2610-39/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we do not represent runtime preemption in the IR, which has several drawbacks: 1) The semantics of GlobalValues differ depending on the object file format you are targeting (as well as the relocation-model and -fPIE value). 2) We have no way of disabling inlining of run time interposable functions, since in the IR we only know if a function is link-time interposable. Because of this llvm cannot support elf-interposition semantics. 3) In LTO builds of executables we will have extra knowledge that a symbol resolved to a local definition and can't be preemptable, but have no way to propagate that knowledge through the compiler. This patch adds preemptability specifiers to the IR with the following meaning: dso_local --> means the compiler may assume the symbol will resolve to a definition within the current linkage unit and the symbol may be accessed directly even if the definition is not within this compilation unit. dso_preemptable --> means that the compiler must assume the GlobalValue may be replaced with a definition from outside the current linkage unit at runtime. To ease transitioning dso_preemptable is treated as a 'default' in that low-level codegen will still do the same checks it did previously to see if a symbol should be accessed indirectly. Eventually when IR producers emit the specifiers on all Globalvalues we can change dso_preemptable to mean 'always access indirectly', and remove the current logic. Differential Revision: https://reviews.llvm.org/D20217 llvm-svn: 316668
* AMDGPU: Handle s_buffer_load_dword hazard on SIMarek Olsak2017-10-261-0/+27
| | | | | | | | | | Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D39171 llvm-svn: 316666
* [LSV] Avoid adding vectors of pointers as candidatesBjorn Pettersson2017-10-261-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We no longer add vectors of pointers as candidates for load/store vectorization. It does not seem to work anyway, but without this patch we can end up in asserts when trying to create casts between an integer type and the pointer of vectors type. The test case I've added used to assert like this when trying to cast between i64 and <2 x i16*>: opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed. #0 PrintStackTraceSignalHandler(void*) #1 SignalHandler(int) #2 __restore_rt #3 __GI_raise #4 __GI_abort #5 __GI___assert_fail #6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*) #7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&) #8 Vectorizer::vectorizeStoreChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*) Reviewers: arsenm Reviewed By: arsenm Subscribers: nhaehnle, llvm-commits Differential Revision: https://reviews.llvm.org/D39296 llvm-svn: 316665
* [LSV] Skip all non-byte sizes, not only less than eight bitsBjorn Pettersson2017-10-261-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The code comments indicate that no effort has been spent on handling load/stores when the size isn't a multiple of the byte size correctly. However, the code only avoided types smaller than 8 bits. So for example a load of an i28 could still be considered as a candidate for vectorization. This patch adjusts the code to behave according to the code comment. The test case used to hit the following assert when trying to use "cast" an i32 to i28 using CreateBitOrPointerCast: opt: ../lib/IR/Instructions.cpp:2565: Assertion `castIsValid(op, S, Ty) && "Invalid cast!"' failed. #0 PrintStackTraceSignalHandler(void*) #1 SignalHandler(int) #2 __restore_rt #3 __GI_raise #4 __GI_abort #5 __GI___assert_fail #6 llvm::CastInst::Create(llvm::Instruction::CastOps, llvm::Value*, llvm::Type*, llvm::Twine const&, llvm::Instruction*) #7 llvm::IRBuilder<llvm::ConstantFolder, llvm::IRBuilderDefaultInserter>::CreateBitOrPointerCast(llvm::Value*, llvm::Type*, llvm::Twine const&) #8 (anonymous namespace)::Vectorizer::vectorizeLoadChain(llvm::ArrayRef<llvm::Instruction*>, llvm::SmallPtrSet<llvm::Instruction*, 16u>*) Reviewers: arsenm Reviewed By: arsenm Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39295 llvm-svn: 316663
* [mips] Fix (dis)assembly of abs.fmt for micromipsSimon Dardis2017-10-262-7/+16
| | | | | | | | | | | These instructions were previously marked as codegen only preventing them from being assembled as microMIPS or disassembled. Reviewers: atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D39123 llvm-svn: 316656
* [mips] Fix PR35071Simon Dardis2017-10-261-13/+12
| | | | | | | | | | | | | | | | | | | | PR35071 exposed the fact that MipsInstrInfo::removeBranch did not walk past debug instructions when removing branches for the control flow optimizer, which lead to duplicated conditional branches. If the target of the branch was a removable block, only the conditional branch in the terminating position would have it's MBB operands updated, leaving the first branch with a dangling MBB operand. The MIPS long branch pass would then trigger an assertion when attempting to examine the instruction with dangling MBB operand. This resolves PR35071. Thanks to Alex Richardson for reporting the issue! Reviewers: atanasyan Differential Revision: https://reviews.llvm.org/D39288 llvm-svn: 316654
* [PowerPC] Use record-form instruction for Less-or-Equal -1 and ↵Hiroshi Inoue2017-10-261-30/+39
| | | | | | | | | | | Greater-or-Equal 1 Currently a record-form instruction is used for comparison of "greater than -1" and "less than 1" by modifying the predicate (e.g. LT 1 into LE 0) in addition to the naive case of comparison against 0. This patch also enables emitting a record-form instruction for "less than or equal to -1" (i.e. "less than 0") and "greater than or equal to 1" (i.e. "greater than 0") to increase the optimization opportunities. Differential Revision: https://reviews.llvm.org/D38941 llvm-svn: 316647
* Tidy up CountingFunctionInserter a little. NFC.Hans Wennborg2017-10-261-8/+4
| | | | | | | Use StringRef for CountingFunctionName, remove erroneous comment copied from InstructionNamer, and drop some trailing whitespace. llvm-svn: 316644
* [AsmParser][TableGen] Add VariantID argument to the generated mnemonic spell ↵Craig Topper2017-10-263-3/+6
| | | | | | | | check function so it can use the correct table based on variant. I'm considering implementing the mnemonic spell checker for x86, and that would require the separate intel and att variants. llvm-svn: 316641
* [AsmParser][TableGen] Make the generated mnemonic spell checker function a ↵Craig Topper2017-10-263-3/+6
| | | | | | | | file local static function. Also only emit in targets that specificially request it. This is required so we don't get an unused static function error. llvm-svn: 316640
* [X86] Use correct type for return value of ComputeAvailableFeatures in the ↵Craig Topper2017-10-261-1/+1
| | | | | | | | AsmParser. NFC There aren't enough used bits to make this a functional change, but we should fix it for consistency. llvm-svn: 316639
* [Transforms] Revert r316630 changes in Scalar/MergeICmps.cpp to fix broken ↵Eugene Zelenko2017-10-261-62/+31
| | | | | | build bots (NFC). llvm-svn: 316634
* [Transforms] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko2017-10-269-157/+333
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 316630
* Attempt to unbreak the expensive-checks-win botMatthew Simpson2017-10-251-1/+2
| | | | llvm-svn: 316625
* Re-land "[dwarfdump] Add -lookup option"Jonas Devlieghere2017-10-252-2/+30
| | | | | | | | | Add the option to lookup an address in the debug information and print out the file, function, block and line table details. Differential revision: https://reviews.llvm.org/D38409 llvm-svn: 316619
* [SCEV] Fix an assertion failure in the max backedge taken countSanjoy Das2017-10-251-11/+10
| | | | | | | | | | | | | | | | | Max backedge taken count is always expected to be a constant; and this is usually true by construction -- it is a SCEV expression with constant inputs. However, if the max backedge expression ends up being computed to be a udiv with a constant zero denominator[0], SCEV does not fold the result to a constant since there is no constant it can fold it to (SCEV has no representation for "infinity" or "undef"). However, in computeMaxBECountForLT we already know the denominator is positive, and thus at least 1; and we can use this fact to avoid dividing by zero. [0]: We can end up with a constant zero denominator if the signed range of the stride is more precise than the unsigned range. llvm-svn: 316615
* Add a comment to clarify a future changeSanjoy Das2017-10-251-2/+3
| | | | llvm-svn: 316614
* Revert r316582 [Local] Fix a bug in the domtree update logic for ↵Balaram Makam2017-10-251-7/+3
| | | | | | | | | | | | | | | | | MergeBasicBlockIntoOnlyPred. Summary: This reverts commit r316582. It looks like this commit broke tests on one buildbot: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/5719 . . . Failing Tests (1): LLVM :: Transforms/CalledValuePropagation/simple-arguments.ll Reviewers: Subscribers: llvm-svn: 316612
* Hexagon: Fold a single-use textual header into its useDavid Blaikie2017-10-252-79/+56
| | | | llvm-svn: 316604
* Make the combiner check if shifts are legal before creating themAditya Nandakumar2017-10-251-2/+3
| | | | | | | | | | | | Summary: Make sure shifts are legal/specified by the legalizerinfo before creating it Reviewers: qcolombet, dsanders, rovka, t.p.northover Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39264 llvm-svn: 316602
* [Hexagon] Account for negative offset when limiting max deviationKrzysztof Parzyszek2017-10-251-2/+8
| | | | | | | | | | | | | In getOffsetRange, Max can be set to 0 to force the extender replacement to be at or below the original value. This would cause the new offset to be non-negative, which is preferred for memory instructions (to reduce the likelihood of it getting constant-extended due to predication). The problem happens when the range is shifted by an offset (present in the instruction being examined) and the offset is negative. The entire range for the allowable deviation will then be strictly negative. This creates a problem, since 0 is assumed to be a valid deviation. llvm-svn: 316601
* [X86] Add avx512vpopcntdq to Knights MillCraig Topper2017-10-251-1/+2
| | | | | | As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017. llvm-svn: 316592
* [Local] Fix a bug in the domtree update logic for MergeBasicBlockIntoOnlyPred.Balaram Makam2017-10-251-3/+7
| | | | | | | | | | | | | | Summary: For some irreducible CFG the domtree nodes might be dead, do not update domtree for dead nodes. Reviewers: kuhar, dberlin, hfinkel Reviewed By: kuhar Subscribers: llvm-commits, mcrosier Differential Revision: https://reviews.llvm.org/D38960 llvm-svn: 316582
* Don't try to use a non-existent header on FreeBSD/mips.John Baldwin2017-10-251-1/+1
| | | | | | | | Reviewers: dim Differential Revision: https://reviews.llvm.org/D38807 llvm-svn: 316581
* Add CalledValuePropagation passMatthew Simpson2017-10-256-0/+443
| | | | | | | | | | | | | | This patch adds a new pass for attaching !callees metadata to indirect call sites. The pass propagates values to call sites by performing an IPSCCP-like analysis using the generic sparse propagation solver. For indirect call sites having a small set of possible callees, the attached metadata indicates what those callees are. The metadata can be used to facilitate optimizations like intersecting the function attributes of the possible callees, refining the call graph, performing indirect call promotion, etc. Differential Revision: https://reviews.llvm.org/D37355 llvm-svn: 316576
* [mips] Clean up some whitespace (NFC).Simon Dardis2017-10-251-1/+1
| | | | | | Also test that my email address was updated. llvm-svn: 316575
* [inlineasm] Fix crash when number of matched input constraint operands ↵Daniil Fukalov2017-10-251-0/+2
| | | | | | | | | | | | | | overflows signed char In a case when number of output constraint operands that has matched input operands doesn't fit to signed char, TargetLowering::ParseConstraints() can try to access ConstraintOperands (that is std::vector) with negative index. Reviewers: rampitec, arsenm Differential Review: https://reviews.llvm.org/D39125 llvm-svn: 316574
* [ARM GlobalISel] Fix call opcodesDiana Picus2017-10-251-4/+11
| | | | | | | | We were generating BLX for all the calls, which was incorrect in most cases. Update ARMCallLowering to generate BL for direct calls, and BLX, BX_CALL or BMOVPCRX_CALL for indirect calls. llvm-svn: 316570
* [SCEV] Enhance SCEVFindUnsafe for divisionMax Kazantsev2017-10-251-8/+2
| | | | | | | | | This patch allows SCEVFindUnsafe algorithm to tread division by any non-positive value as safe. Previously, it could only recognize non-zero constants. Differential Revision: https://reviews.llvm.org/D39228 llvm-svn: 316568
* Re-land "[CodeGen][ExpandMemcmp][NFC] Allow memcmp to expand to vector loads ↵Clement Courbet2017-10-251-195/+227
| | | | | | | | | | | | | (1)" Compute the actual decomposition only after deciding whether to expand of not. Else, it's easy to make the compiler OOM with: `memcpy(dst, src, 0xffffffffffffffff);`, which typically happens if someone mistakenly passes a negative value. Add a test. This reverts commit f8fc02fbd4ab33383c010d33675acf9763d0bd44. llvm-svn: 316567
* [llvm-dwarfdump] - Fix array out of bounds access crash.George Rimar2017-10-252-0/+17
| | | | | | | | | | | This fixes possible out of bound access in DWARFDie::getFirstChild() which might happen when .debug_info section is corrupted, like shown in testcase. Differential revision: https://reviews.llvm.org/D39185 llvm-svn: 316566
* [ARM] OrCombineToBFI functionSam Parker2017-10-251-92/+109
| | | | | | | | Extract the functionality to combine OR to BFI into its own function. Differential Revision: https://reviews.llvm.org/D39001 llvm-svn: 316563
* [ARM] Swap cmp operands for automatic shiftsSam Parker2017-10-251-0/+6
| | | | | | | | | | Swap the compare operands if the lhs is a shift and the rhs isn't, as in arm and T2 the shift can be performed by the compare for its second operand. Differential Revision: https://reviews.llvm.org/D39004 llvm-svn: 316562
* [MachineScheduler] Minor refactoring.Jonas Paulsson2017-10-251-13/+18
| | | | | | | | | | | | | | | | Duplicated code found in three places put into a new static function: /// Given a Count of resource usage and a Latency value, return true if a /// SchedBoundary becomes resource limited. static bool checkResourceLimit(unsigned LFactor, unsigned Count, unsigned Latency) { return (int)(Count - (Latency * LFactor)) > (int)LFactor; } Review: Florian Hahn, Matthias Braun https://reviews.llvm.org/D39235 llvm-svn: 316560
* [AArch64] Add support for dllimport of values and functionsMartin Storsjo2017-10-254-20/+63
| | | | | | | | | | | | | | Previously, the dllimport attribute did the right thing in terms of treating it as a pointer to a value, but this makes sure the names get mangled properly, and calls to such functions load the function from the __imp_ pointer. This is based on SVN r212431 and r212430 where the same was implemented for ARM. Differential Revision: https://reviews.llvm.org/D38530 llvm-svn: 316555
* DAG: Fix creating select with wrong condition typeMatt Arsenault2017-10-251-1/+10
| | | | | | | | | | | | | | | | | | | This code added in r297930 assumed that it could create a select with a condition type that is just an integer bitcast of the selected type. For AMDGPU any vselect is going to be scalarized (although the vector types are legal), and all select conditions must be i1 (the same as getSetCCResultType). This logic doesn't really make sense to me, but there's never really been a consistent policy in what the select condition mask type is supposed to be. Try to extend the logic for skipping the transform for condition types that aren't setccs. It doesn't seem quite right to me though, but checking conditions that seem more sensible (like whether the vselect is going to be expanded) doesn't work since this seems to depend on that also. llvm-svn: 316554
* AMDGPU: Add max-mix-insts subtarget featureMatt Arsenault2017-10-254-8/+22
| | | | llvm-svn: 316553
* [IRCE] Fix intersection between signed and unsigned rangesMax Kazantsev2017-10-251-14/+73
| | | | | | | | | | | | | | | | | | | | | | | | IRCE for unsigned latch conditions was temporarily disabled by rL314881. The motivating example contained an unsigned latch condition and a signed range check. One of the safe iteration ranges was `[1, SINT_MAX + 1]`. Its right border was incorrectly interpreted as a negative value in `IntersectRange` function, this lead to a miscompile under which we deleted a range check without inserting a postloop where it was needed. This patch brings back IRCE for unsigned latch conditions. Now we treat range intersection more carefully. If the latch condition was unsigned, we only try to consider a range check for deletion if: 1. The range check is also unsigned, or 2. Safe iteration range of the range check lies within `[0, SINT_MAX]`. The same is done for signed latch. Values from `[0, SINT_MAX]` are unambiguous, these values are non-negative under any interpretation, and all values of a range intersected with such range are also non-negative. We also use signed/unsigned min/max functions for range intersection depending on type of the latch condition. Differential Revision: https://reviews.llvm.org/D38581 llvm-svn: 316552
* [MemDep] DBG intrinsics don't impact abort limit for call site dependence ↵Mikael Holmen2017-10-251-5/+5
| | | | | | | | | | | | | | | | | | | | analysis Summary: Memory dependence analysis no longer counts DbgInfoIntrinsics towards the limit where to abort the analysis. Before, a bunch of calls to dbg.value could affect the generated code, meaning that with -g we could generate different code than without. Reviewers: chandlerc, Prazek, davide, efriedma Reviewed By: efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39181 llvm-svn: 316551
* [IRCE] Smarter detection of empty ranges using SCEVMax Kazantsev2017-10-251-6/+15
| | | | | | | | | | | | | | | | | | | | For a SCEV range, this patch replaces the naive emptiness check for SCEV ranges which looks like `Begin == End` with a SCEV check. The range is guaranteed to be empty of `Begin >= End`. We should filter such ranges out and do not try to perform IRCE for them. For example, we can get such range when intersecting range `[A, B)` and `[C, D)` where `A < B < C < D`. The resulting range is `[max(A, C), min(B, D)) = [C, B)`. This range is empty, but its `Begin` does not match with `End`. Making IRCE for an empty range is basically safe but unprofitable because we never actually get into the main loop where the range checks are supposed to be eliminated. This patch uses SCEV mechanisms to treat loops with proved `Begin >= End` as empty. Differential Revision: https://reviews.llvm.org/D39082 llvm-svn: 316550
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