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* use continue to avoid nesting, no functionality change.Chris Lattner2007-08-041-14/+15
| | | | llvm-svn: 40819
* Promoting allocas with the 'single store' fastpath is Chris Lattner2007-08-041-10/+9
| | | | | | | faster than with the 'local to a block' fastpath. This speeds up PR1432 from 2.1232 to 2.0686s (2.6%) llvm-svn: 40818
* When PromoteLocallyUsedAllocas promoted allocas, it didn't rememberChris Lattner2007-08-041-2/+13
| | | | | | | to increment NumLocalPromoted, and didn't actually delete the dead alloca, leading to an extra iteration of mem2reg. llvm-svn: 40817
* std::map -> DenseMapChris Lattner2007-08-041-3/+3
| | | | llvm-svn: 40816
* Clean up comments, fix up some confusing code logic.Nick Lewycky2007-08-041-30/+47
| | | | | | Predsimplify fails llvm-gcc bootstrap. llvm-svn: 40815
* fix a logic bug where we wouldn't promote single store allocas if the Chris Lattner2007-08-041-2/+2
| | | | | | | | | stored value was a non-instruction value. Doh. This increase the # single store allocas from 8982 to 9026, and speeds up mem2reg on the testcase in PR1432 from 2.17 to 2.13s. llvm-svn: 40813
* When we do the single-store optimization, delete both the storeChris Lattner2007-08-041-2/+8
| | | | | | | | and the alloca so they don't get reprocessed. This speeds up PR1432 from 2.20s to 2.17s. llvm-svn: 40812
* Three improvements:Chris Lattner2007-08-041-6/+16
| | | | | | | | | | | | | 1. Check for revisiting a block before checking domination, which is faster. 2. If the stored value isn't an instruction, we don't have to check for domination. 3. If we have a value used in the same block more than once, make sure to remove the block from the UsingBlocks vector. Not doing so forces us to go through the slow path for the alloca. The combination of these improvements increases the number of allocas on the fastpath from 8935 to 8982 on PR1432. This speeds it up from 2.90s to 2.20s (31%) llvm-svn: 40811
* switch from using a std::set to using a SmallPtrSet. This speeds up theChris Lattner2007-08-041-3/+3
| | | | | | testcase in PR1432 from 6.33s to 2.90s (2.22x) llvm-svn: 40810
* In mem2reg, when handling the single-store case, make sure to removeChris Lattner2007-08-041-8/+10
| | | | | | | | | | a using block from the list if we handle it. Not doing this caused us to not be able to promote (with the fast path) allocas which have uses (whoops). This increases the # allocas hitting this fastpath from 4042 to 8935 on the testcase in PR1432, speeding up mem2reg by 2.6x llvm-svn: 40809
* Regenerating.Chandler Carruth2007-08-043-3437/+4761
| | | | llvm-svn: 40808
* This is the patch to provide clean intrinsic function overloading support in ↵Chandler Carruth2007-08-049-85/+321
| | | | | | | | LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. llvm-svn: 40807
* split rewriting of single-store allocas into its ownChris Lattner2007-08-041-39/+57
| | | | | | method. llvm-svn: 40806
* refactor some code to shrink PromoteMem2Reg::run a bitChris Lattner2007-08-041-63/+96
| | | | llvm-svn: 40805
* add a typedef, no other change.Chris Lattner2007-08-041-7/+8
| | | | llvm-svn: 40804
* avoid an unneeded vector copy. This speeds up mem2reg on the testcase Chris Lattner2007-08-041-1/+9
| | | | | | in PR1432 by 6% llvm-svn: 40803
* make RenamePassWorkList a local var instead of an ivar.Chris Lattner2007-08-041-8/+8
| | | | llvm-svn: 40802
* Make x86 long double alignment 32 for everything butDale Johannesen2007-08-031-1/+3
| | | | | | Darwin (which makes size within a struct==96) llvm-svn: 40796
* long double patch 3 of N. Add to MVT.Dale Johannesen2007-08-031-50/+57
| | | | llvm-svn: 40793
* long double patch 2 of N. Handle it in TargetData.Dale Johannesen2007-08-036-7/+19
| | | | | | | (I've tried to get the info right for all targets, but I'm not expert on all of them - check yours.) llvm-svn: 40792
* Fix a subtle miscompilation. This allows 197.parser to be compiled correctly.Owen Anderson2007-08-031-6/+8
| | | | llvm-svn: 40791
* Fix a subtle iterator invalidation bug in a recursive algorithm.Owen Anderson2007-08-031-5/+7
| | | | llvm-svn: 40776
* Long double, part 1 of N. Support in IR.Dale Johannesen2007-08-0310-4504/+3651
| | | | llvm-svn: 40774
* add an observationChris Lattner2007-08-031-0/+27
| | | | llvm-svn: 40772
* Fix an accidental commit.Chris Lattner2007-08-021-1/+1
| | | | llvm-svn: 40758
* More explicit keywords.Dan Gohman2007-08-028-8/+8
| | | | llvm-svn: 40757
* Fix the alignment requirements of several unpck and shuf instructions.Dan Gohman2007-08-022-13/+21
| | | | | | | | Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's memory operand alignment can be tested as well, with a fix to avoid breaking MMX's use of isPSHUFDMask. llvm-svn: 40756
* Fix pastos in vector arithmetic intrinsics.Dan Gohman2007-08-021-4/+4
| | | | llvm-svn: 40754
* Fix 80 col. violations.Owen Anderson2007-08-021-8/+14
| | | | llvm-svn: 40751
* Fix 80 col. violations.Owen Anderson2007-08-021-7/+15
| | | | llvm-svn: 40750
* Fix 80 col. violations.Owen Anderson2007-08-021-14/+23
| | | | llvm-svn: 40749
* don't redefine a parameterChris Lattner2007-08-021-1/+1
| | | | llvm-svn: 40748
* Fix a bug that was causing several miscompilations on SPEC.Owen Anderson2007-08-022-7/+21
| | | | llvm-svn: 40746
* Implement review feedback.Christopher Lamb2007-08-021-4/+4
| | | | llvm-svn: 40745
* Replacing a cast with another one does not reduce the number of Chris Lattner2007-08-021-5/+3
| | | | | | casts in the input. llvm-svn: 40741
* Disable an xform that causes an infinite loop. This fixes PR1594Chris Lattner2007-08-021-0/+1
| | | | llvm-svn: 40739
* wrap some long lines. Major offenders that are left includeChris Lattner2007-08-027-11/+16
| | | | | | | | gvn, gvnpre, dse, and predsimplify. To see these, use: make check-line-length llvm-svn: 40738
* Update dominator info for the middle blocks created while splitingDevang Patel2007-08-022-22/+86
| | | | | | | | exit edge to preserve LCSSA. Fix dominance frontier update during loop unswitch. This fixes PR 1589, again llvm-svn: 40737
* Mark the SSE and MMX load instructions thatDan Gohman2007-08-022-0/+6
| | | | | | | | | | X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle with the isReMaterializable flag so that it is given a chance to handle them. Without hoisting constant-pool loads from loops this isn't very visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from making a copy of the constant pool on the stack. llvm-svn: 40736
* Enhance instcombine to be more aggressive about folding casts ofChris Lattner2007-08-021-32/+42
| | | | | | operations of casts. This implements InstCombine/zext-fold.ll llvm-svn: 40726
* Switch some multiplication instructions over to the new scheme for testing.Evan Cheng2007-08-022-12/+53
| | | | llvm-svn: 40723
* Do not emit copies for physical register output if it's not used.Evan Cheng2007-08-022-2/+28
| | | | llvm-svn: 40722
* Fix PR1575 and test/Transforms/CondProp/2007-08-01-InvalidRead.llChris Lattner2007-08-021-8/+10
| | | | llvm-svn: 40720
* Style police: Expand the tabs to spaces!Scott Michel2007-08-021-5/+5
| | | | llvm-svn: 40712
* Teach BasicAA about noalias parameter attributes, but do it correctly this time.Christopher Lamb2007-08-021-1/+31
| | | | llvm-svn: 40711
* Instead of adding copyfromreg's to handle physical definitions. Now isel canEvan Cheng2007-08-021-68/+78
| | | | | | | | | | | | | | simply specify them as results and let scheduledag handle them. That is, instead of SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...) SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag) Just write: SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...) And let scheduledag emit the move from X86::EAX to a virtual register. llvm-svn: 40710
* Can't handle offset and scale if rip-relative addressing is to be used.Evan Cheng2007-08-011-6/+10
| | | | llvm-svn: 40703
* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-011-4/+4
| | | | llvm-svn: 40702
* Mac OS X X86-64 low 4G address not available.Evan Cheng2007-08-014-1/+21
| | | | llvm-svn: 40701
* Undo previous check-in.Devang Patel2007-08-012-85/+22
| | | | llvm-svn: 40698
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