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* Untabify and 80-col.Eric Christopher2012-05-221-17/+17
| | | | llvm-svn: 157274
* Formatting consistency.Eric Christopher2012-05-221-3/+4
| | | | llvm-svn: 157273
* hopefully fix the CMake build. sorry for breakageNuno Lopes2012-05-221-0/+1
| | | | llvm-svn: 157264
* LSR fix: add a missing phi check during IV hoisting.Andrew Trick2012-05-221-1/+2
| | | | | | Fixes PR12898: SCEVExpander crash. llvm-svn: 157263
* add a new pass to instrument loads and stores for run-time bounds checkingNuno Lopes2012-05-225-62/+286
| | | | | | | | move EmitGEPOffset from InstCombine to Transforms/Utils/Local.h (a draft of this) patch reviewed by Andrew, thanks. llvm-svn: 157261
* revert my previous patches that introduced an additional parameter to the ↵Nuno Lopes2012-05-222-131/+61
| | | | | | | | objectsize intrinsic. After a lot of discussion, we realized it's not the best option for run-time bounds checking llvm-svn: 157255
* Only erase virtregs with no uses left.Jakob Stoklund Olesen2012-05-221-4/+15
| | | | | | | | | Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. llvm-svn: 157254
* Fix PR12858, a crash due to GVN's PRE not fully removing an instruction from theDuncan Sands2012-05-221-6/+12
| | | | | | | | | | | | leader table. That's because it wasn't expecting instructions to turn up as leader for a value number that is not its own, but equality propagation could create this situation. One solution is to have the leader table use a WeakVH but this slows down GVN by about 5%. Instead just have equality propagation not add instructions to the leader table, only constants and arguments. In theory this might cause GVN to run more (each time it changes something it runs again) but it doesn't seem to occur enough to cause a slow down. llvm-svn: 157251
* Fix constant used for pshufb mask when lowering v16i8 shuffles. Bug ↵Craig Topper2012-05-221-1/+1
| | | | | | introduced in r157043. Fixes PR12908. llvm-svn: 157236
* This patch adds a predicate to existing mips32 and mips64 so that thoseAkira Hatanaka2012-05-226-101/+134
| | | | | | | | | | | | | | | | | | | instruction encodings can be excluded during mips16 processing. This revision fixes the issue raised by Jim Grosbach. bool hasStandardEncoding() const { return !inMips16Mode(); } When micromips is added it will be bool StandardEncoding() const { return !inMips16Mode()&& !inMicroMipsMode(); } No additional testing is needed other than to assure that there is no regression from this patch. Patch by Reed Kotler. llvm-svn: 157234
* ARM: .end_data_region mismatch in Thumb2.Jim Grosbach2012-05-211-2/+5
| | | | | | | | | | 32-bit offset jump tables just use real branch instructions and so aren't marked as data regions. We were still emitting the .end_data_region marker though, which assert()ed. rdar://11499158 llvm-svn: 157221
* Added address space qualifier to intrinsic PointerType arguments.Pete Cooper2012-05-211-2/+5
| | | | llvm-svn: 157218
* Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson2012-05-211-1/+1
| | | | | | | | No in-tree targets exercise this path. Patch by Micah Villmow. llvm-svn: 157215
* Thumb2: RSB source register should be rGRP not GPRnopc.Jim Grosbach2012-05-211-4/+4
| | | | | | t2RSB defined the operand correctly, but tRSBS didn't. llvm-svn: 157200
* Mark an unreachable region of code with llvm_unreachable.Dan Gohman2012-05-211-1/+1
| | | | llvm-svn: 157197
* Typo.Chad Rosier2012-05-211-1/+1
| | | | llvm-svn: 157195
* Make it so that the MArch, MCPU, MAttrs passed to EngineBuilder are actually ↵Owen Anderson2012-05-211-4/+0
| | | | | | | | used. Patch by Jose Fonseca. llvm-svn: 157191
* PR1255 (case ranges: work with ConstantRangesSet instead of ConstantInt) ↵Stepan Dyatkovskiy2012-05-212-10/+30
| | | | | | related changes for Execution and Verifier. llvm-svn: 157183
* Allow 256-bit shuffles to still be split even if only half of the shuffle ↵Craig Topper2012-05-211-15/+44
| | | | | | comes from two 128-bit pieces. llvm-svn: 157175
* Give a small negative bias to giant edge bundles.Jakob Stoklund Olesen2012-05-211-0/+11
| | | | | | | | | | | | | | | | This helps compile time when the greedy register allocator splits live ranges in giant functions. Without the bias, we would try to grow regions through the giant edge bundles, usually to find out that the region became too big and expensive. If a live range has many uses in blocks near the giant bundle, the small negative bias doesn't make a big difference, and we still consider regions including the giant edge bundle. Giant edge bundles are usually connected to landing pads or indirect branches. llvm-svn: 157174
* Clear kill flags on the fly when joining intervals.Jakob Stoklund Olesen2012-05-201-36/+22
| | | | | | | | | | | With physreg joining out of the way, it is easy to recognize the instructions that need their kill flags cleared while testing for interference. This allows us to skip the final scan of all instructions for an 11% speedup of the coalescer pass. llvm-svn: 157169
* Make the global base reg GR32_NOSP.Jakob Stoklund Olesen2012-05-201-1/+1
| | | | | | It can sometimes be used in addressing modes that don't support %ESP. llvm-svn: 157165
* Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen2012-05-201-1/+10
| | | | | | | It can be necessary to restrict to a sub-class before accessing sub-registers. llvm-svn: 157164
* Constrain register classes in TailDup.Jakob Stoklund Olesen2012-05-201-3/+5
| | | | | | | When rewriting operands, make sure the new registers have a compatible register class. llvm-svn: 157163
* When legalising shifts, do not pre-build a list of operands whichPeter Collingbourne2012-05-201-10/+14
| | | | | | | may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve the other operands when calling UpdateNodeOperands. Fixes PR12889. llvm-svn: 157162
* Emit memcmp directly from the StringMatcherEmitter.Benjamin Kramer2012-05-201-4/+4
| | | | | | | | | There should be no difference in the resulting binary, given a sufficiently smart compiler. However we already had compiler timeouts on the generated code in Intrinsics.gen, this hopefully makes the lives of slow buildbots a little easier. llvm-svn: 157161
* Plug a leak when using MCJIT.Benjamin Kramer2012-05-201-1/+1
| | | | | | Found by valgrind. llvm-svn: 157160
* Add a missing PPC 64-bit stwu pattern.Hal Finkel2012-05-201-0/+8
| | | | | | | This seems to fix the remaining compile-time failures on PPC64 when compiling with -enable-ppc-preinc. llvm-svn: 157159
* Use TargetMachine's register info instead of creating a new one and leaking it.Benjamin Kramer2012-05-201-1/+1
| | | | llvm-svn: 157155
* Use the right register class for LDRrs.Jakob Stoklund Olesen2012-05-201-1/+1
| | | | llvm-svn: 157152
* Transfer memory operands to the right instruction.Jakob Stoklund Olesen2012-05-201-1/+1
| | | | | | They need to go on the PICLDR as the verifier points out. llvm-svn: 157151
* Properly constrain register classes for sub-registers.Jakob Stoklund Olesen2012-05-201-0/+2
| | | | | | Not all GR64 registers have sub_8bit sub-registers. llvm-svn: 157150
* Properly constrain register classes in 2-addr.Jakob Stoklund Olesen2012-05-201-0/+6
| | | | | | | X86 has 2-addr instructions with different constraints on the tied def and use operands. One is GR32, one is GR32_NOSP. llvm-svn: 157149
* Missed a push_back in r157147.Jakob Stoklund Olesen2012-05-201-1/+0
| | | | llvm-svn: 157148
* Avoid deleting extra copies when RegistersDefinedFromSameValue is true.Jakob Stoklund Olesen2012-05-201-7/+8
| | | | | | | This function adds copies to be erased to DupCopies, avoid also adding them to DeadCopies. llvm-svn: 157147
* Fix build bots.Jakob Stoklund Olesen2012-05-201-4/+4
| | | | | | Avoid looking at the operands of a potentially erased instruction. llvm-svn: 157146
* LiveRangeQuery simplifies shrinkToUses().Jakob Stoklund Olesen2012-05-201-10/+6
| | | | llvm-svn: 157145
* Use LiveRangeQuery in ScheduleDAGInstrs.Jakob Stoklund Olesen2012-05-201-11/+3
| | | | llvm-svn: 157144
* Eliminate some uses of struct LiveRange.Jakob Stoklund Olesen2012-05-201-12/+15
| | | | | | That struct ought to be a LiveInterval implementation detail. llvm-svn: 157143
* Use LiveRangeQuery instead of getLiveRangeContaining().Jakob Stoklund Olesen2012-05-201-4/+4
| | | | llvm-svn: 157142
* Do not pass an invalid domtree to SimplifyInstruction fromPeter Collingbourne2012-05-201-2/+2
| | | | | | LoopUnswitch. Fixes PR12887. llvm-svn: 157140
* Simplify overlap check.Jakob Stoklund Olesen2012-05-191-8/+1
| | | | llvm-svn: 157137
* Fix 12892.Jakob Stoklund Olesen2012-05-192-4/+24
| | | | | | | | | | | | Dead code elimination during coalescing could cause a virtual register to be split into connected components. The following rewriting would be confused about the already joined copies present in the code, but without a corresponding value number in the live range. Erase all joined copies instantly when joining intervals such that the MI and LiveInterval representations are always in sync. llvm-svn: 157135
* Do not eliminate allocas whose alignment exceeds that of thePeter Collingbourne2012-05-191-12/+35
| | | | | | | copied-in constant, as a subsequent user may rely on over alignment. Fixes PR12885. llvm-svn: 157134
* Add a FIXME about access to negative stack-pointer offsets on PPC32.Hal Finkel2012-05-191-0/+2
| | | | | | | | | | | | | | The current code will generate a prologue which starts with something like: mflr 0 stw 31, -4(1) stw 0, 4(1) stwu 1, -16(1) But under the PPC32 SVR4 ABI, access to negative offsets from R1 is not allowed. This was pointed out by Peter Bergner. llvm-svn: 157133
* Remove the late DCE in RegisterCoalescer.Jakob Stoklund Olesen2012-05-191-145/+2
| | | | | | | | | | | Dead code and joined copies are now eliminated on the fly, and there is no need for a post pass. This makes the coalescer work like other modern register allocator passes: Code is changed on the fly, there is no pending list of changes to be committed. llvm-svn: 157132
* Erase joined copies immediately.Jakob Stoklund Olesen2012-05-191-8/+10
| | | | | | | | | The late dead code elimination is no longer necessary. The test changes are cause by a register hint that can be either %rdi or %rax. The choice depends on the use list order, which this patch changes. llvm-svn: 157131
* Fix an ancient bug in removeCopyByCommutingDef().Jakob Stoklund Olesen2012-05-191-2/+5
| | | | | | | | | | | | | | | Before rewriting uses of one value in A to register B, check that there are no tied uses. That would require multiple A values to be rewritten. This bug can't bite in the current version of the code for a fairly subtle reason: A tied use would have caused 2-addr to insert a copy before the use. If the copy has been coalesced, it will be found by the same loop changed by this patch, and the optimization is aborted. This was exposed by 400.perlbench and lua after applying a patch that deletes joined copies aggressively. llvm-svn: 157130
* On Haswell, perfer storing YMM registers using a single instruction.Nadav Rotem2012-05-191-5/+4
| | | | llvm-svn: 157129
* Add support for additional in-reg vbroadcast patternsNadav Rotem2012-05-191-3/+9
| | | | llvm-svn: 157127
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