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* Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in ↵Nadav Rotem2012-05-101-4/+0
| | | | | | | | | | the program. Starting r155461 we are able to select patterns for vbroadcast even when the load op is used by other users. Fix PR11900. llvm-svn: 156539
* ExecutionEngine: Check for NULL ErrorStr before using it.Jim Grosbach2012-05-101-2/+3
| | | | | | Patch by Yury Mikhaylov <yury.mikhaylov@gmail.com>. llvm-svn: 156523
* Fix the objc_storeStrong recognizer to stop before walking off theDan Gohman2012-05-091-1/+4
| | | | | | end of a basic block if there's no store. llvm-svn: 156520
* objectsize:Nuno Lopes2012-05-091-55/+96
| | | | | | | refactor code a bit to enable future changes to support run-time information add support to compute allocation sizes at run-time if penalty > 1 (e.g., malloc(x), calloc(x, y), and VLAs) llvm-svn: 156515
* Mark .opd @progbits, thus avoiding a warning from asm.Roman Divacky2012-05-091-1/+1
| | | | llvm-svn: 156494
* Set the default iOS version to 3.0.Chad Rosier2012-05-091-2/+4
| | | | llvm-svn: 156492
* Use the cpuid 64 bit flag to pick the default CPU name for an unknown model.Bob Wilson2012-05-091-1/+1
| | | | | | | | | | | For the Family 6 switch in sys::getHostCPUName, an unrecognized model was reported as "i686". That's a really bad default since it means that new CPUs will be treated as if they can only use 32-bit code. This just looks at the cpuid extended feature flag for 64 bit support, and if that is set, it uses a default x86-64 cpu. Similar logic is already used for the Family 15 code. <rdar://problem/11314502> llvm-svn: 156486
* Don't return true on a function with a void return type.Chad Rosier2012-05-091-1/+1
| | | | llvm-svn: 156484
* Add Triple::getiOSVersion.Chad Rosier2012-05-091-0/+21
| | | | | | | This new function provides a way to get the iOS version number from ios triples. Part of rdar://11409204 llvm-svn: 156483
* Introduce llvm-c function LLVMPrintModuleToFile.Hans Wennborg2012-05-091-0/+19
| | | | | | | | | This lets you save the textual representation of the LLVM IR to a file. Before this patch it could only be printed to STDERR from llvm-c. Patch by Carlo Kok! llvm-svn: 156479
* change the objectsize intrinsic signature: add a 3rd parameter to denote the ↵Nuno Lopes2012-05-091-1/+25
| | | | | | | | maximum runtime performance penalty that the user is willing to accept. This commit only adds the parameter. Code taking advantage of it will follow. llvm-svn: 156473
* Supply a C interface to the "LinkModules" method.Bill Wendling2012-05-091-0/+15
| | | | | | Patch by Andrew Wilkins! llvm-svn: 156469
* Remove unused variable to get rid of warning.Craig Topper2012-05-091-1/+1
| | | | llvm-svn: 156466
* Add another peephole pattern for conditional moves.Akira Hatanaka2012-05-091-0/+10
| | | | llvm-svn: 156460
* Use ptr_rc_tailcall instead of GR32_TC.Jakob Stoklund Olesen2012-05-093-6/+7
| | | | | | | | | The getPointerRegClass() hook will return GR32_TC, or whatever is appropriate for the current function. Patch by Yiannis Tsiouris! llvm-svn: 156459
* Make register FP allocatable if the compiled function does not have dynamicAkira Hatanaka2012-05-091-2/+8
| | | | | | allocas. llvm-svn: 156458
* Expand 64-bit shifts if target ABI is O32.Akira Hatanaka2012-05-092-3/+83
| | | | llvm-svn: 156457
* Remove unused variable to silence compiler warning.Richard Trieu2012-05-091-1/+0
| | | | llvm-svn: 156456
* Miscellaneous accumulated cleanups.Dan Gohman2012-05-081-104/+78
| | | | llvm-svn: 156445
* Fix it so llvm-objdump -arch does accept x86 and x86-64 as valid arch names.Kevin Enderby2012-05-081-0/+41
| | | | | | PR12731. Patch by Meador Inge! llvm-svn: 156444
* Fix objc_storeStrong pattern matching to catch a potential use of theDan Gohman2012-05-081-9/+29
| | | | | | | old value after the store but before it is released. This fixes rdar:/11116986. llvm-svn: 156442
* Use a shared function for a common operation.Jakob Stoklund Olesen2012-05-081-26/+5
| | | | llvm-svn: 156441
* Fix thinko in conditional.Eric Christopher2012-05-081-1/+1
| | | | | | Part of rdar://11352000 and should bring the buildbots back. llvm-svn: 156421
* DAGCombiner should not change the type of an extract_vector index.Jim Grosbach2012-05-081-3/+4
| | | | | | | | | | When a combine twiddles an extract_vector, care should be take to preserve the type of the index operand. No luck extracting a reasonable testcase, unfortunately. rdar://11391009 llvm-svn: 156419
* Remove excess semi-colons to quiet warnings.Eric Christopher2012-05-082-11/+11
| | | | llvm-svn: 156416
* [Support] Fix sys::GetRandomNumber() to always use a high quality seed.Daniel Dunbar2012-05-081-5/+15
| | | | llvm-svn: 156414
* Update load/store instruction patterns in Hexagon V4.Sirish Pande2012-05-081-492/+492
| | | | llvm-svn: 156411
* Formatting fixes.Akira Hatanaka2012-05-081-4/+4
| | | | | | Patch by Jack Carter. llvm-svn: 156409
* Define mips16 instruction formats.Akira Hatanaka2012-05-082-0/+636
| | | | | | Patch by Reed Kotler. llvm-svn: 156408
* Handle OpDeref in case it comes in as a register operand.Eric Christopher2012-05-082-4/+7
| | | | | | Part of rdar://11352000 llvm-svn: 156405
* remove autoupgrade code for old function attributes format.Nuno Lopes2012-05-081-31/+1
| | | | | | I still left another fixme regarding alignment, because I'm unsure how to remove that code without breaking things llvm-svn: 156387
* remove TYPE_CODE_FUNCTION_OLD type code. it is no longer in use and it was ↵Nuno Lopes2012-05-081-20/+0
| | | | | | marked for removal in 3.0 llvm-svn: 156383
* s/CSR_Ghc/CSR_NoRegs/Jakob Stoklund Olesen2012-05-082-3/+3
| | | | | | | | | Share the CalleeSavedRegs defs between all calling conventions having no callee-saved registers. Patch by Yiannis Tsiouris! llvm-svn: 156382
* Windows/PathV2.inc: Retry rename() for (maximum) 2 seconds.NAKAMURA Takumi2012-05-081-4/+14
| | | | | | Files might be opend by system scanners (eg. file indexer, virus scanner, &c). llvm-svn: 156380
* Calling ReassociateExpression recursively is extremely dangerous since it willDuncan Sands2012-05-081-7/+7
| | | | | | | | | | | | | replace the operands of expressions with only one use with undef and generate a new expression for the original without using RAUW to update the original. Thus any copies of the original expression held in a vector may end up referring to some bogus value - and using a ValueHandle won't help since there is no RAUW. There is already a mechanism for getting the effect of recursion non-recursively: adding the value to be recursed on to RedoInsts. But it wasn't being used systematically. Have various places where recursion had snuck in at some point use the RedoInsts mechanism instead. Fixes PR12169. llvm-svn: 156379
* Rejected r156374: Ordinary PR1255 patch. Due to clang-x86_64-debian-fnt ↵Stepan Dyatkovskiy2012-05-083-144/+34
| | | | | | buildbot failure. llvm-svn: 156377
* Remove 256-bit AVX non-temporal store intrinsics. Similar was previously ↵Craig Topper2012-05-082-12/+33
| | | | | | done for 128-bit. llvm-svn: 156375
* Ordinary patch for PR1255.Stepan Dyatkovskiy2012-05-083-34/+144
| | | | | | | Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object. Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported. llvm-svn: 156374
* Allow NULL LoopPassManager argument in UnrollLoop. PR12734.Andrew Trick2012-05-082-20/+26
| | | | llvm-svn: 156358
* Extract methods for joining physregs.Jakob Stoklund Olesen2012-05-081-77/+103
| | | | | | No functional change. llvm-svn: 156345
* Naming convention and whitespace. No functional change.Jakob Stoklund Olesen2012-05-071-68/+67
| | | | llvm-svn: 156342
* Coalesce subreg-subreg copies.Jakob Stoklund Olesen2012-05-071-14/+25
| | | | | | | | | | | | | | | | | At least some of them: %vreg1:sub_16bit = COPY %vreg2:sub_16bit; GR64:%vreg1, GR32: %vreg2 Previously, we couldn't figure out that the above copy could be eliminated by coalescing %vreg2 with %vreg1:sub_32bit. The new getCommonSuperRegClass() hook makes it possible. This is not very useful yet since the unmodified part of the destination register usually interferes with the source register. The coalescer needs to understand sub-register interference checking first. llvm-svn: 156334
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-0728-47/+69
| | | | | | | | | | | | | The getPointerRegClass() hook can return register classes that depend on the calling convention of the current function (ptr_rc_tailcall). So far, we have been able to infer the calling convention from the subtarget alone, but as we add support for multiple calling conventions per target, that no longer works. Patch by Yiannis Tsiouris! llvm-svn: 156328
* Fix bug in TRI::getCommonSuperRegClass().Jakob Stoklund Olesen2012-05-071-0/+1
| | | | | | Test cases for this code are coming. It is not used for anything yet. llvm-svn: 156327
* Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.Owen Anderson2012-05-071-0/+4
| | | | llvm-svn: 156324
* Teach reassociate to commute FMul's and FAdd's in order to canonicalize the ↵Owen Anderson2012-05-071-4/+28
| | | | | | order of their operands across instructions. This allows for greater CSE opportunities. llvm-svn: 156323
* Make IntelJITEvents and OProfileJIT as optional libraries and addPreston Gurd2012-05-072-2/+2
| | | | | | | | | | | | optional library support to the llvm-build tool: - Add new command line parameter to llvm-build: “--enable-optional-libraries” - Add handing of new llvm-build library type “OptionalLibrary” - Update Cmake and automake build systems to pass correct flags to llvm-build based on configuration Patch by Dan Malea! llvm-svn: 156319
* Add TRI::getCommonSuperRegClass().Jakob Stoklund Olesen2012-05-071-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | This function is a generalization of getMatchingSuperRegClass() to the symmetric case where both sides are using a sub-register index. It will find a super-register class and sub-register indexes that make this diagram commute: PreA SuperRC ----------> RCA | | | | PreB | | SubA | | | | V V RCB ----------> SubRC SubB This can be used to coalesce copies like: %vreg1:sub16 = COPY %vreg2:sub16; GR64:%vreg1, GR32: %vreg2 llvm-svn: 156317
* Fix a regression from r147481. This combine should only happen if there is aChad Rosier2012-05-071-10/+12
| | | | | | | single use. rdar://11360370 llvm-svn: 156316
* Don't assume size_t is unsigned long long.Matt Beaumont-Gay2012-05-071-3/+1
| | | | | | Fixes a -Woverflow warning from gcc when building for 32-bit platforms. llvm-svn: 156313
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