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* Added LLIMCJITMemoryManager to the lli. This manager will be used for MCJIT ↵Danil Malyshev2012-05-161-2/+2
| | | | | | | | instead of DefaultJIMMemoryManager. It's more flexible for MCJIT tasks, in addition it's provides a invalidation instruction cache for code sections which will be used before JIT code will be executed. llvm-svn: 156933
* Hexagon: Remove unused command line option.Benjamin Kramer2012-05-161-2/+0
| | | | llvm-svn: 156917
* Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.Duncan Sands2012-05-162-2/+2
| | | | llvm-svn: 156909
* Significantly reduce the compiled size of Functions.cpp by turning a big ↵Chris Lattner2012-05-161-6/+44
| | | | | | | | | | blob of tblgen generated code (for Intrinsic::getType) into a table. This handles common cases right now, but I plan to extend it to handle all cases and merge in type verification logic as well in follow-on patches. llvm-svn: 156905
* Avoid creating a cycle when folding load / op with flag / store. PR11451474. ↵Evan Cheng2012-05-161-0/+14
| | | | | | rdar://11451474 llvm-svn: 156896
* Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen2012-05-151-9/+0
| | | | | | | | | | | | | | | | It is now possible to coalesce weird skewed sub-register copies by picking a super-register class larger than both original registers. The included test case produces code like this: vld2.32 {d16, d17, d18, d19}, [r0]! vst2.32 {d18, d19, d20, d21}, [r0] We still perform interference checking as if it were a normal full copy join, so this is still quite conservative. In particular, the f1 and f2 functions in the included test case still have remaining copies because of false interference. llvm-svn: 156878
* Teach RegisterCoalescer to handle symmetric sub-register copies.Jakob Stoklund Olesen2012-05-151-14/+28
| | | | | | | | | | | | | It is possible to coalesce two overlapping registers to a common super-register that it larger than both of the original registers. The important difference is that it may be necessary to rewrite DstReg operands as well as SrcReg operands because the sub-register index has changed. This behavior is still disabled by CoalescerPair. llvm-svn: 156869
* Handle NewReg==OldReg in renameRegister().Jakob Stoklund Olesen2012-05-151-1/+2
| | | | | | | This can happen when widening a virtual register to a super-register class. llvm-svn: 156867
* We never call adjustCopiesBackFrom() for partial copies.Jakob Stoklund Olesen2012-05-151-1/+3
| | | | | | There is no need to look at an always null SrcIdx. llvm-svn: 156866
* reuse the result of some expensive computations in getSignExtendExpr() and ↵Nuno Lopes2012-05-151-18/+20
| | | | | | | | getZeroExtendExpr() this gives a speedup of > 80 in a debug build in the test case of PR12825 (php_sha512_crypt_r) llvm-svn: 156849
* Extend the CoalescerPair interface to handle symmetric sub-register copies.Jakob Stoklund Olesen2012-05-152-44/+51
| | | | | | | | | | Now both SrcReg and DstReg can be sub-registers of the final coalesced register. CoalescerPair::setRegisters still rejects such copies because RegisterCoalescer doesn't yet handle them. llvm-svn: 156848
* Add -enable-aa-sched-mi, off by default, for AliasAnalysis inside ↵Andrew Trick2012-05-151-22/+243
| | | | | | | | | | | | | | | MachineScheduler. This feature avoids creating edges in the scheduler's dependence graph for non-aliasing memory operations according to whichever alias analysis is available. It has been fully tested in Hexagon. Before making this default, it needs to be extended to handle multiple MachineMemOperands, compile time needs more evaluation, and benchmarking on X86 and ARM is needed. Patch by Sergei Larin! llvm-svn: 156842
* Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach2012-05-1511-5/+24
| | | | | | | | Add the MCRegisterInfo to the factories and constructors. Patch by Tom Stellard <Tom.Stellard@amd.com>. llvm-svn: 156828
* minor simplification to code: Ty is already a SCEV type; don't need to run ↵Nuno Lopes2012-05-151-6/+3
| | | | | | getEffectiveSCEVType() twice llvm-svn: 156823
* Teach SimplifyLibCalls about stpcpy.David Majnemer2012-05-151-7/+54
| | | | llvm-svn: 156815
* Rejected r156804 due to buildbots failures.Stepan Dyatkovskiy2012-05-151-35/+46
| | | | llvm-svn: 156808
* SelectionDAGBuilder::Clusterify : main functinality was replaced with ↵Stepan Dyatkovskiy2012-05-151-46/+35
| | | | | | CRSBuilder::optimize, so big part of Clusterify's code was reduced. llvm-svn: 156804
* Temporarily disable anti-dependence breaking for Mips until bug 12829 isAkira Hatanaka2012-05-151-1/+1
| | | | | | resolved. llvm-svn: 156801
* Remove extraneous ';'.Bill Wendling2012-05-151-1/+1
| | | | llvm-svn: 156791
* Add a command line option to skip the delay slot filler pass entirely for Mips.Akira Hatanaka2012-05-141-0/+10
| | | | | | | | | | The purpose of this option is to silence error messages issued by machine verifier passes and enable them to run to the end. If this option is not provided, -verify-machineinstrs complains when it discovers there is a non-terminator instruction (an instruction that is in a delay slot) after the first terminator in a basic block. llvm-svn: 156790
* [Support/YAMLParser] Use rtrim on plain scalars.Michael J. Spencer2012-05-141-3/+1
| | | | llvm-svn: 156787
* Fix use of uninitialized variable.David Blaikie2012-05-141-1/+1
| | | | | | Found by GCC's maybe-uninitialized. llvm-svn: 156780
* Don't access MO reference after invalidating operand list.Jakob Stoklund Olesen2012-05-141-2/+3
| | | | | | This should unbreak llvm-x86_64-linux. llvm-svn: 156778
* Fix PR12821.Jakob Stoklund Olesen2012-05-141-0/+6
| | | | | | | RAFast must add an <imp-def> operand when it is rewriting a sub-register def that isn't a read-modify-write. llvm-svn: 156777
* Move the capture analysis from MemoryDependencyAnalysis to a more general placeChad Rosier2012-05-143-86/+93
| | | | | | | | | so that it can be reused in MemCpyOptimizer. This analysis is needed to remove an unnecessary memcpy when returning a struct into a local variable. rdar://11341081 PR12686 llvm-svn: 156776
* Revert 156634 upon request until code improvement changes are made.Brendon Cahoon2012-05-1415-3689/+339
| | | | llvm-svn: 156775
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-143-4/+4
| | | | llvm-svn: 156774
* SwitchInst cosmetics: renamed "Hash" method to "hash"Stepan Dyatkovskiy2012-05-142-2/+2
| | | | llvm-svn: 156757
* Use ArrayRef instead of an explicit vector type.Bill Wendling2012-05-141-2/+1
| | | | llvm-svn: 156755
* Hexagon: Initialize TBB to 0.Benjamin Kramer2012-05-131-0/+1
| | | | | | Found by valgrind. llvm-svn: 156744
* Fix spacing after if.Benjamin Kramer2012-05-121-6/+5
| | | | llvm-svn: 156716
* Add support for the .rept directive. Patch by Vladmir Sorokin. I added supportRafael Espindola2012-05-121-0/+91
| | | | | | for nesting. llvm-svn: 156714
* ELF: Add support for the asm .version directive.Benjamin Kramer2012-05-121-0/+28
| | | | llvm-svn: 156712
* AsmParser: Add support for the .purgem directive.Benjamin Kramer2012-05-121-0/+23
| | | | | | Based on a patch by Team PaX. llvm-svn: 156709
* AsmParser: Give a nice error message for .code16gcc, which is currently ↵Benjamin Kramer2012-05-121-1/+1
| | | | | | | | unsupported. Patch by Team PaX! llvm-svn: 156708
* AsmParser: ignore the .extern directive.Benjamin Kramer2012-05-121-0/+4
| | | | llvm-svn: 156707
* AsmParser: Add support for .ifc and .ifnc directives.Benjamin Kramer2012-05-121-0/+54
| | | | | | Based on a patch from PaX Team. llvm-svn: 156706
* AsmParser: Add support for .ifb and .ifnb directives.Benjamin Kramer2012-05-121-0/+29
| | | | | | Based on a patch from PaX Team. llvm-svn: 156705
* Recommited r156374 with critical fixes in BitcodeReader/Writer:Stepan Dyatkovskiy2012-05-123-38/+157
| | | | | | | | Ordinary patch for PR1255. Added new case-ranges orientated methods for adding/removing cases in SwitchInst. After this patch cases will internally representated as ConstantArray-s instead of ConstantInt, externally cases wrapped within the ConstantRangesSet object. Old methods of SwitchInst are also works well, but marked as deprecated. So on this stage we have no side effects except that I added support for case ranges in BitcodeReader/Writer, of course test for Bitcode is also added. Old "switch" format is also supported. llvm-svn: 156704
* Teach Function::hasAddressTaken that BlockAddress doesn't really takeJay Foad2012-05-122-1/+6
| | | | | | the address of a function. llvm-svn: 156703
* Make sure new value jump is enabled for Hexagon V5 as well.Sirish Pande2012-05-121-10/+27
| | | | llvm-svn: 156700
* Support for Hexagon feature, New Value Jump.Sirish Pande2012-05-127-2/+682
| | | | llvm-svn: 156698
* Remove MipsEmitGPRestore.cpp.Akira Hatanaka2012-05-123-99/+0
| | | | llvm-svn: 156696
* Delete all functions that are no longer needed in MipsFunctionInfo, includingAkira Hatanaka2012-05-122-15/+1
| | | | | | | | | the ones that get or set the frame index for the $gp save slot. Remove the piece of code in MipsFunctionInfo::getGlobalBaseReg() which returns GP. This function should always return a virtual register. llvm-svn: 156695
* Stop reserving register $gp. Do not call isGPFI to check whether a frame objectAkira Hatanaka2012-05-121-8/+1
| | | | | | is the $gp save slot. llvm-svn: 156694
* Do not add the pass which restores $gp after every function call.Akira Hatanaka2012-05-121-9/+0
| | | | llvm-svn: 156693
* Make the following changes in MipsISelLowering.cpp:Akira Hatanaka2012-05-121-8/+8
| | | | | | | | | - Stop creating stack frame objects needed for saving $gp. - Insert a node that copies the global pointer register to register $gp before the call node. This will ensure $gp is valid at the entry of the called function. llvm-svn: 156692
* Make the following changes in MipsFrameLowering.cpp:Akira Hatanaka2012-05-121-32/+3
| | | | | | | | - Stop emitting instructions needed to initialize the global pointer register. - Stop emitting .cprestore directive. - Do not take into account the $gp save slot when computing stack size. llvm-svn: 156691
* Make the following changes in MipsAsmPrinter.cpp:Akira Hatanaka2012-05-123-31/+11
| | | | | | | | | - Remove code which lowers pseudo SETGP01. - Fix LowerSETGP01. The first two of the three instructions that are emitted to initialize the global pointer register now use register $2. - Stop emitting .cpload directive. llvm-svn: 156689
* Hoist simpler checks above llvm::PointerMayBeCaptured. No functional change ↵Chad Rosier2012-05-121-4/+6
| | | | | | intended. llvm-svn: 156687
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