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* llvm-cov: s/(.*)Executed/\1Exec/Yuchen Wu2013-12-181-3/+3
| | | | llvm-svn: 197595
* llvm-cov: Added -c option for branch counts.Yuchen Wu2013-12-181-11/+30
| | | | | | | | | This will cause llvm-cov to output branch counts instead of branch probabilities. -b must be enabled. Also updated tests. llvm-svn: 197594
* [arm] Rename Tag_VFP_arch to Tag_FP_arch.Logan Chien2013-12-182-10/+10
| | | | | | | | According to "Addenda to ABI for ARM architecture", Tag_FP_arch is the new name for the equivalent Tag_VFP_arch. This commit renames Tag_VFP_arch to Tag_FP_arch. llvm-svn: 197587
* Fix f64 and f128 for ppc-darwin.Rafael Espindola2013-12-181-1/+3
| | | | | | | | | | This patch adds -f64:32:64 to 32 bit ppc darwin since a f64 inside a structure are only 32 bit aligned. The patch also drop -f128:64:128 from all ppc darwin, since f128 is 128 bit aligned. llvm-svn: 197574
* One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.Rafael Espindola2013-12-181-1/+2
| | | | | | | | Thanks for Iain Sandoe for testing this with the original gcc. Clang was already getting this right. llvm-svn: 197572
* ARM: update comment to match realityTim Northover2013-12-181-1/+2
| | | | llvm-svn: 197570
* DiagnosticInfo: Add missing namespaceTobias Grosser2013-12-181-1/+1
| | | | llvm-svn: 197556
* ARM: set default float ABI based on triple.Tim Northover2013-12-182-1/+7
| | | | | | | | | | | | Clang sets the float-abi target option manually, but no longer annotates each function with its ABI. This can lead to confusing mistmatch between "clang -emit-llvm | llc" and normal clang invocations. Besides which, gnueabihf actually *is* hard-float. Defaulting to soft was just perverse. llvm-svn: 197554
* [AArch64 NEON]Implment loading vector constant form constant pool.Kevin Qin2013-12-185-9/+79
| | | | llvm-svn: 197551
* AsmParser: add support for .end directiveSaleem Abdulrasool2013-12-181-1/+22
| | | | | | | | | | | | | The .end directive indicates the end of the file. No further instructions are processed after a .end directive is encountered. One potential (glaringly obvious) optimisation that could be pursued here is to extend MCAsmParser with a DiscardRemainder method to avoid processing lexemes to the end of the file. It was unclear at this point if that would be worth adding, and could easily be added in a follow on change. Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org> llvm-svn: 197547
* DebugInfo: Introduce new DIValue, DIETypeSignature to encode references to ↵David Blaikie2013-12-176-36/+61
| | | | | | | | | type units via their signatures This simplifies type unit and type unit reference creation as well as setting the stage for inter-type hashing across type unit boundaries. llvm-svn: 197539
* Fix N32 registers and stack alignment.Rafael Espindola2013-12-171-1/+1
| | | | | | | | | This patch fixes the "n" and "S" components of the data layout for mips. Clang already gets this right. This will be tested in clang. llvm-svn: 197536
* Eliminate PPC instruction decoding ambiguitiesHal Finkel2013-12-172-36/+47
| | | | | | | | | | | | The instruction definitions in the PPC backend have a number of variants defined for the same instruction to represent differences between 64-bit and 32-bit semantics. In order to generate a disassembler for the PPC backend, we need to mark all but one of these as CodeGen only. No functionality change intended; this is prep work for PPC disassembly support. llvm-svn: 197535
* [DiagnosticPrinter] Use the appropriate method to print a Twine object in aQuentin Colombet2013-12-171-1/+1
| | | | | | raw_ostream. llvm-svn: 197531
* MC COFF: Emit the 'b' section flag for .bss sections in GNU assemblyReid Kleckner2013-12-171-0/+2
| | | | | | | | | Without this, assembling clang's disassembly would produce an object file with the IMAGE_SCN_CNT_INITIALIZED_DATA section characteristic rather than the uninitialized one. link.exe would warn when merging comdats with different flags. llvm-svn: 197529
* On APCS, only try to align aggregates to 32 bits instead of 64.Rafael Espindola2013-12-171-3/+3
| | | | | | | This matches clang's behavior and since it is only a preference, it is not an ABI issue. llvm-svn: 197526
* Handle i64 first for clarity. No functionality change.Rafael Espindola2013-12-171-5/+6
| | | | llvm-svn: 197524
* Assert that the last operand is actually EFLAGSDuncan P. N. Exon Smith2013-12-171-0/+6
| | | | | | | | | This is another follow-up to r197503, after a post-commit review by Andy. <rdar://problem/15627766> llvm-svn: 197520
* Disabled subregister copy coalescing during MachineCSE.Andrew Trick2013-12-171-5/+15
| | | | | | | | | This effectively backs out r197465 but leaves some of the general fixes in place. Not all targets are ready to handle this feature. To enable it, some infrastructure work is needed to better handle register class constraints. llvm-svn: 197514
* Add warning capabilities in LLVM.Quentin Colombet2013-12-177-7/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reapplies r197438 and fixes the link-time circular dependency between IR and Support. The fix consists in moving the diagnostic support into IR. The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is. This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI. This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind). This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system. http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174> llvm-svn: 197508
* [mips] Fix off by one issue when applying a fixup.Matheus Almeida2013-12-171-2/+2
| | | | | | | The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed immediate. llvm-svn: 197506
* Revert "Revert "Mark vastart_save_xmm_regs as changing EFLAGS""Duncan P. N. Exon Smith2013-12-172-3/+4
| | | | | | | | | | | | | | | | | | | This reverts commit r197481, recommiting r197469 with an extra fix. The vastart_save_xmm_regs pseudo-instruction expands to a test and a branch, so it modifies EFLAGS. Mark it so, or else the scheduler might place it in the middle of another test+branch. This fixes a bug exposed by r192750, which changed the initial scheduler to source-order as part of enabling the MI Scheduler for X86. This re-commit changes the VASTART_SAVE_XMM_REGS custom inserter not to try to save %flags, and adds a test that catches the bad behavior of r197469. <rdar://problem/15627766> llvm-svn: 197503
* Fix the pointer size for the PS3 datalayout.Rafael Espindola2013-12-171-2/+5
| | | | | | This will be tested from clang. llvm-svn: 197501
* Fix for PR18045:Stepan Dyatkovskiy2013-12-171-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | http://llvm.org/bugs/show_bug.cgi?id=18045 Short issue description: For X86 machines with sse < sse4.1 we got failures for some particular load/store vector sequences: $ clang-trunk -m32 -O2 test-case.c fatal error: error in backend: Cannot select: 0x4200920: v4i32,ch = load 0x41d6ab0, 0x4205850, 0x41dcb10<LD16[getelementptr inbounds ([4 x i32]* @e, i32 0, i32 0)](align=4)> [ORD=82] [ID=58] 0x4205850: i32 = X86ISD::Wrapper 0x41d5490 [ORD=26] [ID=43] 0x41d5490: i32 = TargetGlobalAddress<[4 x i32]* @e> 0 [ORD=26] [ID=23] 0x41dcb10: i32 = undef [ID=2] The reason is that EltsFromConsecutiveLoads could emit such load instruction both before and after legalize stage. Though this instruction is not legal for machines with SSSE3 and lower. The fix: In EltsFromConsecutiveLoads, if we have passed legalize stage, we check whether nodes it emits are legal. P.S.: If you get failure in time from 12:00 and till 22:00 (UTC-8), perhaps I'll slow with response, so you better reject this commit. Thanks! llvm-svn: 197492
* There are no __register_frame and __deregister_frame functions Yaron Keren2013-12-171-1/+1
| | | | | | | | | | when using structured exception handling (SEH) on Windows 64. http://llvm-reviews.chandlerc.com/D2378 Patch by Jonathan Liu! llvm-svn: 197483
* AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey ↵Elena Demikhovsky2013-12-174-1/+26
| | | | | | | | Bader). Added implementation of "truncate" from integer type (i64/i32/i16/i8) to i1. llvm-svn: 197482
* Revert "Mark vastart_save_xmm_regs as changing EFLAGS"Duncan P. N. Exon Smith2013-12-171-1/+1
| | | | | | | | | This reverts commit r197469. The sanitizer and dragonegg buildbots are failing, I think because of this change. Reverting until I figure out why. llvm-svn: 197481
* Mark vastart_save_xmm_regs as changing EFLAGSDuncan P. N. Exon Smith2013-12-171-1/+1
| | | | | | | | | | | | | The vastart_save_xmm_regs pseudo-instruction expands to a test and a branch, so it modifies EFLAGS. Mark it so, or else the scheduler might place it in the middle of another test+branch. This fixes a bug exposed by r192750, which turned on the MI Scheduler for X86. <rdar://problem/15627766> llvm-svn: 197469
* Allow MachineCSE to coalesce trivial subregister copies the same way that it ↵Andrew Trick2013-12-174-12/+50
| | | | | | | | | | | | | | | | | | | | coalesces normal copies. Without this, MachineCSE is powerless to handle redundant operations with truncated source operands. This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled: %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1 %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2 %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def> Test case: cse-add-with-overflow.ll. This exposed an existing bug in PPCInstrInfo::commuteInstruction. Thanks to Rafael for the test case: PowerPC/crash.ll. llvm-svn: 197465
* whitespaceAndrew Trick2013-12-171-3/+3
| | | | llvm-svn: 197464
* Make comment more explicit.Jim Grosbach2013-12-171-3/+3
| | | | | | | Re-reading the comment I updated in previous commit, it's better to make it more explicit and avoid ambiguity more effectively. llvm-svn: 197458
* Typo. s/reserved/preserved/Jim Grosbach2013-12-171-1/+1
| | | | llvm-svn: 197457
* Add a machine code print in DEBUG() following instruction selection.Jim Grosbach2013-12-171-0/+3
| | | | | | | Make debugging ISel a bit easier by printing out a dump of the generated code at the end. llvm-svn: 197456
* Revert r197438 and r197447 until we figure out how to avoid circular ↵Quentin Colombet2013-12-177-213/+7
| | | | | | dependency at link time llvm-svn: 197451
* LoopVectorizer: Don't if-convert constant expressions that can trapArnold Schwaighofer2013-12-171-1/+31
| | | | | | | | | | A phi node operand or an instruction operand could be a constant expression that can trap (division). Check that we don't vectorize such cases. PR16729 radar://15653590 llvm-svn: 197449
* [LLVM Diagnostic Capabilities] Remove useless includes fromQuentin Colombet2013-12-171-2/+0
| | | | | | | | | DiagnosticPrinter.cpp. These was creating a link time dependencies of IR on CodeGen and Analysis. Part of <rdar://problem/15515174> llvm-svn: 197447
* Add warning capabilities in LLVM.Quentin Colombet2013-12-167-7/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds a new LLVMContext::diagnose that can be used to communicate to the front-end, if any, that something of interest happened. The diagnostics are supported by a new abstraction, the DiagnosticInfo class. The base class contains the following information: - The kind of the report: What this is about. - The severity of the report: How bad this is. This patch also adds 2 classes: - DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic will be used to switch to the new diagnostic API for LLVMContext::emitError. - DiagnosticStackSize: For stack size reporting. Comes as a replacement of the hard coded warning in PEI. This patch also features dynamic diagnostic identifiers. In other words plugins can use this infrastructure for their own diagnostics (for more details, see getNextAvailablePluginDiagnosticKind). This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in the LLVMContext that should be set by the front-end to be able to map these diagnostics in its own system. http://llvm-reviews.chandlerc.com/D2376 <rdar://problem/15515174> llvm-svn: 197438
* Enable double to float shrinking optimizations for binary functions like ↵Yi Jiang2013-12-163-9/+96
| | | | | | 'fmin/fmax'. Fix radar:15283121 llvm-svn: 197434
* llvm-cov: Added -u option for unconditional branch info.Yuchen Wu2013-12-161-8/+18
| | | | | | | | | Outputs branch information for unconditional branches in addition to conditional branches. -b option must be enabled. Also updated tests. llvm-svn: 197432
* [Stackmap] Allow WebKit_JS calling convention to store 4 byte sized and ↵Juergen Ributzka2013-12-161-5/+8
| | | | | | | | | aligned arguments. This allows the WebKit_JS calling convention to perform partial writes on a 4 byte granularity to stack slots. llvm-svn: 197431
* Fix typo in instruction name.Matt Arsenault2013-12-161-1/+1
| | | | | | SI_KIL -> SI_KILL llvm-svn: 197425
* Revert "Allow MachineCSE to coalesce trivial subregister copies the same way ↵Rafael Espindola2013-12-162-35/+9
| | | | | | | | | | that it coalesces normal copies." This reverts commit r197414. It broke the ppc64 bootstrap. I will post a testcase in a sec. llvm-svn: 197424
* llvm-cov: Removed extra semicolon from ;;.Yuchen Wu2013-12-161-1/+1
| | | | llvm-svn: 197418
* [Stackmap] The first integer argument is passed in register for the ↵Juergen Ributzka2013-12-161-0/+4
| | | | | | | | WebKit_JS calling convention. Pass the first integer argument (callee) in register to optimize inline caches. llvm-svn: 197416
* Allow MachineCSE to coalesce trivial subregister copies the same wayAndrew Trick2013-12-162-9/+35
| | | | | | | | | | | | | | | | | that it coalesces normal copies. Without this, MachineCSE is powerless to handle redundant operations with truncated source operands. This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled: %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1 %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2 %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def> llvm-svn: 197414
* whitespaceAndrew Trick2013-12-161-1/+1
| | | | llvm-svn: 197413
* One last cleanup of LLVM's DataLayout strings.Rafael Espindola2013-12-165-15/+16
| | | | | | | Produce them in the same order on every target. The order is that of getStringRepresentation: e|E-i*-f*-v*-a*-s*-n*-S*. llvm-svn: 197411
* Structure R600's computeDataLayout more like every other target.Rafael Espindola2013-12-161-8/+5
| | | | | | While there, simplify "p3:32:32:32" to "p3:32:32". llvm-svn: 197407
* Recognize EABIHF as environment and use it for RTAPI + VFP.Joerg Sonnenberger2013-12-163-1/+5
| | | | llvm-svn: 197405
* [AArch64] Fix v1fx patterns for Floating-point Multiply Extend and ↵Chad Rosier2013-12-161-8/+11
| | | | | | Floating-point Compare to Zero. llvm-svn: 197402
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