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* There are a few places where subtarget features are stillRanjeet Singh2015-06-309-72/+92
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* [mips] [IAS] Add support for the .set oddspreg/nooddspreg directives.Toma Tabacu2015-06-303-0/+52
| | | | | | Differential Revision: http://reviews.llvm.org/D10657 llvm-svn: 241052
* [X86] Add FXSR intrinsicsMichael Kuperstein2015-06-301-8/+8
| | | | | | Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64) llvm-svn: 241049
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-304-15/+6
| | | | llvm-svn: 241042
* Drop the OS from the WebAssembly target triple for now.Dan Gohman2015-06-301-2/+0
| | | | | | | This unbreaks TripleTest.Normalization. We'll have to come up with a new plan for the OS component of the target triple for WebAssembly. llvm-svn: 241041
* Move function to the only file that uses it.Rafael Espindola2015-06-301-24/+0
| | | | llvm-svn: 241040
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-301-7/+5
| | | | llvm-svn: 241039
* Debug info: Add dwarf backend support for DIModule.Adrian Prantl2015-06-304-0/+30
| | | | | | rdar://problem/20965932 llvm-svn: 241034
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-308-30/+15
| | | | llvm-svn: 241033
* Cleanup getRelocationAddend.Rafael Espindola2015-06-302-9/+6
| | | | | | | | | | | Realistically, this will be returning ErrorOr for some time as refactoring the user code to check once per section will take some time. Given that, use it for checking if a relocation has addend or not. While at it, add ELFRelocationRef to simplify the users. llvm-svn: 241028
* RegisterCoalescer: Cleanup empty subranges after shrinkToUses()Matthias Braun2015-06-301-0/+1
| | | | | | | | A call to removeEmptySubranges() is necessary after every operation that potentially removes all segments from a subregister range; this case in the register coalescer was missing. llvm-svn: 241027
* Object/COFF: Define coff_symbol_generic.Rui Ueyama2015-06-301-6/+10
| | | | | | | | | | | | | | If you only need Name and Value fields in the COFF symbol, you don't need to distinguish 32 bit and 64 bit COFF symbols. These fields start at the same offsets and have the same size. This data strucutre is one pointer smaller than COFFSymbolRef thus slightly efficient. I'll use this class in LLD as we create millions of LLD symbol objects that currently contain COFFSymbolRef. Shaving off 8 byte (or 4 byte on 32 bit) from that class actually matters becasue of the number of objects we create in LLD. llvm-svn: 241024
* [WebAssembly] Initial WebAssembly backendDan Gohman2015-06-2949-0/+1856
| | | | | | | This WebAssembly backend is just a skeleton at this time and is not yet functional. llvm-svn: 241022
* Don't return error_code from function that never fails.Rafael Espindola2015-06-299-34/+14
| | | | llvm-svn: 241021
* Add a DIModule metadata node to the IR.Adrian Prantl2015-06-299-0/+126
| | | | | | | | | | | | | | | | | | | It is meant to be used to record modules @imported by the current compile unit, so a debugger an import the same modules to replicate this environment before dropping into the expression evaluator. DIModule is a sibling to DINamespace and behaves quite similarly. In addition to the name of the module it also records the module configuration details that are necessary to uniquely identify the module. This includes the configuration macros (e.g., -DNDEBUG), the include path where the module.map file is to be found, and the isysroot. The idea is that the backend will turn this into a DW_TAG_module. http://reviews.llvm.org/D9614 rdar://problem/20965932 llvm-svn: 241017
* Reapply "Use gethostuuid() on Mac to identify hosts for LockFileManager"Ben Langmuir2015-06-291-14/+56
| | | | | | | | | | | | | | Reapplies r241005 after fixing the build on non-Mac platforms. Original commit message below. The hostname can be very unstable when there are many machines on the network competing for the same name. Using the hardware UUID makes it less likely to have collisions or to consider files written by the current host to be owned by a different one at a later time. rdar://problem/21512307 llvm-svn: 241012
* Teach LTOModule to emit linker flags for dllexported symbols, plus interface ↵Peter Collingbourne2015-06-294-85/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cleanup. This change unifies how LTOModule and the backend obtain linker flags for globals: via a new TargetLoweringObjectFile member function named emitLinkerFlagsForGlobal. A new function LTOModule::getLinkerOpts() returns the list of linker flags as a single concatenated string. This change affects the C libLTO API: the function lto_module_get_*deplibs now exposes an empty list, and lto_module_get_*linkeropts exposes a single element which combines the contents of all observed flags. libLTO should never have tried to parse the linker flags; it is the linker's job to do so. Because linkers will need to be able to parse flags in regular object files, it makes little sense for libLTO to have a redundant mechanism for doing so. The new API is compatible with the old one. It is valid for a user to specify multiple linker flags in a single pragma directive like this: #pragma comment(linker, "/defaultlib:foo /defaultlib:bar") The previous implementation would not have exposed either flag via lto_module_get_*deplibs (as the test in TargetLoweringObjectFileCOFF::getDepLibFromLinkerOpt was case sensitive) and would have exposed "/defaultlib:foo /defaultlib:bar" as a single flag via lto_module_get_*linkeropts. This may have been a bug in the implementation, but it does give us a chance to fix the interface. Differential Revision: http://reviews.llvm.org/D10548 llvm-svn: 241010
* Revert "Use gethostuuid() on Mac to identify hosts for LockFileManager"Ben Langmuir2015-06-291-54/+14
| | | | | | | | Broke non-Mac builds. This reverts commit r241005. llvm-svn: 241007
* Use gethostuuid() on Mac to identify hosts for LockFileManagerBen Langmuir2015-06-291-14/+54
| | | | | | | | | | | The hostname can be very unstable when there are many machines on the network competing for the same name. Using the hardware UUID makes it less likely to have collisions or to consider files written by the current host to be owned by a different one at a later time. rdar://problem/21512307 llvm-svn: 241005
* ARM: add correct kill flags when combining stm instructionsTim Northover2015-06-291-0/+6
| | | | | | | | | When the store sequence being combined actually stores the base register, we should not mark it as killed until the end. rdar://21504262 llvm-svn: 241003
* X86: Rework inline asm integer register specification.Matthias Braun2015-06-293-73/+60
| | | | | | | | | | | | | | | | | | | | | | | This is a new version of http://reviews.llvm.org/D10260. It turned out that when you specify an integer register in inline asm on x86 you get the register of the required type size back. That means that X86TargetLowering::getRegForInlineAsmConstraint() has to accept any of the integer registers and adapt its size to the given target size which may be any 8/16/32/64 bit sized type. Surprisingly that means given a constraint of "{ax}" and a type of MVT::F32 we need to return X86::EAX. This change makes this face explicit, the previous code seemed like working by accident because there it never returned an error once a register was found. On the other hand this rewrite allows to actually return errors for invalid situations like requesting an integer register for an i128 type. Related to rdar://21042280 Differential Revision: http://reviews.llvm.org/D10813 llvm-svn: 241002
* [LoopSimplify] Set proper debug location in loop backedge blocks.Alexey Samsonov2015-06-291-1/+2
| | | | | | | | | | | | | Set debug location for terminator instruction in loop backedge block (which is an unconditional jump to loop header). We can't copy debug location from original backedges, as there can be several of them, with different debug info locations. So, we follow the approach of SplitBlockPredecessors, and copy the debug info from first non-PHI instruction in the header (i.e. destination block). This is yet another change for PR23837. llvm-svn: 240999
* [DAGCombiner] Fix & simplify constant folding of sext/zext.Pawel Bylica2015-06-291-13/+11
| | | | | | | | | | | | | | | | Summary: This patch fixes the cases of sext/zext constant folding in DAG combiner where constans do not fit 64 bits. The fix simply removes un$ Test Plan: New regression test included. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10607 llvm-svn: 240991
* [MMI] Use TinyPtrVector instead of PointerUnion with vector.Benjamin Kramer2015-06-292-100/+22
| | | | | | Also simplify duplicated code a bit. No functionality change intended. llvm-svn: 240990
* Tidy comment.Diego Novillo2015-06-291-1/+1
| | | | llvm-svn: 240987
* Clean up unique lock files on signal and always release the lockBen Langmuir2015-06-291-1/+40
| | | | | | | | | | | | | | Make sure to remove the unique lock file, which is what the .lock symlink points to, if there is a signal while the lock is held. This will release the lock, since the symlink will point to nothing (already tested in unit tests). For good measure, also clean up the unique lock file if there is an error or signal before the lock is acquired. I will add a clang test. rdar://problem/21512307 llvm-svn: 240967
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-292-3/+65
| | | | | | | | | | | | | | | | | This commit implements serialization of the register mask machine operands. This commit serializes only the call preserved register masks that are defined by a target, it doesn't serialize arbitrary register masks. This commit also extends the TargetRegisterInfo class and TableGen so that the users of TRI can get the list of all the call preserved register masks and their names. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10673 llvm-svn: 240966
* [SymbolSize] Skip sorting by index, just assign by index.Benjamin Kramer2015-06-291-7/+3
| | | | | | No functional change intended. llvm-svn: 240961
* Upgrade JIT listeners for changes in the libObject API.Benjamin Kramer2015-06-292-22/+19
| | | | llvm-svn: 240956
* Move delinearization from SCEVAddRecExpr to ScalarEvolutionTobias Grosser2015-06-293-21/+25
| | | | | | | | | | The expressions we delinearize do not necessarily have to have a SCEVAddRecExpr at the outermost level. At this moment, the additional flexibility is not exploited in LLVM itself, but in Polly we will soon soonish use this functionality. For LLVM, this change should not affect existing functionality (which is covered by test/Analysis/Delinearization/) llvm-svn: 240952
* Factor out the checking of string tables.Rafael Espindola2015-06-291-0/+2
| | | | | | | | | | This moves the error checking for string tables to getStringTable which returns an ErrorOr<StringRef>. This improves error checking, makes it uniform across all string tables and makes it possible to check them once instead of once per name. llvm-svn: 240950
* AVX-512: all forms of SCATTER instruction on SKX,Elena Demikhovsky2015-06-294-32/+102
| | | | | | encoding, intrinsics and tests. llvm-svn: 240936
* [ARM]: Extend -mfpu options for half-precision and vfpv3xdJaved Absar2015-06-291-2/+0
| | | | | | | | removing default label in switch as it results. This is part of earlier commit http://reviews.llvm.org/D1064 Subscribers: llvm-commits llvm-svn: 240932
* [ARM]: Extend -mfpu options for half-precision and vfpv3xdJaved Absar2015-06-293-25/+89
| | | | | | | | | | | | | | | Some of the the permissible ARM -mfpu options, which are supported in GCC, are currently not present in llvm/clang.This patch adds the options: 'neon-fp16', 'vfpv3-fp16', 'vfpv3-d16-fp16', 'vfpv3xd' and 'vfpv3xd-fp16. These are related to half-precision floating-point and single precision. Reviewers: rengolin, ranjeet.singh Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10645 llvm-svn: 240930
* AVX-512: Implemented missing encoding and intrinsics for FMA instructionsIgor Breger2015-06-293-153/+272
| | | | | | | | Added tests for DAG lowering ,encoding and intrinsics Differential Revision: http://reviews.llvm.org/D10796 llvm-svn: 240926
* Whitespace.NAKAMURA Takumi2015-06-291-15/+15
| | | | llvm-svn: 240924
* AMDGPU/SI: Fix extra space when printing v_div_fmas_*Matt Arsenault2015-06-281-1/+1
| | | | llvm-svn: 240911
* [SLSR] S's basis must have the same type as SJingyue Wu2015-06-281-2/+4
| | | | llvm-svn: 240910
* [x86][AVX512]Asaf Badouh2015-06-285-9/+83
| | | | | | | | | | | Add vscalef support include encoding and intrinsics review: http://reviews.llvm.org/D10730 llvm-svn: 240906
* AVX-512: Added all SKX forms of GATHER instructions.Elena Demikhovsky2015-06-286-25/+120
| | | | | | | Added intrinsics. Added encoding and tests. llvm-svn: 240905
* Revert "Debug Info: One more bitfield bugfix. While yesterday's r240853 fixed"Adrian Prantl2015-06-271-18/+13
| | | | | | This reverts commit 240890. Breaking the gdb buildbot. llvm-svn: 240893
* [SDAG] Now that we have a way to communicate the exact bit on sdiv use it to ↵Benjamin Kramer2015-06-273-18/+22
| | | | | | | | | | | | | | | | | simplify sdiv by a constant. We had a hack in SDAGBuilder in place to work around this but now we can avoid that. Call BuildExactSDIV from BuildSDIV so DAGCombiner can perform this trick automatically. The added check in DAGCombiner is necessary to prevent exact sdiv by pow2 from regressing as the target-specific pow2 lowering is not aware of exact bits yet. This is mostly covered by existing tests. One side effect is that we get the better lowering for exact vector sdivs now too :) llvm-svn: 240891
* Debug Info: One more bitfield bugfix. While yesterday's r240853 fixedAdrian Prantl2015-06-271-16/+21
| | | | | | | | | | the DW_AT_bit_offset computation, the byte offset is in fact also endian-dependent as it needs to point to the storage unit containing the most-significant bit of the the bitfield. I'm so looking forward to emitting the endian-agnostic DWARF 3 version instead. llvm-svn: 240890
* [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.Daniel Sanders2015-06-277-20/+78
| | | | | | | | | | | | | | | | | Summary: Previously it (incorrectly) used GPR's. Patch by Simon Dardis. A couple small corrections by myself. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10567 llvm-svn: 240883
* [LoopVectorize] Pointer indicies may be wider than the pointerDavid Majnemer2015-06-271-3/+10
| | | | | | | | | | | If we are dealing with a pointer induction variable, isInductionPHI gives back a step value of Stride / size of pointer. However, we might be indexing with a legal type wider than the pointer width. Handle this by inserting casts where appropriate instead of crashing. This fixes PR23954. llvm-svn: 240877
* [PruneEH] A naked, noinline function can return via InlineAsmDavid Majnemer2015-06-271-25/+38
| | | | | | | | | | The PruneEH pass tries to annotate functions as 'noreturn' if it doesn't see a ReturnInst. However, a naked function containing inline assembly can contain control flow leaving the function. This fixes PR23971. llvm-svn: 240876
* [MC] Ensure that pending labels are flushed when -mc-relax-all flag is usedPetr Hosek2015-06-271-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The current implementation doesn't always flush all pending labels beforeemitting data which can result in an incorrectly placed labels in case when when instruction bundling is enabled and -mc-relax-all flag is being used. To address this issue, we always flush pending labels before emitting data. The change was tested by running PNaCl toolchain trybots with -mc-relax-all flag set. Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063 Test Plan: Regression test attached Reviewers: mseaborn Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10325 llvm-svn: 240870
* [MC] Align fragments when -mc-relax-all flag is usedPetr Hosek2015-06-271-6/+12
| | | | | | | | | | | | | | | | | | | | | | | Summary: Ensure that fragments are bundle aligned when instruction bundling is enabled and the -mc-relax-all flag is set. This is implicitly assumed by the bundle padding implementation but this assumption does not hold when custom alignment is being used. The change was tested by running PNaCl toolchain trybots with -mc-relax-all flag set. Fixes https://code.google.com/p/nativeclient/issues/detail?id=4063 Test Plan: Regression test attached Reviewers: mseaborn Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D10044 llvm-svn: 240869
* IR: Expose ModuleSlotTracker in Value::print()Duncan P. N. Exon Smith2015-06-271-10/+29
| | | | | | | | | | | | | | | | | | | Allow callers of `Value::print()` and `Metadata::print()` to pass in a `ModuleSlotTracker`. This allows them to pay only once for calculating module-level slots (such as Metadata). This is related to PR23865, where there was a huge cost for `MachineFunction::print()`. Although I don't have a *particular* user in mind for this new code, I have hit big slowdowns before when running `opt -debug`, and I think this will be useful. Going forward, if someone hits a big slowdown with `print()` statements, they can create a `ModuleSlotTracker` and send it through. Similarly, adding support to `Value::dump()` and `Metadata::dump()` should be trivial. I added unit tests to be sure the `print()` functions actually behave the same way with and without the slot tracker. llvm-svn: 240867
* LowerBitSets: Ignore bitset entries that do not directly refer to a global.Peter Collingbourne2015-06-271-3/+7
| | | | | | | | | | | | | | | | | It is possible for a global to be substituted with another global of a different type or a different kind (i.e. an alias) at IR link time. One example of this scenario is when a Microsoft ABI vtable is substituted with an alias referring to a larger vtable containing an RTTI reference. This will cause the global to be RAUW'd with a possibly bitcasted reference to the other global. This will of course also affect any references to the global in bitset metadata. The right way to handle such metadata is simply to ignore it. This is sound because the linked module should contain another copy of the bitset entries as applied to the new global. llvm-svn: 240866
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