summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Access the TargetLoweringInfo from the TargetMachine object instead of ↵Bill Wendling2013-06-199-42/+52
| | | | | | caching it. The TLI may change between functions. No functionality change. llvm-svn: 184349
* Don't cache the TLI object since we have access to it through TargetMachine ↵Bill Wendling2013-06-191-6/+8
| | | | | | already. llvm-svn: 184346
* Allow creation of single-byte MCAtoms.Ahmed Bougacha2013-06-192-2/+2
| | | | llvm-svn: 184344
* Move StructurizeCFG out of R600 to generic Transforms.Matt Arsenault2013-06-195-70/+54
| | | | | | Register it with PassManager llvm-svn: 184343
* LSR: Fix the parameters used to compute the scaling factor cost.Quentin Colombet2013-06-191-5/+13
| | | | | | | | | | | | | Prior to this change, the considered addressing modes may be invalid since the maximum and minimum offsets were not taking into account. This was causing an assertion failure. The added test case exercices that behavior. <rdar://problem/14199725> Assertion failed: (CurScaleCost >= 0 && "Legal addressing mode has an illegal cost!") llvm-svn: 184341
* SLPVectorizer: handle scalars that are extracted from vectors (using ↵Nadav Rotem2013-06-191-0/+44
| | | | | | ExtractElementInst). llvm-svn: 184325
* SLPVectorizer: start constructing chains at stores that are not power of two.Nadav Rotem2013-06-191-3/+17
| | | | | | | | The type <3 x i8> is a common in graphics and we want to be able to vectorize it. This changes accelerates bullet by 12% and 471_omnetpp by 5%. llvm-svn: 184317
* Remove Path::getDirectoryContents.Rafael Espindola2013-06-192-78/+0
| | | | llvm-svn: 184311
* Remove Path::isObjectFile.Rafael Espindola2013-06-191-8/+0
| | | | llvm-svn: 184305
* Remove Path::canExecute.Rafael Espindola2013-06-192-19/+0
| | | | llvm-svn: 184298
* The RenderMethod field in RegisterOperand class sets the name of the method ↵Vladimir Medic2013-06-192-19/+10
| | | | | | on the target specific operand to call to add the target specific operand to an MCInst. This patch defines RenderMethod for mips RegisterOperand classes and removes redundant code from MipsAsmParser.cpp llvm-svn: 184292
* MachOUniversal.cpp: Fix abuse of Twine. It would be sufficient to use ↵NAKAMURA Takumi2013-06-191-3/+3
| | | | | | std::string instead. llvm-svn: 184291
* Fixed comment typo that causes the given comment to actually make sense.Michael Gottesman2013-06-191-1/+1
| | | | llvm-svn: 184286
* SLPVectorizer: vectorize compares and selects.Nadav Rotem2013-06-191-3/+75
| | | | llvm-svn: 184282
* Document the return value and fix a typo.Nadav Rotem2013-06-191-1/+2
| | | | llvm-svn: 184281
* [yaml2obj][ELF] Support ELFOSABI_* enum.Sean Silva2013-06-191-0/+28
| | | | llvm-svn: 184268
* [yaml2obj][ELF] Support st_info through `Binding` and `Type` YAML keys.Sean Silva2013-06-191-0/+25
| | | | llvm-svn: 184263
* Use GetUnderlyingObject instead of custom functionMatt Arsenault2013-06-181-58/+20
| | | | llvm-svn: 184261
* [yaml2obj][ELF] Rudimentary symbol table support.Sean Silva2013-06-181-0/+10
| | | | | | Currently, we only output the name. llvm-svn: 184255
* ARM: Add optional datatype suffix to NEON mvn asm syntax.Jim Grosbach2013-06-181-1/+6
| | | | | | rdar://14194152 llvm-svn: 184244
* We want a string representation of the attribute, not the kind as a string.Bill Wendling2013-06-181-2/+2
| | | | llvm-svn: 184239
* Remove Path::canWrite.Rafael Espindola2013-06-182-13/+0
| | | | llvm-svn: 184235
* Add a can_write function to PathV2.Rafael Espindola2013-06-182-0/+18
| | | | llvm-svn: 184233
* [ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean ↵Michael Gottesman2013-06-181-1/+11
| | | | | | implying that upper bits are always 0. llvm-svn: 184231
* Converted an overly aggressive assert to a conditional check in ↵Michael Gottesman2013-06-181-2/+5
| | | | | | | | | | | | | | | | | | AddCombineTo64bitMLAL. Said assert assumes that ADDC will always have a glue node as its second argument and is checked before we even know that we are actually performing the relevant MLAL optimization. This is incorrect since on ARM we *CAN* codegen ADDC with a use list based second argument. Thus to have both effects, I converted the assert to a conditional check which if it fails we do not perform the optimization. In terms of tests I can not produce an ADDC from the IR level until I get in my multiprecision optimization patch which is forthcoming. The tests for said patch would cause this assert to fail implying that said tests will provide the relevant tests. llvm-svn: 184230
* Remove unused Path::canRead.Rafael Espindola2013-06-182-12/+0
| | | | llvm-svn: 184229
* Fix 80 col violation.Nadav Rotem2013-06-181-3/+6
| | | | llvm-svn: 184228
* Change the arm assembler to support this from the v7c spec:Kevin Enderby2013-06-181-1/+11
| | | | | | | | | | | | | | | "When assembling to the ARM instruction set, the .N qualifier produces an assembler error and the .W qualifier has no effect." In the pre-matcher handler in the asm parser the ".w" (wide) qualifier when in ARM mode is now discarded. And an error message is now produced when the ".n" (narrow) qualifier is used in ARM mode. Test cases for these were added. rdar://14064574 llvm-svn: 184224
* During SelectionDAG building explicitly set a node to constant zero when theQuentin Colombet2013-06-181-0/+8
| | | | | | | | | | | | value is zero. This allows optmizations to kick in more easily. Fix some test cases so that they remain meaningful (i.e., not completely dead coded) when optimizations apply. <rdar://problem/14096009> superfluous multiply by high part of zero-extended value. llvm-svn: 184222
* Mips ELF: Mark object file as ABI compliant Jack Carter2013-06-182-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When producing objects that are abi compliant we are marking neither the object file nor the assembly file correctly and thus generate warnings. We need to set the EF_CPIC flag in the ELF header when generating direct object. Note that the warning is only generated when compiling without PIC. When compiling with clang the warning will be suppressed by supplying: -Wa,-mno-shared -Wa,-call_nonpic Also the following directive should also be added: .option pic0 when compiling without PIC, This eliminates the need for supplying: -mno-shared -call_nonpic on the assembler command line. Patch by Douglas Gilmore llvm-svn: 184220
* Remove uniqueID from PathV1.h.Rafael Espindola2013-06-182-8/+0
| | | | llvm-svn: 184219
* Add a GetUniqueID that will replace the uniqueID of PathV1.h.Rafael Espindola2013-06-182-0/+26
| | | | llvm-svn: 184217
* Reduce indentation.David Blaikie2013-06-181-53/+55
| | | | llvm-svn: 184213
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-181-0/+7
| | | | | | | | For decoding, keep the current behavior of always decoding these as their REP versions. In the future, this could be improved to recognize the cases where these behave as XACQUIRE and XRELEASE and decode them as such. llvm-svn: 184207
* Add a version of unique_file that return just the file name.Rafael Espindola2013-06-181-1/+12
| | | | llvm-svn: 184206
* Scan the successor blocks and use the PHI nodes as a hint for possible chain ↵Nadav Rotem2013-06-181-6/+40
| | | | | | roots. llvm-svn: 184201
* Add a return value to make this function more useful.Nadav Rotem2013-06-182-2/+4
| | | | llvm-svn: 184200
* Basic support for parsing Mach-O universal binaries in LLVMObject libraryAlexey Samsonov2013-06-188-4/+158
| | | | llvm-svn: 184191
* Don't convert object_error's enum to and from int.Rafael Espindola2013-06-181-4/+4
| | | | | | | This allows the compiler to see the enum and warn about it. While in here, fix a switch to not use a default and fix style violations. llvm-svn: 184186
* ARM: fix literal load with positive offset encodingAmaury de la Vieuville2013-06-183-5/+7
| | | | | | | | | | | | When using a positive offset, literal loads where encoded as if it was negative, because: - The sign bit was not assigned to an operand - The addrmode_imm12 operand was not encoding the sign bit correctly This patch also makes the assembler look at the .w/.n specifier for loads. llvm-svn: 184182
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-183-40/+61
| | | | llvm-svn: 184181
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-183-29/+238
| | | | | | | | This fixes two previous issues: - Negative offsets were not correctly disassembled - The decoded opcodes were not the right one llvm-svn: 184180
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-181-0/+37
| | | | llvm-svn: 184179
* Hopefully fix the MSVS build after r184105Timur Iskhodzhanov2013-06-181-0/+1
| | | | llvm-svn: 184178
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-1825-190/+186
| | | | | | | | | Someone may want to do something crazy, like replace these objects if they change or something. No functionality change intended. llvm-svn: 184175
* Fix nondeterminism in .gcno file generation.Nick Lewycky2013-06-181-9/+25
| | | | llvm-svn: 184174
* Remove dead prototype.Bill Wendling2013-06-181-2/+0
| | | | llvm-svn: 184173
* Simplify some of the code. No functionality change.Bill Wendling2013-06-181-7/+5
| | | | llvm-svn: 184172
* MI-Sched: handle ReadAdvance latencies as used by Swift.Andrew Trick2013-06-171-1/+4
| | | | llvm-svn: 184135
* Give RegMax higher priority.Andrew Trick2013-06-171-9/+9
| | | | llvm-svn: 184133
OpenPOWER on IntegriCloud