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* Remove unused variable. Extracted from the Andy/PaX patch.Rafael Espindola2012-08-211-2/+0
| | | | llvm-svn: 162282
* Fix typo. Extracted from the Andy/PaX patch.Rafael Espindola2012-08-211-1/+1
| | | | llvm-svn: 162281
* MCJIT: Tidy up the constructor.Jim Grosbach2012-08-213-13/+8
| | | | | | | | | The MCJIT doesn't need or want a TargetJITInfo. That's vestigal from the old JIT, so just remove it. rdar://12119347 llvm-svn: 162280
* Port the global copy optimization from the SROA pass to InstCombine.Chandler Carruth2012-08-212-179/+171
| | | | | | | | | | This optimization is really just replacing allocas wholesale with globals, there is no scalarization. The underlying motivation for this patch is to simplify the SROA pass and focus it on splitting and promoting allocas. llvm-svn: 162271
* Fix up indentation and remove a couple else's after returns.Craig Topper2012-08-211-11/+12
| | | | llvm-svn: 162270
* [asan] add code to detect global initialization fiasco in C/C++. The ↵Kostya Serebryany2012-08-211-63/+171
| | | | | | sub-pass is off by default for now. Patch by Reid Watson. Note: this patch changes the interface between LLVM and compiler-rt parts of asan. The corresponding patch to compiler-rt will follow. llvm-svn: 162268
* Use uint16_t for tables of opcodes.Craig Topper2012-08-211-2/+2
| | | | llvm-svn: 162267
* Fix up indentation. No functional change.Craig Topper2012-08-211-61/+61
| | | | llvm-svn: 162264
* Add a couple llvm_unreachables. Add a message to several others.Craig Topper2012-08-211-8/+6
| | | | llvm-svn: 162263
* Replace a break with llvm_unreachable in the default case of a nested ↵Craig Topper2012-08-211-50/+18
| | | | | | switch. Condense code a bit. No functional change. llvm-svn: 162261
* Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar ↵Craig Topper2012-08-211-44/+49
| | | | | | forms. llvm-svn: 162260
* Merge FMA3 instructions with and without patterns into single classes using ↵Craig Topper2012-08-211-38/+21
| | | | | | null_frag. llvm-svn: 162257
* revise debug output to avoid dangling pointerMichael Liao2012-08-211-1/+1
| | | | llvm-svn: 162256
* Add a missing def flag.Jakob Stoklund Olesen2012-08-211-4/+2
| | | | | | | | | | *** Bad machine code: Explicit definition marked as use *** - function: test_cos - basic block: BB#0 L.entry (0x7ff2a2024fd0) - instruction: VSETLNi32 %D11, %D11<undef>, %R0, 0, pred:14, pred:%noreg, %Q5<imp-use,kill>, %Q5<imp-def> - operand 0: %D11 llvm-svn: 162247
* Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen2012-08-202-9/+16
| | | | | | | | | | | | The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. This patch was originally committed as r161460, but reverted again because of assertion failures. Now that duplicate Machine CFG edges have been eliminated, this works properly. llvm-svn: 162233
* Don't add CFG edges for redundant conditional branches.Jakob Stoklund Olesen2012-08-202-3/+22
| | | | | | | | | | | | | IR that hasn't been through SimplifyCFG can look like this: br i1 %b, label %r, label %r Make sure we don't create duplicate Machine CFG edges in this case. Fix the machine code verifier to accept conditional branches with a single CFG edge. llvm-svn: 162230
* Add a verification pass after ExpandISelPseudos.Jakob Stoklund Olesen2012-08-201-1/+2
| | | | | | | This pass often has weird CFG hacks and hand-written MI building code that can go wrong in many ways. llvm-svn: 162224
* Add CFG checks to MachineVerifier.Jakob Stoklund Olesen2012-08-201-0/+40
| | | | | | | Verify that the predecessor and successor lists are consistent and free of duplicates. llvm-svn: 162223
* Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.Jakob Stoklund Olesen2012-08-201-3/+2
| | | | | | | The test case ARM/2011-05-04-MultipleLandingPadSuccs.ll was creating duplicate successor list entries. llvm-svn: 162222
* fix HexagonSubtarget parsing of -mv flagSebastian Pop2012-08-201-17/+16
| | | | llvm-svn: 162217
* fix a case where all operands of BUILD_VECTOR are undefinedMichael Liao2012-08-201-0/+4
| | | | llvm-svn: 162214
* Fix coding style violations in 162135 and 162136.Akira Hatanaka2012-08-204-49/+49
| | | | | | Patch by Petar Jovanovic. llvm-svn: 162213
* DataExtractor: Fix integer truncation issues in LEB128 extraction.Benjamin Kramer2012-08-201-3/+3
| | | | llvm-svn: 162201
* Fixed DAGCombiner bug (found and localized by James Malloy):Stepan Dyatkovskiy2012-08-201-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it consists purely of get_vector_elts from one or two source vectors. If so, it either makes a concat_vectors node or a shufflevector node. However, it doesn't check the element type width of the underlying vector, so if you have this sequence: Node0: v4i16 = ... Node1: i32 = extract_vector_elt Node0 Node2: i32 = extract_vector_elt Node0 Node3: v16i8 = BUILD_VECTOR Node1, Node2, ... It will attempt to: Node0: v4i16 = ... NewNode1: v16i8 = concat_vectors Node0, ... Where this is actually invalid because the element width is completely different. This causes an assertion failure on DAG legalization stage. Fix: If output item type of BUILD_VECTOR differs from input item type. Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to: Node0: v4i16 = ... NewNode1: v8i16 = concat_vectors Node0, ... NewNode2: v16i8 = bitcast NewNode1 llvm-svn: 162195
* Remove FMA3 intrinsic instructions in favor of patterns.Craig Topper2012-08-202-94/+146
| | | | llvm-svn: 162194
* Use correct intrinsic for 256-bit VFMSUBADDPS.Craig Topper2012-08-201-1/+1
| | | | llvm-svn: 162193
* Remove trailing white space and tab characters. No functional change.Craig Topper2012-08-191-33/+33
| | | | llvm-svn: 162192
* When unsafe math is used, we can use commutative FMAX and FMIN. In some casesNadav Rotem2012-08-194-3/+59
| | | | | | | | | | | | | | | | | | | this allows for better code generation. Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and FMINC, which are commutative. For example: movaps %xmm0, %xmm1 movsd LC(%rip), %xmm0 minsd %xmm1, %xmm0 becomes: minsd LC(%rip), %xmm0 llvm-svn: 162187
* Fabs folding is implemented.Benjamin Kramer2012-08-191-5/+0
| | | | llvm-svn: 162186
* InstCombine: Fix a crasher when encountering a function pointer.Benjamin Kramer2012-08-181-1/+1
| | | | llvm-svn: 162180
* Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen2012-08-183-174/+0
| | | | | | | These nodes are no longer needed because the peephole pass can fold CMOV+AND into ANDCC etc. llvm-svn: 162179
* Remove virtual from many methods. These methods replace methods in the base ↵Craig Topper2012-08-181-38/+40
| | | | | | class, but the base class methods aren't virtual so it just increased call overhead. llvm-svn: 162178
* Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen2012-08-181-47/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This turns common i1 patterns into predicated instructions: (add (zext cc), x) -> (select cc (add x, 1), x) (add (sext cc), x) -> (select cc (add x, -1), x) For a function like: unsigned f(unsigned s, int x) { return s + (x>0); } We now produce: cmp r1, #0 it gt addgt.w r0, r0, #1 Instead of: movs r2, #0 cmp r1, #0 it gt movgt r2, #1 add r0, r2 llvm-svn: 162177
* Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen2012-08-181-9/+42
| | | | | | | | | | | | | | | | Add these transformations to the existing add/sub ones: (and (select cc, -1, c), x) -> (select cc, x, (and, x, c)) (or (select cc, 0, c), x) -> (select cc, x, (or, x, c)) (xor (select cc, 0, c), x) -> (select cc, x, (xor, x, c)) The selects can then be transformed to a single predicated instruction by peephole. This transformation will make it possible to eliminate the ISD::CAND, COR, and CXOR custom DAG nodes. llvm-svn: 162176
* Remove overly conservative hasOneUse check, this always expands into a ↵Benjamin Kramer2012-08-181-1/+1
| | | | | | single IR instruction. llvm-svn: 162175
* InstCombine: Add a couple of fabs identities for comparing with 0.0.Benjamin Kramer2012-08-181-0/+39
| | | | llvm-svn: 162174
* SimplifyLibcalls: Add fabs and trunc to the list of libcalls that are safe ↵Benjamin Kramer2012-08-181-0/+4
| | | | | | to shrink from double to float. llvm-svn: 162173
* Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow ↵Nadav Rotem2012-08-181-15/+60
| | | | | | better compare/branch code. llvm-svn: 162172
* fp16-to-fp32 conversion instructions are available in Thumb mode as well.Anton Korobeynikov2012-08-181-4/+4
| | | | | | Make sure the generic pattern is used. llvm-svn: 162170
* Refactor code a bit to reduce number of calls in the final compiled code. No ↵Craig Topper2012-08-181-134/+144
| | | | | | functional change intended. llvm-svn: 162166
* Reorder initialization list to silence -WreorderCraig Topper2012-08-181-2/+2
| | | | llvm-svn: 162165
* Revert r162160 because it made a few buildbots fail.Nadav Rotem2012-08-181-43/+6
| | | | llvm-svn: 162164
* The X86 backend has a number of optimizations for SETCC nodes which useNadav Rotem2012-08-181-6/+43
| | | | | | | | | | | | | | | | | | | | | arithmetic instructions. However, when small data types are used, a truncate node appears between the SETCC node and the arithmetic operation. This patch adds support for this pattern. Before: xorl %esi, %edi testb %dil, %dil setne %al ret After: xorb %dil, %sil setne %al ret rdar://12081007 llvm-svn: 162160
* Make atomic load and store of pointers work. Tighten verification of atomic ↵Eli Friedman2012-08-172-2/+34
| | | | | | | | | operations so other unexpected operations don't slip through. Based on patch by Logan Chien. PR11786/PR13186. llvm-svn: 162146
* Fix undefined behavior (binding a reference to a dereferenced null pointer) ifRichard Smith2012-08-171-1/+1
| | | | | | SSAUpdater was created and destroyed without being initialized. llvm-svn: 162137
* Add MipsELFWriterInfo.{h,cpp}.Akira Hatanaka2012-08-172-0/+151
| | | | llvm-svn: 162136
* Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka2012-08-178-8/+134
| | | | | | | | | | No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. llvm-svn: 162135
* Implement stack protectors for structures with character arrays in them.Bill Wendling2012-08-171-15/+40
| | | | | | <rdar://problem/10545247> llvm-svn: 162131
* Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen2012-08-171-0/+3
| | | | | | | | | PEI can't handle the pseudo-instructions. This can be removed when the pseudo-instructions are replaced by normal predicated instructions. Fixes PR13628. llvm-svn: 162130
* Add stub methods for mips assembly matcher. Akira Hatanaka2012-08-178-6/+97
| | | | | | Patch by Vladimir Medic. llvm-svn: 162124
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