| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add instruction selection support for horizontal add/sub of 256-bit floating ↵ | Craig Topper | 2011-12-02 | 1 | -2/+4 |
| | | | | | | | point vectors. Also add the test case for 256-bit integer vectors. llvm-svn: 145680 | ||||
| * | remove unneeded FIXME comment | Hal Finkel | 2011-12-02 | 1 | -1/+0 |
| | | | | | llvm-svn: 145679 | ||||
| * | make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first ↵ | Hal Finkel | 2011-12-02 | 1 | -5/+5 |
| | | | | | | | instruction in Sequence is a Noop llvm-svn: 145677 | ||||
| * | update PPC 940 hazard rec. to function in postRA mode | Hal Finkel | 2011-12-02 | 6 | -142/+93 |
| | | | | | llvm-svn: 145676 | ||||
| * | Fix a few more places where TargetData/TargetLibraryInfo is not being passed. | Chad Rosier | 2011-12-02 | 11 | -37/+76 |
| | | | | | | | Add FIXMEs to places that are non-trivial to fix. llvm-svn: 145661 | ||||
| * | ARM start parsing VLD1 single lane instructions. | Jim Grosbach | 2011-12-02 | 2 | -14/+115 |
| | | | | | | | | The alias pseudos need cleaned up for size suffix handling, but this gets the basics working. Will be cleaning up and adding more. llvm-svn: 145655 | ||||
| * | Abuse of mass replace isn't warranted even when the build is failing. Thanks | Chad Rosier | 2011-12-01 | 1 | -25/+29 |
| | | | | | | | for the suggestion, Eric. llvm-svn: 145643 | ||||
| * | Fix build by not assuming TLI is guaranteed. Will have to track down cases where | Chad Rosier | 2011-12-01 | 1 | -24/+23 |
| | | | | | | | TLI isn't being passed to ensure we don't miss opportunities to fold calls. llvm-svn: 145641 | ||||
| * | Prevent library calls from being folded if -fno-builtin has been specified. | Chad Rosier | 2011-12-01 | 1 | -23/+24 |
| | | | | | | | rdar://10500969 llvm-svn: 145639 | ||||
| * | CodeGen: fix CMake build | Dylan Noblesmith | 2011-12-01 | 1 | -0/+1 |
| | | | | | | | Missing file from r145629. llvm-svn: 145634 | ||||
| * | ExecutionEngine: honor optimization level | Dylan Noblesmith | 2011-12-01 | 3 | -8/+9 |
| | | | | | | | | | | | It was getting ignored after r144788. Also fix an accidental implicit cast from the OptLevel enum to an optional bool argument. MSVC warned on this, but gcc didn't. llvm-svn: 145633 | ||||
| * | Last bit of TargetLibraryInfo propagation. Also fixed a case for TargetData | Chad Rosier | 2011-12-01 | 7 | -39/+78 |
| | | | | | | | | where it appeared beneficial to pass. More of rdar://10500969 llvm-svn: 145630 | ||||
| * | Add a deterministic finite automaton based packetizer for VLIW architectures | Anshuman Dasgupta | 2011-12-01 | 1 | -0/+98 |
| | | | | | llvm-svn: 145629 | ||||
| * | Fix unreachable return & simplify some branches. | David Blaikie | 2011-12-01 | 1 | -9/+5 |
| | | | | | llvm-svn: 145627 | ||||
| * | Dummy commit to check commit access. | Sanjoy Das | 2011-12-01 | 1 | -1/+1 |
| | | | | | llvm-svn: 145619 | ||||
| * | Improved fix for abs(val) != 0 to check other similar case. Also fixed ↵ | Pete Cooper | 2011-12-01 | 1 | -6/+10 |
| | | | | | | | style issues and confusing comment llvm-svn: 145618 | ||||
| * | [asan] two minor fixes: use UnreachableInst after the neverreturn function ↵ | Kostya Serebryany | 2011-12-01 | 1 | -2/+3 |
| | | | | | | | call; use report_fatal_error when blacklist file can not be found llvm-svn: 145611 | ||||
| * | Add missing functions. | Chad Rosier | 2011-12-01 | 1 | -1/+4 |
| | | | | | llvm-svn: 145608 | ||||
| * | Autodetect bulldozers. | Benjamin Kramer | 2011-12-01 | 1 | -0/+2 |
| | | | | | llvm-svn: 145607 | ||||
| * | Add a few more functions to TargetLibraryInfo. More of rdar://10500969. | Chad Rosier | 2011-12-01 | 1 | -1/+16 |
| | | | | | llvm-svn: 145596 | ||||
| * | For 64-bit the rest of the general regs are ok for the q constraint. Make | Eric Christopher | 2011-12-01 | 1 | -1/+17 |
| | | | | | | | | | sure we can emit both the high and low versions of those registers. Fixes rdar://10392864 llvm-svn: 145579 | ||||
| * | Add some missing anchors. | David Blaikie | 2011-12-01 | 3 | -0/+7 |
| | | | | | llvm-svn: 145578 | ||||
| * | Pass AVX vectors which are arguments to varargs functions on the stack. ↵ | Eli Friedman | 2011-12-01 | 1 | -4/+9 |
| | | | | | | | <rdar://problem/10463281>. llvm-svn: 145573 | ||||
| * | Added instcombine pattern to spot comparing -val or val against 0. | Pete Cooper | 2011-12-01 | 1 | -0/+14 |
| | | | | | | | | | (val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0" Fixes <rdar://problem/10482509> llvm-svn: 145563 | ||||
| * | Propagate TargetLibraryInfo throughout ConstantFolding.cpp and | Chad Rosier | 2011-12-01 | 13 | -259/+394 |
| | | | | | | | | InstructionSimplify.cpp. Other fixups as needed. Part of rdar://10500969 llvm-svn: 145559 | ||||
| * | Make use of "getScalarType()". No functionality change. | Nick Lewycky | 2011-12-01 | 1 | -8/+3 |
| | | | | | llvm-svn: 145556 | ||||
| * | Small fix for assembler generation on Darwin PPC64. Patch by Michael ↵ | Eli Friedman | 2011-12-01 | 1 | -1/+1 |
| | | | | | | | Kostylev. PR11437. llvm-svn: 145553 | ||||
| * | make asan work at -O0, llvm part. Patch by glider@google.com | Kostya Serebryany | 2011-11-30 | 1 | -1/+1 |
| | | | | | llvm-svn: 145530 | ||||
| * | Support for encoding all FMA4 instructions and tablegen patterns for all | Jan Sjödin | 2011-11-30 | 1 | -0/+349 |
| | | | | | | | remaining FMA4 instructions and intrinsics with tests. llvm-svn: 145525 | ||||
| * | Make GlobalMerge honor the preferred alignment on globals without an ↵ | Eli Friedman | 2011-11-30 | 1 | -1/+1 |
| | | | | | | | | | explicitly specified alignment. <rdar://problem/10497732>. llvm-svn: 145523 | ||||
| * | Remove unused variable | Matt Beaumont-Gay | 2011-11-30 | 1 | -2/+0 |
| | | | | | llvm-svn: 145517 | ||||
| * | ARM parsing for VLD1 all lanes, with writeback. | Jim Grosbach | 2011-11-30 | 4 | -43/+82 |
| | | | | | llvm-svn: 145510 | ||||
| * | Add a few functions to TargetLibraryInfo. | Chad Rosier | 2011-11-30 | 1 | -2/+50 |
| | | | | | llvm-svn: 145508 | ||||
| * | ARM parsing for VLD1 two register all lanes, no writeback. | Jim Grosbach | 2011-11-30 | 5 | -5/+30 |
| | | | | | llvm-svn: 145504 | ||||
| * | X86: Turns out bulldozer also supports sse42 and lzcnt. | Benjamin Kramer | 2011-11-30 | 1 | -11/+6 |
| | | | | | | | | While at it remove the barcelona/instanbul/shanghai subtargets, they're unsupported by GCC and look pretty broken. llvm-svn: 145494 | ||||
| * | X86: Add subtargets for AMD's bulldozer. | Benjamin Kramer | 2011-11-30 | 1 | -0/+6 |
| | | | | | llvm-svn: 145493 | ||||
| * | X86: PerformOrCombine introduced a vselect node with a wrong order of ↵ | Nadav Rotem | 2011-11-30 | 1 | -1/+1 |
| | | | | | | | operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479). llvm-svn: 145488 | ||||
| * | Add instruction selection support for AVX2 horizontal add/sub instructions. | Craig Topper | 2011-11-30 | 1 | -24/+49 |
| | | | | | llvm-svn: 145487 | ||||
| * | Merge VPERM2F128/VPERM2I128 ISD node types. | Craig Topper | 2011-11-30 | 4 | -71/+50 |
| | | | | | llvm-svn: 145485 | ||||
| * | Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node ↵ | Craig Topper | 2011-11-30 | 7 | -142/+135 |
| | | | | | | | type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128. llvm-svn: 145483 | ||||
| * | LSR: handle the expansion of phi operands that use postinc forms of the IV. | Andrew Trick | 2011-11-30 | 1 | -36/+68 |
| | | | | | | | Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed. llvm-svn: 145482 | ||||
| * | Whitespace. | Chad Rosier | 2011-11-30 | 1 | -3/+1 |
| | | | | | llvm-svn: 145470 | ||||
| * | Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional | Chad Rosier | 2011-11-30 | 1 | -6/+6 |
| | | | | | | | change intended. llvm-svn: 145468 | ||||
| * | ARM parsing aliases for VLD1 single register all lanes. | Jim Grosbach | 2011-11-30 | 5 | -6/+141 |
| | | | | | llvm-svn: 145464 | ||||
| * | Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable | Chad Rosier | 2011-11-29 | 3 | -3/+9 |
| | | | | | | | | | (fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is specified. rdar://10466410 llvm-svn: 145460 | ||||
| * | Tidy up a bit. | Jim Grosbach | 2011-11-29 | 2 | -33/+10 |
| | | | | | llvm-svn: 145458 | ||||
| * | Add comment. | Jim Grosbach | 2011-11-29 | 1 | -0/+1 |
| | | | | | llvm-svn: 145456 | ||||
| * | ARM parsing aliases for data-size suffices on VST1. | Jim Grosbach | 2011-11-29 | 1 | -19/+56 |
| | | | | | llvm-svn: 145454 | ||||
| * | Change names for MIPS "generic" processors defined in Mips.td to match what GNU | Akira Hatanaka | 2011-11-29 | 2 | -4/+4 |
| | | | | | | | | | | | tools use. Patch by Simon Atanasyan. "mips32r1" => "mips32" "4ke" => mips32r2" "mips64r1" => "mips64" llvm-svn: 145451 | ||||
| * | ARM assembly parsing and encoding for four-register VST1. | Jim Grosbach | 2011-11-29 | 4 | -52/+47 |
| | | | | | llvm-svn: 145450 | ||||

