| Commit message (Collapse) | Author | Age | Files | Lines |
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with the real FLT_ROUNDS (defined in <float.h>).
llvm-svn: 46587
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llvm-svn: 46586
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in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
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val# with previous liverange's.
llvm-svn: 46579
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dbg_func_start label. Make sure nothing else is inserted before them.
Note this solution might be somewhat fragile since ISD::LABEL may be used for other
purposes. If that ends up to be an issue, we may need to introduce a different node
for debug labels.
llvm-svn: 46571
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llvm-svn: 46569
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label (i.e. first label in the entry block) take care to insert it at the beginning of the block.
llvm-svn: 46568
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legitimate way of representing global variable GV in debug info.
llvm-svn: 46565
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proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.
llvm-svn: 46562
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memory reference information in the backend. Most of this was written by
Florian Brander, cleanup and updating to TOT by me.
llvm-svn: 46556
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list just to see if whether the list is empty.
llvm-svn: 46555
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llvm-svn: 46554
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llvm-svn: 46553
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inserting prologue code.
llvm-svn: 46546
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llvm-svn: 46545
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- Expand tabs... (poss 80-col violations, will get them later...)
- Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single
function, simplifying maintenance. Also reduced custom instruction
generation for SPUvecinsert/INSERT_MASK.
llvm-svn: 46544
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to reflect this increased aggressiveness.
llvm-svn: 46542
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dereferencing the end
of one of its internal maps.
llvm-svn: 46541
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In practice this can only happen on code with already undefined behavior,
but this is still a good thing to handle correctly.
llvm-svn: 46539
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and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
llvm-svn: 46538
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StructRet but really should be return in registers, e.g. _Complex long double, some 128-bit aggregates. This is a short term solution that is necessary only because llvm, for now, cannot model i128 nor call's with multiple results.
Status: This only works for direct calls, and only the caller side is done. Disabled for now.
llvm-svn: 46527
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type that matters but the operand type. This fixes
2008-01-08-IllegalCMP.ll which crashed with the new
legalize infrastructure because SETCC with result
type i8 and operand type i64 was being custom expanded
by the X86 backend. With this fix, the gcc build gets
as far as the first libcall.
llvm-svn: 46525
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llvm-svn: 46523
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llvm-svn: 46514
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llvm-svn: 46513
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llvm-svn: 46510
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compiler warnings.
llvm-svn: 46509
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llvm-svn: 46508
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llvm-svn: 46506
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careful to
avoid turning -0.0 + 0.0 -> -0.0 which is incorrect.
llvm-svn: 46499
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to get the alignment of global variables, rather than
using hand-made versions.
llvm-svn: 46495
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errors I noticed in
the handling of eliminating stores to byval arguments.
llvm-svn: 46494
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llvm-svn: 46488
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llvm-svn: 46486
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llvm-svn: 46485
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These loops are not yet handled.
Fix PR 1912.
llvm-svn: 46484
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only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.
Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.
llvm-svn: 46483
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llvm-svn: 46458
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llvm-svn: 46455
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the function label isn't associated with something it shouldn't be.
llvm-svn: 46449
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llvm-svn: 46433
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llvm-svn: 46431
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llvm-svn: 46429
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way or the other. Rewriting the code itself prevents subsequent analysis
passes from making contradictory conclusions about the code that could
cause an infeasible path to be made feasible.
llvm-svn: 46427
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llvm-svn: 46424
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llvm-svn: 46422
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llvm-svn: 46420
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llvm-svn: 46417
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longer allowed to write through byval arguments.
llvm-svn: 46416
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registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
llvm-svn: 46414
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