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* AMDGPU/GlobalISel: Address post-commit review comments for r332379Tom Stellard2018-05-211-1/+1
| | | | | | MCRegisterInfo::getPhysRegSize() will be deprecated. llvm-svn: 332856
* [InstCombine] Fix PR37526: MinMax patterns produce an infinite loop.Alexey Bataev2018-05-211-3/+8
| | | | | | | | | | | | | | | | | Summary: This patch fixes PR37526 by simplifying the newly generated LoadInst instructions. If the pointer address is a bitcast from the pointer to the NewType, we can just remove this extra bitcast instead of creating the new one. This fixes the PR37526 + may speed up the whole compilation process. Reviewers: spatel, RKSimon, hfinkel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47144 llvm-svn: 332855
* [X86][BtVer2] Add a 'J' prefix to the PRF/RCU defs. NFCAndrea Di Biagio2018-05-211-3/+3
| | | | | | | This is to keep the Jaguar model's naming convention. Processor resources all have a 'J' prefix in the BtVer2 scheduling model. llvm-svn: 332851
* [LLVM-C] Add DIBuilder Bindings For ObjC ClassesRobert Widmann2018-05-211-0/+38
| | | | | | | | | | | | | | Summary: Add LLVMDIBuilderCreateObjCIVar, LLVMDIBuilderCreateObjCProperty, and LLVMDIBuilderCreateInheritance to allow declaring metadata for Objective-C class hierarchies and their associated properties and instance variables. Reviewers: whitequark, deadalnix Reviewed By: whitequark Subscribers: harlanhaskins, llvm-commits Differential Revision: https://reviews.llvm.org/D47123 llvm-svn: 332850
* [X86] - Avoid SFB pass - fix bug in updating the offsets for newly created ↵Lama Saba2018-05-211-2/+2
| | | | | | | copies Change-Id: I169ab6fe7e187727c0298c2a1e2868a683f3e688 llvm-svn: 332849
* [DWARF] Refactor callback usage for .debug_line error handlingJames Henderson2018-05-212-24/+26
| | | | | | | | | | | Change the "recoverable" error callback to take an Error instaed of a string. Reviewed by: JDevlieghere Differential Revision: https://reviews.llvm.org/D46831 llvm-svn: 332845
* [X86][SSE] Add an assert to ensure that rotation amount is converted to a scaleSimon Pilgrim2018-05-211-0/+1
| | | | | | Missed in rL332832 where we added SSE v4i32 rotations for PR37426. llvm-svn: 332844
* ARM: be conservative when asked load/store alignment of weird type.Tim Northover2018-05-211-0/+4
| | | | | | | Chances are we'll be asked again after type legalization, but before that point it's better to claim misaligned accesses aren't allowed than to assert. llvm-svn: 332840
* revert r332610, it breaks cfi, see D46326Nico Weber2018-05-212-82/+40
| | | | llvm-svn: 332838
* [mips] Revert Merge MipsLongBranch and MipsHazardSchedule passesAleksandar Beserminji2018-05-215-332/+327
| | | | | | | | Revert this patch due buildbot failure. Differential Revision: https://reviews.llvm.org/D46641 llvm-svn: 332837
* [CVP] Require DomTree for new Pass ManagerDavid Green2018-05-211-9/+13
| | | | | | | | | We were previously using a DT in CVP through SimplifyQuery, but not requiring it in the new pass manager. Hence it would crash if DT was not already available. This now gets DT directly and plumbs it through to where it is used (instead of using it through SQ). llvm-svn: 332836
* Fix up a few grammar issues.Eric Christopher2018-05-212-2/+2
| | | | llvm-svn: 332835
* [mips] Merge MipsLongBranch and MipsHazardSchedule passesAleksandar Beserminji2018-05-215-327/+332
| | | | | | | | | | | | | | MipsLongBranchPass and MipsHazardSchedule passes are joined to one pass because of mutual conflict. When MipsHazardSchedule inserts 'nop's, it potentially breaks some jumps, so they have to be expanded to long branches. When some branch is expanded to long branch, it potentially creates a hazard situation, which should be fixed by adding nops. New pass is called MipsBranchExpansion, it combines these two passes, and runs them alternately until one of them reports no changes were made. Differential Revision: https://reviews.llvm.org/D46641 llvm-svn: 332834
* [X86][SSE] Support v4i32 rotations (PR37426)Simon Pilgrim2018-05-211-50/+119
| | | | | | | | | | As suggested by Fabian on PR37426, we can use PMULUDQ to perform v4i32 vector rotations as the upper 32bits of the multiply will contain the 'wrapped' bits of the rotation. v8i16/v16i8 rotations would be straightforward to add to lowerRotate in the future - ideally we'd mostly share code with the vector shifts lowering. Differential Revision: https://reviews.llvm.org/D46954 llvm-svn: 332832
* [LLVM-C] Improve Bindings For AliasesRobert Widmann2018-05-201-0/+45
| | | | | | | | | | | | | | Summary: Add wrappers for a module's alias iterators and a getter and setter for the aliasee value. Reviewers: whitequark, deadalnix Reviewed By: whitequark Subscribers: llvm-commits, harlanhaskins Differential Revision: https://reviews.llvm.org/D46808 llvm-svn: 332826
* [X86] Remove mask arguments from permvar builtins/intrinsics. Use a select ↵Craig Topper2018-05-204-67/+65
| | | | | | | | in IR instead. Someday maybe we'll use selects for all intrinsics. llvm-svn: 332824
* Revert 332750, llvm part (see comment on D46910).Nico Weber2018-05-202-2/+2
| | | | llvm-svn: 332823
* [mips] Add microMIPSR6 ll/sc instructions.Simon Dardis2018-05-206-15/+64
| | | | | | | | | | Previously the compiler was using the microMIPSR3 variants, incorrectly. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D46948 llvm-svn: 332820
* [InstCombine] choose 1 form of abs and nabs as canonicalSanjay Patel2018-05-201-0/+51
| | | | | | | | | | | | | | | We already do this for min/max (see the blob above the diff), so we should do the same for abs/nabs. A sign-bit check (<s 0) is used as a predicate for other IR transforms and it's likely the best for codegen. This might solve the motivating cases for D47037 and D47041, but I think those patches still make sense. We can't guarantee this canonicalization if the icmp has more than one use. Differential Revision: https://reviews.llvm.org/D47076 llvm-svn: 332819
* [GlobalMerge] Exit early if only one global is to be mergedHaicheng Wu2018-05-191-1/+9
| | | | | | | | To save some compilation time and prevent some unnecessary changes. Differential Revision: https://reviews.llvm.org/D46640 llvm-svn: 332813
* Re-revert "[Option] Fix PR37006 prefix choice in findNearest"Brian Gesiak2018-05-191-24/+24
| | | | | | | | Summary: Reverting due to a test failure in an llvm-mt test on some buildbots, namely http://green.lab.llvm.org/green/job/clang-stage2-configure-Rlto/26020/. llvm-svn: 332812
* [LLVM-C] Use Length-Providing Value Name Getters and SettersRobert Widmann2018-05-191-0/+10
| | | | | | | | | | | | | | | | Summary: - Provide LLVMGetValueName2 and LLVMSetValueName2 that return and take the length of the provided C string respectively - Deprecate LLVMGetValueName and LLVMSetValueName Reviewers: whitequark, deadalnix Reviewed By: whitequark Subscribers: llvm-commits, harlanhaskins Differential Revision: https://reviews.llvm.org/D46890 llvm-svn: 332810
* [IRCE] Fix miscompile with range checks against negative valuesMax Kazantsev2018-05-191-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the patch rL329547, we have lifted the over-restrictive limitation on collected range checks, allowing to work with range checks with the end of their range not being provably non-negative. However it appeared that the non-negativity of this value was assumed in the utility function `ClampedSubtract`. In particular, its reasoning is based on the fact that `0 <= SINT_MAX - X`, which is not true if `X` is negative. The function `ClampedSubtract` is only called twice, once with `X = 0` (which is OK) and the second time with `X = IRC.getEnd()`, where we may now see the problem if the end is actually a negative value. In this case, we may sometimes miscompile. This patch is the conservative fix of the miscompile problem. Rather than rejecting non-provably non-negative `getEnd()` values, we will check it for non-negativity in runtime. For this, we use function `smax(smin(X, 0), -1) + 1` that is equal to `1` if `X` is non-negative and is equal to 0 if `X` is negative. If we multiply `Begin, End` of safe iteration space by this function calculated for `X = IRC.getEnd()`, we will get the original `[Begin, End)` if `IRC.getEnd()` was non-negative (and, thus, `ClampedSubtract` worked correctly) and the empty range `[0, 0)` in case if ` IRC.getEnd()` was negative. So we in fact prohibit execution of the main loop if at least one of range checks was made against a negative value (and we figured it out in runtime). It is still better than what we have before (non-negativity had to be proved in compile time) and prevents us from miscompile, however it is sometiles too restrictive for unsigned range checks against a negative value (which in fact can be eliminated). Once we re-implement `ClampedSubtract` in a way that it handles negative `X` correctly, this limitation can be lifted, too. Differential Revision: https://reviews.llvm.org/D46860 Reviewed By: samparker llvm-svn: 332809
* [MergeICmps] Don't crash when memcmp is not availableBenjamin Kramer2018-05-191-0/+4
| | | | | | Fixes clang crashing with -fno-builtin, PR37527. llvm-svn: 332808
* Fix MSVC unused variable warning. NFCI.Simon Pilgrim2018-05-191-5/+4
| | | | | | AMDGPURegisterInfo::getSubRegFromChannel is a static method - we don't need to get the AMDGPURegisterInfo instance. llvm-svn: 332807
* Un-revert "[Option] Fix PR37006 prefix choice in findNearest"Brian Gesiak2018-05-191-24/+24
| | | | | | | | | | | | | Summary: In https://reviews.llvm.org/rL332804 I loosed the assertion in the Clang driver test that forced me to revert https://reviews.llvm.org/rL332299. Once this lands I should be able to narrow down what caused PS4 buildbots to fail, and reinstate the check in that test. Test Plan: check-llvm & check-clang llvm-svn: 332805
* Fix evaluator for non-zero alloca addr spaceYaxun Liu2018-05-191-1/+2
| | | | | | | | | | | | | | The evaluator goes through BB and creates global vars as temporary values to evaluate results of LLVM instructions. It creates undef for alloca, however it assumes alloca in addr space 0. If the next instruction is addrspace cast to 0, then we get an invalid cast instruction. This patch let the temp global var have an address space matching alloca addr space, so that the valuation can be done. Differential Revision: https://reviews.llvm.org/D47081 llvm-svn: 332794
* Propagate nonnull and dereferenceable throught launderPiotr Padlewski2018-05-182-3/+9
| | | | | | | | | | | | | | | Summary: invariant.group.launder should not stop propagation of nonnull and dereferenceable, because e.g. we would not be able to hoist loads speculatively. Reviewers: rsmith, amharc, kuhar, xbolva00, hfinkel Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D46972 llvm-svn: 332788
* Dissallow non-empty metadata for invariant.groupPiotr Padlewski2018-05-181-3/+3
| | | | | | | | | | | | | | | Summary: This feature is not needed, but it might be usefull in the future to use metadata to mark what which function should support it (and strip it when not). Reviewers: rsmith, sanjoy, amharc, kuhar Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D45419 llvm-svn: 332787
* Constant fold launder of null and undefPiotr Padlewski2018-05-182-3/+15
| | | | | | | | | | | | | | | Summary: This might be useful because clang will add some barriers for pointer comparisons. Reviewers: majnemer, dberlin, hfinkel, nlewycky, davide, rsmith, amharc, kuhar Subscribers: davide, amharc, llvm-commits Differential Revision: https://reviews.llvm.org/D32423 llvm-svn: 332786
* [MemDep] Fixed handling of invariant.groupPiotr Padlewski2018-05-181-5/+26
| | | | | | | | | | | | | | | | | | Summary: Memdep had funny bug related to invariant.groups - because it did not invalidated cache, in some very rare cases it was possible to show memory dependence of the instruction that was deleted, but because other instruction took it's place it resulted in call to vtable! Thanks @amharc for repro!. Reviewers: dberlin, kuhar, amharc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45320 Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com> llvm-svn: 332781
* DAG: Fix crash on shift with large shift amountsMatt Arsenault2018-05-181-2/+2
| | | | | | Fixes bug 37521. llvm-svn: 332774
* Fixing buildbot error introduced with r332759.Wolfgang Pieb2018-05-181-1/+1
| | | | llvm-svn: 332772
* AMDGPU: Add pass to optimize reqd_work_group_sizeMatt Arsenault2018-05-184-0/+280
| | | | | | | | | | | Eliminate loads from the dispatch packet when they will have a known value. Also pattern match the code used by the library to handle partial workgroup dispatches, which isn't necessary if reqd_work_group_size is used. llvm-svn: 332771
* [InstCombine] Qualify a select pattern based transform to restrct to only ↵Craig Topper2018-05-181-1/+1
| | | | | | min/max and ignore abs/nabs. llvm-svn: 332770
* [WebAssembly] Object: Add more error checking for object file readingSam Clegg2018-05-181-3/+9
| | | | | | | | | | This should address some the assert failures the fuzzer has been finding such as: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=6719 Differential Revision: https://reviews.llvm.org/D47046 llvm-svn: 332769
* Addressing a couple of compiler warnings introduced with r332759.Wolfgang Pieb2018-05-181-2/+2
| | | | llvm-svn: 332766
* Fixing build error introduced with r332759.Wolfgang Pieb2018-05-181-1/+1
| | | | llvm-svn: 332762
* [msan] Don't check divisor shadow in fdiv.Evgeniy Stepanov2018-05-181-7/+10
| | | | | | | | | | | | | | | | Summary: Floating point division by zero or even undef does not have undefined behavior and may occur due to optimizations. Fixes https://bugs.llvm.org/show_bug.cgi?id=37523. Reviewers: kcc Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D47085 llvm-svn: 332761
* [DWARF v5] Improved support for .debug_rnglists (consumer). Enables any ↵Wolfgang Pieb2018-05-185-30/+214
| | | | | | | | | | | | consumer to extract DWARF v5 encoded rangelists. Reviewer: JDevlieghere Differential Revision: https://reviews.llvm.org/D45549 llvm-svn: 332759
* [NFC] Change cast from r332739 to a static castJessica Paquette2018-05-181-1/+2
| | | | | | | | | The casts in the delta computation for size remarks should have been static casts. This fixes that. Thanks to Dávid Bolvanský for pointing that out. llvm-svn: 332758
* Support: Simplify endian stream interface. NFCI.Peter Collingbourne2018-05-1813-78/+50
| | | | | | | | | | | | Provide some free functions to reduce verbosity of endian-writing a single value, and replace the endianness template parameter with a field. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47032 llvm-svn: 332757
* AMDGPU/NFC: Set symbol's type that is coming from an argument inKonstantin Zhuravlyov2018-05-181-1/+1
| | | | | | EmitAMDGPUSymbolType, instead of hard-coding it to STT_AMDGPU_HSA_KERNEL. llvm-svn: 332753
* [Support] Avoid normalization in sys::getDefaultTargetTriplePetr Hosek2018-05-182-2/+2
| | | | | | | | | | | | | | | | | | | | | | The return value of sys::getDefaultTargetTriple, which is derived from -DLLVM_DEFAULT_TRIPLE, is used to construct tool names, default target, and in the future also to control the search path directly; as such it should be used textually, without interpretation by LLVM. Normalization of this value may lead to unexpected results, for example if we configure LLVM with -DLLVM_DEFAULT_TARGET_TRIPLE=x86_64-linux-gnu, normalization will transform that value to x86_64--linux-gnu. Driver will use that value to search for tools prefixed with x86_64--linux-gnu- which may be confusing. This is also inconsistent with the behavior of the --target flag which is taken as-is without any normalization and overrides the value of LLVM_DEFAULT_TARGET_TRIPLE. Users of sys::getDefaultTargetTriple already perform their own normalization as needed, so this change shouldn't impact existing logic. Differential Revision: https://reviews.llvm.org/D46910 llvm-svn: 332750
* MC: Change the streamer ctors to take an object writer instead of a stream. ↵Peter Collingbourne2018-05-1833-114/+153
| | | | | | | | | | | | | | NFCI. The idea is that a client that wants split dwarf would create a specific kind of object writer that creates two files, and use it to create the streamer. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47050 llvm-svn: 332749
* [Hexagon] Generate post-increment for floating point typesBrendon Cahoon2018-05-183-4/+11
| | | | | | | | | | The code that generates post-increments for Hexagon considered integer values only. This patch adds support to generate them for floating point values, f32 and f64. Differential Revision: https://reviews.llvm.org/D47036 llvm-svn: 332748
* Reverted r332654 as it has broken some buildbots and left unfixed for a long ↵Galina Kistanova2018-05-189-838/+42
| | | | | | | | | | | time. The introduced problem is: llvm.src/lib/Transforms/Vectorize/VPlanVerifier.cpp:29:13: error: unused function 'hasDuplicates' [-Werror,-Wunused-function] static bool hasDuplicates(const SmallVectorImpl<VPBlockBase *> &VPBlockVec) { ^ llvm-svn: 332747
* [X86] Add GPR<->XMM Schedule TagsSimon Pilgrim2018-05-1813-168/+68
| | | | | | | | | | BtVer2 - fix NumMicroOp and account for the Lat+6cy GPR->XMM and Lat+1cy XMm->GPR delays (see rL332737) The high number of MOVD/MOVQ equivalent instructions meant that there were a number of missed patterns in SNB/Znver1: SNB - add missing GPR<->MMX costs (taken from Agner / Intel AOM) Znver1 - add missing GPR<->XMM MOVQ costs (taken from Agner) llvm-svn: 332745
* [X86] Directly legalize v16i16/v8i16 vselect to vXi8 vselect to use VPBLENDVBCraig Topper2018-05-181-4/+9
| | | | | | | | | | | | | | The intrinsic legalization for masked truncate uses ISD::TRUNCATE which can be constant folded by getNode. This prevents getVectorMaskingNode from seeing the ISD::TRUNCATE special case where it should emit X86ISD::SELECT instead of ISD::VSELECT. This causes a vselect with a v16i1 or v8i1 condition to be emitted during vector legalization. but vector legalization doesn't revisit nodes it creates. DAG combine will then promote this condition to match the result type. Then op legalization will try to legalize it, but the custom lowering hook returned SDValue(). But op legalization doesn't have an Expand for VSELECT because it expects vector legalization to have taken care of it. So the operation sticks around and fails in isel. This patch adds a custom legalization hook to morph it to a vXi8 vselect instead. This also simplifies the normal vXi16 vselect handling because vector legalization was normally expanding to AND/ANDN/OR and DAG combine was turning that into VBLENDVB. So we can skip a step by doing it directly. Fixes PR37499 Differential Revision: https://reviews.llvm.org/D47025 llvm-svn: 332743
* Revert changes from D46265.Than McIntosh2018-05-181-5/+2
| | | | | | | | | | | | This is a revert of the changes from https://reviews.llvm.org/D46265; the new test introduced (test/CodeGen/X86/PR37310.mir) causes buildbot failures. Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47061 llvm-svn: 332742
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