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* [SystemZ] Add a structure to represent a selected comparisonRichard Sandiford2013-12-131-175/+180
| | | | | | | | | | | ...in an attempt to rein back the increasingly complex selection code. A knock-on effect is that ICmpType is exposed from the outset, which slightly simplifies adjustSubwordCmp. The code is no piece of art even after this change, but at least it should be slightly better. No behavioral change intended. llvm-svn: 197235
* [SystemZ] Make more use of LTGFRRichard Sandiford2013-12-131-0/+31
| | | | | | | | | | | | InstCombine turns (sext (trunc)) into (ashr (shl)), then converts any comparison of the ashr against zero into a comparison of the shl against zero. This makes sense in itself, but we want to undo it for z, since the sign- extension instruction has a CC-setting form. I've included tests for both the original and InstCombined variants, but the former already worked. The patch fixes the latter. llvm-svn: 197234
* X86: When lowering shl_parts, don't emit shift amounts larger than the bit ↵Benjamin Kramer2013-12-131-2/+10
| | | | | | | | | | | | | width. While it's safe for the X86-specific shift nodes, dag combining will kill generic nodes. Insert an AND to make it safe, isel will nuke it as x86's shift instructions have an implicit AND. Fixes PR16108, which contains a contraption to hit this case in between constant folders. llvm-svn: 197228
* Enabling thumb2 mode used to force support for armv6t2. Replace thisJoerg Sonnenberger2013-12-131-4/+3
| | | | | | with a temporary assertion and adjust the various test cases. llvm-svn: 197224
* [mips] Add checks for alignment and maximum displacements for most of theMatheus Almeida2013-12-132-5/+75
| | | | | | | | | | | branch instructions for mips and micromips instruction sets thus avoiding the situation of generating branches to undesired locations if offsets cannot be encoded. This patch also checks if a fixup cannot be applied and returns a fatal error if that's the case. llvm-svn: 197223
* [inliner] Fix PR18206 by preventing inlining functions that call setjmpChandler Carruth2013-12-131-1/+1
| | | | | | | | | | | | | through an invoke instruction. The original patch for this was written by Mark Seaborn, but I've reworked his test case into the existing returns_twice test case and implemented the fix by the prior refactoring to actually run the cost analysis over invoke instructions, and then here fixing our detection of the returns_twice attribute to work for both calls and invokes. We never noticed because we never saw an invoke. =[ llvm-svn: 197216
* [inliner] Completely change (and fix) how the inline cost analysisChandler Carruth2013-12-131-37/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | handles terminator instructions. The inline cost analysis inheritted some pretty rough handling of terminator insts from the original cost analysis, and then made it much, much worse by factoring all of the important analyses into a separate instruction visitor. That instruction visitor never visited the terminator. This works fine for things like conditional branches, but for many other things we simply computed The Wrong Value. First example are unconditional branches, which should be free but were counted as full cost. This is most significant for conditional branches where the condition simplifies and folds during inlining. We paid a 1 instruction tax on every branch in a straight line specialized path. =[ Oh, we also claimed that the unreachable instruction had cost. But it gets worse. Let's consider invoke. We never applied the call penalty. We never accounted for the cost of the arguments. Nope. Worse still, we didn't handle the *correctness* constraints of not inlining recursive invokes, or exception throwing returns_twice functions. Oops. See PR18206. Sadly, PR18206 requires yet another fix, but this refactoring is at least a huge step in that direction. llvm-svn: 197215
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-136-65/+18
| | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197210. llvm-svn: 197211
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-136-18/+65
| | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. Recommitted as r197197 to reproduce the failure and reverted as r197199 Turns out there was unstable ordering in the type unit dumping code. Fixed by using MapVector in DWARFContext to store the debug_types comdat sections. llvm-svn: 197210
* Change stack probing code for MingW.Kai Nacke2013-12-131-9/+7
| | | | | | | | | Since gcc 4.6 the compiler uses ___chkstk_ms which has the same semantics as the MS CRT function __chkstk. This simplifies the prologue generation a bit. Reviewed by Rafael Espíndola. llvm-svn: 197205
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-134-57/+9
| | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197197. llvm-svn: 197199
* llvm-cov: Added -b option for branch probabilities.Yuchen Wu2013-12-131-22/+135
| | | | | | | | | | | This option tells llvm-cov to print out branch probabilities when a basic block contains multiple branches. It also prints out some function summary info including the number of times the function enters, the percent of time it returns, and how many blocks were executed. Also updated tests. llvm-svn: 197198
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-134-9/+57
| | | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. This commit originally got jumbled up with another build-breaking commit and I can't find the failures I thought this caused anymore. Recommitting to hopefully get some clean buildbot results to work from. I have a sneaking suspicion there's unstable output in the comdat group output of MCStreamer... llvm-svn: 197197
* Fix a use-after-free error in GlobalOpt CleanupConstantGlobalUsersHal Finkel2013-12-121-2/+11
| | | | | | | | | | | | GlobalOpt's CleanupConstantGlobalUsers function uses a worklist array to manage constant users to be visited. The pointers in this array need to be weak handles because when we delete a constant array, we may also be holding a pointer to one of its elements (or an element of one of its elements if we're dealing with an array of arrays) in the worklist. Fixes PR17347. llvm-svn: 197178
* Initialize the barrier pass llvm::initializeIPOHal Finkel2013-12-121-0/+1
| | | | | | | | | The barrier pass is a temporary hack, and should go away soon. Nevertheless, if we don't initialize it, then opt will not understand -barrier, and this will break bugpoint (because when it dumps the passes from the default pass manager -barrier will be there). llvm-svn: 197177
* Simplify the datalayout string of ARM and AArch64.Rafael Espindola2013-12-122-4/+4
| | | | | | | | No functionality change. Reviewed by Tim Northover. llvm-svn: 197172
* Simplify the SystemZ datalayout string.Rafael Espindola2013-12-121-2/+1
| | | | | | Reviewed by Richard Sandiford. llvm-svn: 197170
* Use "a" instead of "a0" in DataLayout.Rafael Espindola2013-12-123-3/+3
| | | | | | It means exactly the same and is just a bit shorter. llvm-svn: 197169
* Fix Typo.Rafael Espindola2013-12-121-1/+1
| | | | llvm-svn: 197168
* Convert the other getHostByName implementations to StringRef.Rafael Espindola2013-12-121-5/+5
| | | | llvm-svn: 197166
* Switch to the new MingW ABI.Rafael Espindola2013-12-122-5/+5
| | | | | | | GCC 4.7 changed the MingW ABI. On the LLVM side it means that sret functions don't pop the stack. llvm-svn: 197163
* [AArch64] Removed unnecessary copy patterns with v1fx types.Chad Rosier2013-12-124-27/+3
| | | | | | | | | | | | | | - Copy patterns with float/double types are enough. - Fix typos in test case names that were using v1fx. - There is no ACLE intrinsic that uses v1f32 type. And there is no conflict of neon and non-neon ovelapped operations with this type, so there is no need to support operations with this type. - Remove v1f32 from FPR32 register and disallow v1f32 as a legal type for operations. Patch by Ana Pazos! llvm-svn: 197159
* Return a StringRef from getHostCPUName.Rafael Espindola2013-12-121-1/+1
| | | | llvm-svn: 197158
* [cleanup] Remove trailing whitespace before I start changing this file.Chandler Carruth2013-12-121-1/+1
| | | | llvm-svn: 197149
* Added new X86 patterns to select SSE scalar fp arithmetic instructions fromAndrea Di Biagio2013-12-121-0/+83
| | | | | | | | | | | | | | | | | | | | | | a vector packed single/double fp operation followed by a vector insert. The effect is that the backend coverts the packed fp instruction followed by a vectro insert into a SSE or AVX scalar fp instruction. For example, given the following code: __m128 foo(__m128 A, __m128 B) { __m128 C = A + B; return (__m128) {c[0], a[1], a[2], a[3]}; } previously we generated: addps %xmm0, %xmm1 movss %xmm1, %xmm0 we now generate: addss %xmm1, %xmm0 llvm-svn: 197145
* typo in commentGabor Greif2013-12-121-2/+2
| | | | llvm-svn: 197136
* [AArch64]Fix the problem that AArch64 backend fails to select ↵Hao Liu2013-12-121-3/+37
| | | | | | scalar_to_vector of vector types having more than one element. llvm-svn: 197135
* Add missing escape characters to the new Regex::escape() functionAlp Toker2013-12-121-21/+6
| | | | | | | | | The old AddFixedStringToRegEx() it was based on got away with this for the longest time, but the problem became easy to spot after the cleanup in r197096. Also add a quick unit test to cover regex escaping. llvm-svn: 197121
* Check for null pointer before dereferencing. A careless typo on my part.Reed Kotler2013-12-121-2/+2
| | | | | | | I don't know why this did not show up earlier. This code has been around for ages. llvm-svn: 197119
* Resubmit r196544: Apply transformation on OS X 10.9+ and iOS 7.0+: pow(10, ↵Yi Jiang2013-12-122-0/+31
| | | | | | x) ―> __exp10(x) llvm-svn: 197109
* Add TargetLibraryInfo in LTO passes builderYi Jiang2013-12-121-0/+4
| | | | llvm-svn: 197105
* Remove unused multiclass from PPCInstrInfo.tdHal Finkel2013-12-121-14/+0
| | | | llvm-svn: 197100
* Improve instruction scheduling for the PPC POWER7Hal Finkel2013-12-127-3/+337
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aside from a few minor latency corrections, the major change here is a new hazard recognizer which focuses on better dispatch-group formation on the POWER7. As with the PPC970's hazard recognizer, the most important thing it does is avoid load-after-store hazards within the same dispatch group. It uses the POWER7's special dispatch-group-terminating nop instruction (instead of inserting multiple regular nop instructions). This new hazard recognizer makes use of the scheduling dependency graph itself, built using AA information, to robustly detect the possibility of load-after-store hazards. significant test-suite performance changes (the error bars are 99.5% confidence intervals based on 5 test-suite runs both with and without the change -- speedups are negative): speedups: MultiSource/Benchmarks/FreeBench/pcompress2/pcompress2 -0.55171% +/- 0.333168% MultiSource/Benchmarks/TSVC/CrossingThresholds-dbl/CrossingThresholds-dbl -17.5576% +/- 14.598% MultiSource/Benchmarks/TSVC/Reductions-dbl/Reductions-dbl -29.5708% +/- 7.09058% MultiSource/Benchmarks/TSVC/Reductions-flt/Reductions-flt -34.9471% +/- 11.4391% SingleSource/Benchmarks/BenchmarkGame/puzzle -25.1347% +/- 11.0104% SingleSource/Benchmarks/Misc/flops-8 -17.7297% +/- 9.79061% SingleSource/Benchmarks/Shootout-C++/ary3 -35.5018% +/- 23.9458% SingleSource/Regression/C/uint64_to_float -56.3165% +/- 25.4234% SingleSource/UnitTests/Vectorizer/gcc-loops -18.5309% +/- 6.8496% regressions: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000 18.351% +/- 12.156% SingleSource/Benchmarks/Shootout-C++/methcall 27.3086% +/- 14.4733% llvm-svn: 197099
* Fix an over-constrained assertion in MachineFunction::addLiveIn.Quentin Colombet2013-12-121-1/+10
| | | | | | | | | | | | | | | | The assertion was checking that the virtual register VReg used to represent the physical register PReg uses the same register class as the one passed to MachineFunction::addLiveIn. This is over-constraining because it is sufficient to check that the register class of VReg (VRegRC) is a subclass of the register class of PReg (PRegRC) and that VRegRC contains PReg. Indeed, if VReg gets constrained because of some operation constraints between two calls of MachineFunction::addLiveIn, the original assertion cannot match. This fixes <rdar://problem/15633429>. llvm-svn: 197097
* Expose FileCheck's AddFixedStringToRegEx as Regex::escapeHans Wennborg2013-12-121-0/+29
| | | | | | | Both FileCheck and clang's -verify need to escape strings for regexes, so let's expose this as a utility in the Regex class. llvm-svn: 197096
* [AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64Chad Rosier2013-12-111-2/+2
| | | | | | intrinsics to use f32 types, rather than their vector equivalents. llvm-svn: 197090
* Fix the PPC subsumes-predicate checkHal Finkel2013-12-111-0/+4
| | | | | | | | | For one predicate to subsume another, they must both check the same condition register. Failure to check this prerequisite was causing miscompiles. Fixes PR18003. llvm-svn: 197089
* Add two additional hazard recognizer functionsHal Finkel2013-12-111-7/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds two additional functions to the hazard recognizer interface. These are optional (in the sense that the default implementations preserve the current behavior), and used by the post-RA scheduler. Upcoming commits will use this functionality in order to improve dispatch-group formation on the POWER7 and related cores. Dispatch groups are an odd construct: sometimes we need to insert nops to force a new one to start (for performance reasons), and some instructions need to appear in certain positions within a group, but the groups are not fundamentally cycle based (they can contain instructions with data dependencies with non-trivial latencies). Motivation: unsigned PreEmitNoops(SUnit *) - Used to force the post-RA scheduler to insert nops to force a new dispatch group to begin. We already have a NoopHazard, and this is also still needed. However, NoopHazard only causes a nop to be inserted if there are no other available instructions, and so is not always sufficient. The number of nops to insert depends on state that only the hazard recognizer has, so a general callback is necessary. bool ShouldPreferAnother(SUnit *) - Used to avoid scheduling instructions that would start a new dispatch group when others are available that could be part of the current dispatch group. In this case, we don't want to issue nops, because the non-preferred instruction will implicitly start a new dispatch group regardless. Although the motivation for these functions is driven by the PowerPC backend, they are completely general. llvm-svn: 197084
* On ELF and COFF treat linker_private like private.Rafael Espindola2013-12-111-1/+1
| | | | | | | | The linkers on these systems don't have anything special to do with these symbols. Since the intent is for them to be absent from the final object, just treat them as private. llvm-svn: 197080
* Revert "DebugInfo: Move type units into the debug_types section with ↵David Blaikie2013-12-114-57/+9
| | | | | | | | | | | | appropriate comdat grouping and type unit headers" This reverts commit r197073. The test seems to be failing on some buildbots for unknown reasons. Reverting until I can figure that out. If anyone's got a reproduction (.s and .o together would be great) - I'd really appreciate it. llvm-svn: 197079
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-114-9/+57
| | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. llvm-svn: 197073
* DwarfUnit: LLVM_OVERRIDE and constify some functionsDavid Blaikie2013-12-112-4/+4
| | | | llvm-svn: 197072
* [AArch64] Add NEON scalar floating-point compare LLVM AArch64 intrinsics thatChad Rosier2013-12-111-16/+18
| | | | | | use f32/f64 types, rather than their vector equivalents. llvm-svn: 197068
* [AArch64] Refactor the NEON scalar floating-point reciprocal step andChad Rosier2013-12-111-11/+11
| | | | | | | floating-point reciprocal square root step LLVM AArch64 intrinsics to use f32/f64 types, rather than their vector equivalents. llvm-svn: 197067
* [AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating-Chad Rosier2013-12-111-10/+19
| | | | | | | | point reciprocal exponent, and floating-point reciprocal square root estimate LLVM AArch64 intrinsics to use f32/f64 types, rather than their vector equivalents. llvm-svn: 197066
* Don't set unused variable.Rafael Espindola2013-12-111-1/+0
| | | | llvm-svn: 197064
* R600: Re-format Processors.tdTom Stellard2013-12-111-0/+48
| | | | | | | This makes it a little easier to read. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 197058
* R600: Register AMDGPUCFGStructurizer passTom Stellard2013-12-113-10/+23
| | | | | | | This enables -print-before-all to dump MachineInstrs after it is run. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 197057
* R600: Register R600EmitClauseMarkers passTom Stellard2013-12-113-9/+19
| | | | | | | This enables -print-before-all to dump MachineInstrs after it is run. Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 197056
* [arm] Implement ARM .arch directive.Logan Chien2013-12-114-2/+223
| | | | llvm-svn: 197052
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