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* [Sparc] Rearrange SparcInstrInfo, no change.James Y Knight2015-07-011-68/+80
| | | | | | | | | Move some instructions into order of sections in the spec, as the rest already were. Differential Revision: http://reviews.llvm.org/D9102 llvm-svn: 241163
* AVX-512: Implemented missing encoding for FMA scalar instructionsIgor Breger2015-07-011-34/+95
| | | | | | | | Added tests for encoding Differential Revision: http://reviews.llvm.org/D10865 llvm-svn: 241159
* Return ErrorOr from getSection.Rafael Espindola2015-07-011-0/+2
| | | | | | | | | | | | | | This also improves the logic of what is an error: * getSection(uint_32): only return an error if the index is out of bounds. The index 0 corresponds to a perfectly valid entry. * getSection(Elf_Sym): Returns null for symbols that normally don't have sections and error for out of bound indexes. In many places this just moves the report_fatal_error up the stack, but those can then be fixed in smaller patches. llvm-svn: 241156
* [DWARF] Fix debug info generation for function static variables, typedefs, ↵Michael Kuperstein2015-07-016-35/+62
| | | | | | | | | | | | | | | and records Function static variables, typedefs and records (class, struct or union) declared inside a lexical scope were associated with the function as their parent scope, rather than the lexical scope they are defined or declared in. This fixes PR19238 Patch by: amjad.aboud@intel.com Differential Revision: http://reviews.llvm.org/D9758 llvm-svn: 241153
* [X86] Avoid over-relaxation of 8-bit immediates in integer arithmetic ↵Michael Kuperstein2015-07-011-24/+6
| | | | | | | | | | | | | | | | | | instructions. Only consider an instruction a candidate for relaxation if the last operand of the instruction is an expression. We previously checked whether any operand is an expression, which is useless, since for all instructions concerned, the only operand that may be affected by relaxation is the last one. In addition, this removes the check for having RIP as an argument, since it was plain wrong - even when one of the arguments is RIP, relaxation may still be needed. This fixes PR9807. Patch by: david.l.kreitzer@intel.com Differential Revision: http://reviews.llvm.org/D10766 llvm-svn: 241152
* [mips][microMIPS] Implement SLL and NOP instructionsZoran Jovanovic2015-07-013-0/+21
| | | | | | http://reviews.llvm.org/D10474 llvm-svn: 241150
* Fix PR23872: Integrated assembler error message when using .type directive ↵Gabor Ballabas2015-07-011-4/+10
| | | | | | | | | | | with @ in AArch32 assembly. The AArch32 assembler parses the '@' as a comment symbol, so the error message shouldn't suggest that '@<type>' is a valid replacement when assembling for AArch32 target. Differential Revision: http://reviews.llvm.org/D10651 llvm-svn: 241149
* [LoopUnroll] Use undef for phis with no value liveDavid Majnemer2015-07-011-1/+1
| | | | | | | | We would create a phi node with a zero initialized operand instead of undef in the case where no value was originally available. This was problematic for x86_mmx which has no null value. llvm-svn: 241143
* [SCCP] Turn loads of null into undef instead of zero initialized valuesDavid Majnemer2015-07-011-1/+1
| | | | | | | | | | Surprisingly, this is a correctness issue: the mmx type exists for calling convention purposes, LLVM doesn't have a zero representation for them. This partially fixes PR23999. llvm-svn: 241142
* [NaryReassociate] enhances nsw by leveraging @llvm.assumeJingyue Wu2015-07-011-14/+55
| | | | | | | | | | | | | | | | | | | | | Summary: nsw are flaky and can often be removed by optimizations. This patch enhances nsw by leveraging @llvm.assume in the IR. Specifically, NaryReassociate now understands that assume(a + b >= 0) && assume(a >= 0) ==> a +nsw b As a result, it can split more sext(a + b) into sext(a) + sext(b) for CSE. Test Plan: nary-gep.ll Reviewers: broune, meheff Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10822 llvm-svn: 241139
* [SanitizerCoverage] Don't add instrumentation to unreachable blocks.Alexey Samsonov2015-06-301-0/+7
| | | | llvm-svn: 241127
* [SEH] Add new intrinsics for recovering and restoring parent framesReid Kleckner2015-06-304-48/+114
| | | | | | | | | | | | | | | | | | | | | | | | | The incoming EBP value established by the runtime is actually a pointer to the end of the EH registration object, and not the true parent function frame pointer. Clang doesn't need llvm.x86.seh.exceptioninfo anymore because we know that the exception info pointer is at a fixed offset from this incoming EBP. The llvm.x86.seh.recoverfp intrinsic takes an EBP value provided by the EH runtime and returns a pointer that is usable with llvm.framerecover. The llvm.x86.seh.restoreframe intrinsic is inserted by the 32-bit specific preparation pass in blocks targetted by the EH runtime. It re-establishes any physical registers used by the parent function to address the stack, such as the frame, base, and stack pointers. Neither of these intrinsics correctly handle stack realignment prologues yet, but it's possible to add that later. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D10848 llvm-svn: 241125
* [Cloning] Teach CloneModule about personality functionsDavid Majnemer2015-06-301-0/+4
| | | | | | | | | CloneModule didn't take into account that it needed to remap the value using values in the module. This fixes PR23992. llvm-svn: 241122
* [NVPTX] cleanups and refacotring in NVPTXFrameLowering.cppJingyue Wu2015-06-301-27/+19
| | | | | | | | | | | | | | | | Summary: NFC Test Plan: no regression Reviewers: wengxt Reviewed By: wengxt Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10849 llvm-svn: 241118
* [FaultMaps] Let the frontend pre-select implicit null check candidates.Sanjoy Das2015-06-301-0/+7
| | | | | | | | | | | | | | | | | | Summary: This change introduces a !make.implicit metadata that allows the frontend to pre-select the set of explicit null checks that will be considered for transformation into implicit null checks. The reason for not using profiling data instead of !make.implicit is explained in the change to `FaultMaps.rst`. Reviewers: atrick, reames, pgavlin, JosephTremoulet Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10824 llvm-svn: 241116
* Pack MCSymbol::HasName in to a spare bit in the section/fragment union.Pete Cooper2015-06-301-1/+1
| | | | | | | | | | | | This is part of an effort to pack the average MCSymbol down to 24 bytes. The HasName bit was pushing the size of the bitfield over to another word, so this change uses a PointerIntPair to fit in it to unused bits of a PointerUnion. Reviewed by Rafael Espíndola llvm-svn: 241115
* Use ErrorOr in getRelocationAdress.Rafael Espindola2015-06-304-13/+9
| | | | | | | We can probably do better in this method, but this is an improvement and enables further ErrorOr cleanups. llvm-svn: 241114
* Implement containsSymbol with other lower level methods.Rafael Espindola2015-06-303-23/+7
| | | | llvm-svn: 241112
* Modified a comment about the reason for the patch (removed commented code).Nemanja Ivanovic2015-06-301-2/+1
| | | | llvm-svn: 241110
* Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systemsNemanja Ivanovic2015-06-301-1/+4
| | | | llvm-svn: 241108
* COFF: Do not assign linker-weak symbols to selectany comdat sections.Peter Collingbourne2015-06-301-2/+0
| | | | | | | | | | | | | | It is mandatory to specify a comdat in order to receive comdat semantics for a symbol. We were previously getting this wrong in -function-sections mode; linker-weak symbols were being emitted in a selectany comdat. This change causes such symbols to use a noduplicates comdat instead, fixing the inconsistency. Also correct an inaccuracy in the docs. Differential Revision: http://reviews.llvm.org/D10828 llvm-svn: 241103
* [NVPTX] Fix issue introduced in D10321Jingyue Wu2015-06-301-3/+2
| | | | | | | | | | | | | | | | | | | | | | Summary: Really check if %SP is not used in other places, instead of checking only exact one non-dbg use. Patched by Xuetian Weng. Test Plan: @foo4 in test/CodeGen/NVPTX/local-stack-frame.ll, create a case that SP will appear twice. Reviewers: jholewinski, jingyue Reviewed By: jingyue Subscribers: llvm-commits, sfantao, jholewinski Differential Revision: http://reviews.llvm.org/D10844 llvm-svn: 241099
* Fix a fixme and make DICompileUnit a distinct node. Tested via clang.Adrian Prantl2015-06-301-3/+1
| | | | llvm-svn: 241097
* Fix compilation failure introduced in r241093.Alex Lorenz2015-06-301-2/+2
| | | | llvm-svn: 241096
* MIR Serialization: Serialize MBB successors.Alex Lorenz2015-06-304-3/+52
| | | | | | | | | | | | | This commit implements serialization of the machine basic block successors. It uses a YAML flow sequence that contains strings that have the MBB references. The MBB references in those strings use the same syntax as the MBB machine operands in the machine instruction strings. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10699 llvm-svn: 241093
* MIR Printer: extract the code that prints MBB references into a new method. NFC.Alex Lorenz2015-06-301-5/+10
| | | | | | | This commit enables the MIR printer to reuse the code that prints MBB references. llvm-svn: 241087
* MIR Parser: refactor error reporting for machine instruction parser errors. NFC.Alex Lorenz2015-06-301-5/+14
| | | | | | | This commit extracts the code that reports an error that's produced by the machine instruction parser into a new method that can be reused in other places. llvm-svn: 241086
* MIR Parser: make the machine instruction parsing interface more consistent. NFC.Alex Lorenz2015-06-303-30/+26
| | | | | | | | | This commit refactors the interface for machine instruction parser. It adopts the pattern of returning a bool and passing in the result in the first argument that is used by the other parsing methods for the the method 'parse' and the function 'parseMachineInstr'. llvm-svn: 241085
* Force relocation mode to be default, regardless of what is passed to the ↵Samuel Antao2015-06-301-1/+4
| | | | | | backend. llvm-svn: 241081
* MIR Parser: adopt the 'maybeLex...' pattern. NFC.Alex Lorenz2015-06-301-22/+37
| | | | | | | | | | | | This commit refactors the machine instruction lexer so that the lexing functions use the 'maybeLex...' pattern, where they determine if they can lex the current token by themselves. Reviewers: Sean Silva Differential Revision: http://reviews.llvm.org/D10817 llvm-svn: 241078
* use range-based for loops; NFCISanjay Patel2015-06-301-7/+5
| | | | llvm-svn: 241076
* [X86] Fix a bug in WIN_FTOL_32/64 handling.Michael Kuperstein2015-06-301-1/+1
| | | | | | | | | | Duplicating an FP register "as itself" is a bad idea, since it violates the invariant that every FP register is mapped to at most one FPU stack slot. Use the scratch FP register instead. This fixes PR23957. llvm-svn: 241069
* [mips] [IAS] Add support for the .module softfloat/hardfloat directives.Toma Tabacu2015-06-303-0/+54
| | | | | | | | | These directives are used to set the default value of the SoftFloat feature. They have the same effect as setting -m{soft, hard}-float from the command line. Differential Revision: http://reviews.llvm.org/D9073 llvm-svn: 241066
* [mips] [IAS] Make .module directives change AssemblerOptions->front().Toma Tabacu2015-06-301-8/+34
| | | | | | Differential Revision: http://reviews.llvm.org/D10643 llvm-svn: 241062
* Reverting r241058 because it's causing buildbot failures.Ranjeet Singh2015-06-309-92/+72
| | | | llvm-svn: 241061
* There are a few places where subtarget features are stillRanjeet Singh2015-06-309-72/+92
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* [mips] [IAS] Add support for the .set oddspreg/nooddspreg directives.Toma Tabacu2015-06-303-0/+52
| | | | | | Differential Revision: http://reviews.llvm.org/D10657 llvm-svn: 241052
* [X86] Add FXSR intrinsicsMichael Kuperstein2015-06-301-8/+8
| | | | | | Add intrinsics for the FXSR instructions (FXSAVE/FXSAVE64/FXRSTOR/FXRSTOR64) llvm-svn: 241049
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-304-15/+6
| | | | llvm-svn: 241042
* Drop the OS from the WebAssembly target triple for now.Dan Gohman2015-06-301-2/+0
| | | | | | | This unbreaks TripleTest.Normalization. We'll have to come up with a new plan for the OS component of the target triple for WebAssembly. llvm-svn: 241041
* Move function to the only file that uses it.Rafael Espindola2015-06-301-24/+0
| | | | llvm-svn: 241040
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-301-7/+5
| | | | llvm-svn: 241039
* Debug info: Add dwarf backend support for DIModule.Adrian Prantl2015-06-304-0/+30
| | | | | | rdar://problem/20965932 llvm-svn: 241034
* Don't return error_code from a function that doesn't fail.Rafael Espindola2015-06-308-30/+15
| | | | llvm-svn: 241033
* Cleanup getRelocationAddend.Rafael Espindola2015-06-302-9/+6
| | | | | | | | | | | Realistically, this will be returning ErrorOr for some time as refactoring the user code to check once per section will take some time. Given that, use it for checking if a relocation has addend or not. While at it, add ELFRelocationRef to simplify the users. llvm-svn: 241028
* RegisterCoalescer: Cleanup empty subranges after shrinkToUses()Matthias Braun2015-06-301-0/+1
| | | | | | | | A call to removeEmptySubranges() is necessary after every operation that potentially removes all segments from a subregister range; this case in the register coalescer was missing. llvm-svn: 241027
* Object/COFF: Define coff_symbol_generic.Rui Ueyama2015-06-301-6/+10
| | | | | | | | | | | | | | If you only need Name and Value fields in the COFF symbol, you don't need to distinguish 32 bit and 64 bit COFF symbols. These fields start at the same offsets and have the same size. This data strucutre is one pointer smaller than COFFSymbolRef thus slightly efficient. I'll use this class in LLD as we create millions of LLD symbol objects that currently contain COFFSymbolRef. Shaving off 8 byte (or 4 byte on 32 bit) from that class actually matters becasue of the number of objects we create in LLD. llvm-svn: 241024
* [WebAssembly] Initial WebAssembly backendDan Gohman2015-06-2949-0/+1856
| | | | | | | This WebAssembly backend is just a skeleton at this time and is not yet functional. llvm-svn: 241022
* Don't return error_code from function that never fails.Rafael Espindola2015-06-299-34/+14
| | | | llvm-svn: 241021
* Add a DIModule metadata node to the IR.Adrian Prantl2015-06-299-0/+126
| | | | | | | | | | | | | | | | | | | It is meant to be used to record modules @imported by the current compile unit, so a debugger an import the same modules to replicate this environment before dropping into the expression evaluator. DIModule is a sibling to DINamespace and behaves quite similarly. In addition to the name of the module it also records the module configuration details that are necessary to uniquely identify the module. This includes the configuration macros (e.g., -DNDEBUG), the include path where the module.map file is to be found, and the isysroot. The idea is that the backend will turn this into a DW_TAG_module. http://reviews.llvm.org/D9614 rdar://problem/20965932 llvm-svn: 241017
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