| Commit message (Collapse) | Author | Age | Files | Lines |
| ... | |
| |
|
|
|
|
| |
won't use it.
llvm-svn: 174023
|
| |
|
|
|
|
|
|
|
| |
--- Reverse-merging r174010 into '.':
U include/llvm/IR/Attributes.h
U lib/IR/Verifier.cpp
U lib/IR/Attributes.cpp
llvm-svn: 174012
|
| |
|
|
|
|
|
|
| |
The AttrBuilder is there to build up multiple attributes. The Attribute class
represents only one attribute at a time. So remove this unnecessary builder
creator method.
llvm-svn: 174010
|
| |
|
|
| |
llvm-svn: 174009
|
| |
|
|
|
|
|
| |
register for inline asm. This conforms to how gcc allows for effective
casting of inputs into gprs (fprs is already handled).
llvm-svn: 174008
|
| |
|
|
| |
llvm-svn: 174005
|
| |
|
|
|
|
|
|
| |
Several places were still treating the Attribute object as respresenting
multiple attributes. Those places now use the AttributeSet to represent
multiple attributes.
llvm-svn: 174003
|
| |
|
|
|
|
| |
with an assert instead of failing and requiring callers to check for failure.
llvm-svn: 173998
|
| |
|
|
|
|
|
| |
for example, a one-past-the-end pointer from one global variable may
be equal to the base pointer of another global variable.
llvm-svn: 173995
|
| |
|
|
|
|
|
| |
On systems which support the QPX vector instructions, the stack must be
32-byte aligned.
llvm-svn: 173993
|
| |
|
|
| |
llvm-svn: 173992
|
| |
|
|
|
|
|
| |
There are still places which treat the Attribute object as a collection of
attributes. I'm systematically removing them.
llvm-svn: 173990
|
| |
|
|
|
|
| |
and less critical.
llvm-svn: 173987
|
| |
|
|
|
|
| |
This should have gone in with r173973.
llvm-svn: 173984
|
| |
|
|
|
|
|
| |
It was creating a new AttrBuilder when we could just fill in the AttrBuilder
we're building.
llvm-svn: 173975
|
| |
|
|
|
|
|
|
| |
This is the first commit of a large series which will add support for the
QPX vector instruction set to the PowerPC backend. This instruction set is
used on the IBM Blue Gene/Q supercomputers.
llvm-svn: 173973
|
| |
|
|
| |
llvm-svn: 173960
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Given source IR:
call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !14), !dbg !15
we used to generate
call void @llvm.dbg.declare(metadata !27, metadata !28), !dbg !29
!27 = metadata !{null}
With this patch, we will correctly generate
call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !27), !dbg !28
Looking up %argc.addr in ValueMap will return null, since %argc.addr is already
correctly set up, we can use identity mapping.
llvm-svn: 173946
|
| |
|
|
|
|
|
|
| |
More details in this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130128/163783.html
Patch by JF Bastien
llvm-svn: 173943
|
| |
|
|
| |
llvm-svn: 173941
|
| |
|
|
| |
llvm-svn: 173939
|
| |
|
|
|
|
| |
This is required to use them in TableGen.
llvm-svn: 173923
|
| |
|
|
|
|
| |
AttributeSet has attributes or not.
llvm-svn: 173902
|
| |
|
|
|
|
|
|
| |
sext-not-and --> select.
Patch by Muhammad Tauqir Ahmad.
llvm-svn: 173901
|
| |
|
|
| |
llvm-svn: 173888
|
| |
|
|
| |
llvm-svn: 173887
|
| |
|
|
| |
llvm-svn: 173886
|
| |
|
|
|
|
|
|
| |
setting of ELF header e_flags.
Contributer: Jack Carter
llvm-svn: 173885
|
| |
|
|
|
|
|
|
| |
setting of ELF header e_flags.
Contributer: Jack Carter
llvm-svn: 173884
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
and update ELF header e_flags.
Currently gathering information such as symbol,
section and data is done by collecting it in an
MCAssembler object. From MCAssembler and MCAsmLayout
objects ELFObjectWriter::WriteObject() forms and
streams out the ELF object file.
This patch just adds a few members to the MCAssember
class to store and access the e_flag settings. It
allows for runtime additions to the e_flag by
assembler directives. The standalone assembler can
get to MCAssembler from getParser().getStreamer().getAssembler().
This patch is the generic infrastructure and will be
followed by patches for ARM and Mips for their target
specific use.
Contributer: Jack Carter
llvm-svn: 173882
|
| |
|
|
|
|
| |
Patch by Sasa Stankovic.
llvm-svn: 173862
|
| |
|
|
|
|
|
|
|
|
|
| |
Changing ARMBaseTargetMachine to return ARMTargetLowering intead of
the generic one (similar to x86 code).
Tests showing which instructions were added to cast when necessary
or cost zero when not. Downcast to 16 bits are not lowered in NEON,
so costs are not there yet.
llvm-svn: 173849
|
| |
|
|
| |
llvm-svn: 173847
|
| |
|
|
| |
llvm-svn: 173842
|
| |
|
|
|
|
| |
Fixes PR14447 and PR9034. Patch by Nico Rieck!
llvm-svn: 173839
|
| |
|
|
|
|
| |
to a command line switch.
llvm-svn: 173837
|
| |
|
|
| |
llvm-svn: 173836
|
| |
|
|
| |
llvm-svn: 173834
|
| |
|
|
|
|
| |
of ScheduleDAGRRList
llvm-svn: 173833
|
| |
|
|
| |
llvm-svn: 173832
|
| |
|
|
|
|
| |
type Sequence so I can print out Sequences in debug statements.
llvm-svn: 173831
|
| |
|
|
|
|
| |
perform escape analysis of other retainable object pointers in other locations.
llvm-svn: 173829
|
| |
|
|
| |
llvm-svn: 173828
|
| |
|
|
| |
llvm-svn: 173827
|
| |
|
|
|
|
|
| |
Provides the functionality for Clang change r172911 - I just had this still
lying around.
llvm-svn: 173820
|
| |
|
|
| |
llvm-svn: 173816
|
| |
|
|
| |
llvm-svn: 173813
|
| |
|
|
| |
llvm-svn: 173812
|
| |
|
|
|
|
|
| |
Fixed set-but-not-used warnings.
Reviewer: gribozavr
llvm-svn: 173810
|
| |
|
|
|
|
| |
No intended functionality change.
llvm-svn: 173809
|