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* [GlobalISel] Preserve IR block layout.Ahmed Bougacha2017-03-151-20/+26
| | | | | | | | | | | | | | It makes the output function layout more predictable; the layout has an effect on performance, we don't want it to be at the mercy of the translator's visitation order and such. The predictable output is also easier to digest. getOrCreateBB isn't appropriately named anymore, as it never needs to create anything. Rename it and extract the MBB creation logic out of it. A couple tests were sensitive to the order. Update them. llvm-svn: 297868
* AMDGPU: Minor SIAnnotateControlFlow cleanupsMatt Arsenault2017-03-151-31/+35
| | | | | | Newline fixes, early return, range loops. llvm-svn: 297865
* [YAML] When outputting, provide the ability to write default values.Zachary Turner2017-03-151-12/+5
| | | | | | | | | Previously, if you attempted to write a key/value pair and the value was equal to the key's default value, we would not output the value. Sometimes it is useful to be able to see this value in the output anyway. llvm-svn: 297864
* [CodeGen] Use APInt::setLowBits/setHighBits/setBitsFrom in more placesCraig Topper2017-03-152-25/+19
| | | | | | | | | | This patch replaces ORs with getHighBits/getLowBits etc. with setLowBits/setHighBits/setBitsFrom. In a few of the places we weren't ORing, but the KnownZero/KnownOne vectors were already initialized to zero. We exploit this in most places already there were just some that were inconsistent. Differential Revision: https://reviews.llvm.org/D30965 llvm-svn: 297860
* [GlobalISel] Remove dead member. NFC.Ahmed Bougacha2017-03-151-1/+0
| | | | llvm-svn: 297855
* CodeGen: Use the source filename as the argument to .file, rather than the ↵Peter Collingbourne2017-03-151-1/+1
| | | | | | | | | | | | | | | | module ID. Using the module ID here is wrong for a couple of reasons: 1) The module ID is not persisted, so we can end up with different object file contents given the same input file (for example if the same file is accessed via different paths). 2) With ThinLTO the module ID field may contain the path to a bitcode file, which is incorrect, as the .file argument is supposed to contain the path to a source file. Differential Revision: https://reviews.llvm.org/D30584 llvm-svn: 297853
* [SelectionDAG] Support BUILD_VECTOR implicit truncation in ↵Simon Pilgrim2017-03-151-3/+14
| | | | | | SelectionDAG::ComputeNumSignBits (PR32273) llvm-svn: 297852
* [PowerPC][Altivec] Add mfvrd and mffprd extended mnemonicNemanja Ivanovic2017-03-151-0/+12
| | | | | | | | | | | mfvrd and mffprd are both alias to mfvrsd. This patch enables correct parsing of the aliases, but we still emit a mfvrsd. Committing on behalf of brunoalr (Bruno Rosa). Differential Revision: https://reviews.llvm.org/D29177 llvm-svn: 297849
* Cyle -> Cycle; NFCISanjay Patel2017-03-153-8/+8
| | | | llvm-svn: 297846
* Revert "Refactor SimplifyCFG:canSinkInstructions [NFC]"Eric Liu2017-03-151-23/+23
| | | | | | This reverts commit r297839, which breaks Transforms/SimplifyCFG/sink-common-code.ll llvm-svn: 297845
* Revert "[Thumb1] Fix the bug when adding/subtracting -2147483648"Artyom Skrobov2017-03-151-4/+4
| | | | | | This reverts r297820 which apparently fails on A15 hosts. llvm-svn: 297842
* Reverted unintended commitSimon Pilgrim2017-03-151-2/+2
| | | | llvm-svn: 297841
* Fix Wint-in-bool-context warning (PR32248)Simon Pilgrim2017-03-151-2/+2
| | | | llvm-svn: 297840
* Refactor SimplifyCFG:canSinkInstructions [NFC]Aditya Kumar2017-03-151-23/+23
| | | | llvm-svn: 297839
* Reverting r297821 due to breaking lld test.Sam Parker2017-03-151-55/+33
| | | | llvm-svn: 297838
* [X86][SSE] Fixed shuffle MOVSS/MOVSD combining of all zeroable inputsSimon Pilgrim2017-03-151-4/+5
| | | | | | | | Turns out it can happen, so the assertion was too harsh Found during fuzz testing llvm-svn: 297833
* [Mips] Add support to match more patterns for DEXT and CINSPetar Jovanovic2017-03-155-40/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for recognizing more patterns to match to DEXT and CINS instructions. It finds cases where multiple instructions could be replaced with a single DEXT or CINS instruction. For example, for the following: define i64 @dext_and32(i64 zeroext %a) { entry: %and = and i64 %a, 4294967295 ret i64 %and } instead of generating: 0000000000000088 <dext_and32>: 88: 64010001 daddiu at,zero,1 8c: 0001083c dsll32 at,at,0x0 90: 6421ffff daddiu at,at,-1 94: 03e00008 jr ra 98: 00811024 and v0,a0,at 9c: 00000000 nop the following gets generated: 0000000000000068 <dext_and32>: 68: 03e00008 jr ra 6c: 7c82f803 dext v0,a0,0x0,0x20 Cases that are covered: DEXT: 1. and $src, mask where mask > 0xffff 2. zext $src zero extend from i32 to i64 CINS: 1. and (shl $src, pos), mask 2. shl (and $src, mask), pos 3. zext (shl $src, pos) zero extend from i32 to i64 Patch by Violeta Vukobrat. Differential Revision: https://reviews.llvm.org/D30464 llvm-svn: 297832
* Align cost model columns. NFCI.Simon Pilgrim2017-03-151-4/+4
| | | | llvm-svn: 297824
* [ARM] Fix for branch label disassembly for ThumbSam Parker2017-03-151-33/+55
| | | | | | | | | | | | | | | | | Different MCInstrAnalysis classes for arm and thumb mode, each with their own evaluateBranch implementation. I added a test case and fixed the coff-relocations test to use '<label>:' rather than '<label>' in the CHECK-LABEL entries, since the ones without the colon would match branch targets. Might be worth noticing that llvm-objdump does not lookup the relocation and thus assigns it a target depending on the encoded immediate which #0, so it thinks it branches to the next instruction. Committed on behalf of Andre Vieira (avieira). Differential Revision: https://reviews.llvm.org/D30943 llvm-svn: 297821
* [Thumb1] Fix the bug when adding/subtracting -2147483648Artyom Skrobov2017-03-151-4/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D30829 llvm-svn: 297820
* fix gcc -Wmisleading-indentation [NFC]Nuno Lopes2017-03-151-1/+1
| | | | llvm-svn: 297816
* [Support][CommandLine] Make it possible to get error messages from ↵Eric Liu2017-03-151-27/+24
| | | | | | | | | | | | | | | | | | | ParseCommandLineOptions when ignoring errors. Summary: Previously, ParseCommandLineOptions returns false and ignores error messages when IgnoreErrors. It would be useful to also return error messages if users decide to check parsing result instead of having the program exit on error. Reviewers: chandlerc, mehdi_amini, rnk Reviewed By: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30893 llvm-svn: 297810
* [ARM] Enable SMLAL[B|T] iselSam Parker2017-03-154-40/+182
| | | | | | | | | | | Enable the selection of the 64-bit signed multiply accumulate instructions which operate on 16-bit operands. These are enabled for ARMv5TE onwards for ARM and for V6T2 and other DSP enabled Thumb architectures. Differential Revision: https://reviews.llvm.org/D30044 llvm-svn: 297809
* NFC: Reformats comments according to the coding guildelines.Taewook Oh2017-03-152-34/+41
| | | | llvm-svn: 297808
* [BranchFolding] Merge debug locations from common tail instead of removingTaewook Oh2017-03-152-4/+43
| | | | | | | | | | | | | | Summary: D25742 improved the precision of debug locations for PGO by removing debug locations from common tail when tail-merging. However, if identical insturctions that are merged into a common tail have the same debug locations, there's no need to remove them. This patch creates a merged debug location of identical instructions across SameTails and assign it to the instruction in the common tail, so that the debug locations are maintained if they are same across identical instructions. Reviewers: aprantl, probinson, MatzeB, rob.lougher Reviewed By: aprantl Subscribers: andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D30226 llvm-svn: 297805
* Ensure that prefix data is preserved with subsections-via-symbolsPeter Collingbourne2017-03-151-2/+17
| | | | | | | | | | | | | | On MachO platforms that use subsections-via-symbols dead code stripping will drop prefix data. Unfortunately there is no great way to convey the relationship between a function and its prefix data to the linker. We are forced to use a bit of a hack: we give the prefix data it’s own symbol, and mark the actual function entry an .alt_entry. Patch by Moritz Angermann! Differential Revision: https://reviews.llvm.org/D30770 llvm-svn: 297804
* [libFuzzer] remove even more stale codeKostya Serebryany2017-03-152-18/+0
| | | | llvm-svn: 297797
* [libFuzzer] simplify code a bitKostya Serebryany2017-03-152-20/+2
| | | | llvm-svn: 297796
* [GlobalISel] IRTranslator: Return the scalar for <1 x Ty> constant vectorsVolkan Keles2017-03-141-0/+6
| | | | | | | | | | | | | | | | Summary: <1 x Ty> is not a legal vector type in LLT, we shouldn’t build G_MERGE_VALUES instruction for them. Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, ab, javed.absar Reviewed By: qcolombet Subscribers: dberris, rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D30948 llvm-svn: 297792
* MemCpyOptimizer: don't create new addrspace castsFiona Glaser2017-03-141-0/+11
| | | | | | | This isn't safe on all targets, and since we don't have a way to know it's safe, avoid doing it for now. llvm-svn: 297788
* [globalisel] LLVM_BUILD_GLOBAL_ISEL=OFF should prevent GlobalISel ↵Daniel Sanders2017-03-142-0/+5
| | | | | | instruction selector from being declared. llvm-svn: 297786
* [libFuzzer] remove more stale codeKostya Serebryany2017-03-144-83/+4
| | | | llvm-svn: 297785
* [libFuzzer] don't clear Counters in TracePC::CollectFeatures since they will ↵Kostya Serebryany2017-03-142-4/+3
| | | | | | be cleared anyway in ResetMaps llvm-svn: 297783
* [globalisel][tblgen] Add support for ComplexPatternsDaniel Sanders2017-03-148-3/+96
| | | | | | | | | | | | | | | | | | | Summary: Adds a new kind of MachineOperand: MO_Placeholder. This operand must not appear in the MIR and only exists as a way of creating an 'uninitialized' operand until a matcher function overwrites it. Depends on D30046, D29712 Reviewers: t.p.northover, ab, rovka, aditya_nandakumar, javed.absar, qcolombet Reviewed By: qcolombet Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D30089 llvm-svn: 297782
* [libFuzzer] remove stale codeKostya Serebryany2017-03-143-42/+4
| | | | llvm-svn: 297781
* [SelectionDAG] Add a signed integer absolute ISD nodeSimon Pilgrim2017-03-1410-152/+97
| | | | | | | | | | | | Reduced version of D26357 - based on the discussion on llvm-dev about canonicalization of UMIN/UMAX/SMIN/SMAX as well as ABS I've reduced that patch to just the ABS ISD node (with x86/sse support) to improve basic combines and lowering. ARM/AArch64, Hexagon, PowerPC and NVPTX all have similar instructions allowing us to make this a generic opcode and move away from the hard coded tablegen patterns which makes it tricky to match more complex patterns. At the moment this patch doesn't attempt legalization as we only create an ABS node if its legal/custom. Differential Revision: https://reviews.llvm.org/D29639 llvm-svn: 297780
* [WebAssembly] Use LEB encoding for value typesDerek Schuff2017-03-147-271/+246
| | | | | | | | | | | | Previously we were using the encoded LEB hex values for the value types. This change uses the decoded negative value and the LEB encoder to write them out. Differential Revision: https://reviews.llvm.org/D30847 Patch by Sam Clegg llvm-svn: 297777
* Archives require a symbol table on Solaris, even if empty.Rafael Espindola2017-03-141-0/+5
| | | | | | | | | | | | | | On Solaris ld (and some other tools that use the underlying utility libraries, such as elfdump) chokes on an archive library that has no symbol table. The Solaris tools always create one, even if it's empty. That bug has been fixed in the latest development line, and can probably be backported to a supported release, but it would be nice if LLVM's archiver could emit the empty symbol table, too. Patch by Danek Duvall! llvm-svn: 297773
* Fix asm printing of associated sections.Evgeniy Stepanov2017-03-145-21/+34
| | | | | | | Make MCSectionELF::AssociatedSection be a link to a symbol, because that's how it works in the assembly, and use it in the asm printer. llvm-svn: 297769
* [ARM] Replace some C++ selection code with TableGen patterns. NFC.Eli Friedman2017-03-145-64/+33
| | | | | | Differential Revision: https://reviews.llvm.org/D30794 llvm-svn: 297768
* [DAG] vector div/rem with any zero element in divisor is undefSanjay Patel2017-03-142-15/+31
| | | | | | | | | | | | | | | | This is the backend counterpart to: https://reviews.llvm.org/rL297390 https://reviews.llvm.org/rL297409 and follow-up to: https://reviews.llvm.org/rL297384 It surprised me that we need to duplicate the check in FoldConstantArithmetic and FoldConstantVectorArithmetic, but one or the other doesn't catch all of the test cases. There is an existing code comment about merging those someday. Differential Revision: https://reviews.llvm.org/D30826 llvm-svn: 297762
* SamplePGO ThinLTO ICP fix for local functions.Dehao Chen2017-03-145-4/+37
| | | | | | | | | | | | | | | | | | | | | | | | Summary: In SamplePGO, if the profile is collected from non-LTO binary, and used to drive ThinLTO, the indirect call promotion may fail because ThinLTO adjusts local function names to avoid conflicts. There are two places of where the mismatch can happen: 1. thin-link prepends SourceFileName to front of FuncName to build the GUID (GlobalValue::getGlobalIdentifier). Unlike instrumentation FDO, SamplePGO does not use the PGOFuncName scheme and therefore the indirect call target profile data contains a hash of the OriginalName. 2. backend compiler promotes some local functions to global and appends .llvm.{$ModuleHash} to the end of the FuncName to derive PromotedFunctionName This patch tries at the best effort to find the GUID from the original local function name (in profile), and use that in ICP promotion, and in SamplePGO matching that happens in the backend after importing/inlining: 1. in thin-link, it builds the map from OriginalName to GUID so that when thin-link reads in indirect call target profile (represented by OriginalName), it knows which GUID to import. 2. in backend compiler, if sample profile reader cannot find a profile match for PromotedFunctionName, it will try to find if there is a match for OriginalFunctionName. 3. in backend compiler, we build symbol table entry for OriginalFunctionName and pointer to the same symbol of PromotedFunctionName, so that ICP can find the correct target to promote. Reviewers: mehdi_amini, tejohnson Reviewed By: tejohnson Subscribers: llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D30754 llvm-svn: 297757
* [InstCombine] improve readability; NFCISanjay Patel2017-03-141-29/+23
| | | | llvm-svn: 297755
* [Hexagon] Fix a condition in HexagonEarlyIfConv.cppKrzysztof Parzyszek2017-03-141-1/+1
| | | | | | This fixes llvm.org/PR32265. llvm-svn: 297745
* Fix typo in commentArtyom Skrobov2017-03-141-1/+1
| | | | llvm-svn: 297742
* [LV] Refactor cross-iteration phi's back-patching; NFCGil Rapaport2017-03-141-232/+244
| | | | | | | | | | | | | | This patch refactors the PHisToFix loop as follows: - The loop itself now resides in its own method. - The new method iterates on scalar-loop's header; the PHIsToFix map formerly propagated as an output parameter and filled during phi widening is removed. - The code handling reductions is moved into its own method, similar to the existing fixFirstOrderRecurrence(). Differential Revision: https://reviews.llvm.org/D30755 llvm-svn: 297740
* [ARM] Diagnose ARM MOVT without :lower16: or :upper16: expressionOliver Stannard2017-03-141-0/+1
| | | | | | | | | | | This instruction was missing from the list of opcodes that we check, so we were hitting an llvm_unreachable in ARMMCCodeEmitter.cpp for the ARM MOVT instruction, rather than the diagnostic that is emitted for the other MOVW/MOVT instructions. Differential revision: https://reviews.llvm.org/D30936 llvm-svn: 297739
* De-duplicate the two implementations of ↵Artyom Skrobov2017-03-141-13/+5
| | | | | | | | | | | | ARMBaseInstrInfo::isProfitableToIfCvt() [NFC] Reviewers: congh, rengolin Subscribers: aemerson, llvm-commits Differential Revision: https://reviews.llvm.org/D30934 llvm-svn: 297738
* [LV] Refactor Cost Model's selectVectorizationFactor(); NFCAyal Zaks2017-03-141-73/+132
| | | | | | | | | | | Refactoring Cost Model's selectVectorizationFactor() so that it handles only the selection of the best VF from a pre-computed range of candidate VF's, extracting early-exit criteria and the computation of a MaxVF upper-bound to other methods, all driven by a newly introduced LoopVectorizationPlanner. Differential Revision: https://reviews.llvm.org/D30653 llvm-svn: 297737
* [CodeGen] Fix -Wreorder warning.Benjamin Kramer2017-03-141-3/+3
| | | | llvm-svn: 297729
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