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* mi-sched: update PressureDiffs on-the-fly for liveness.Andrew Trick2013-08-303-29/+85
| | | | | | | This removes all expensive pressure tracking logic from the scheduling critical path of node comparison. llvm-svn: 189643
* Replace LiveInterval::killedAt with isKilledAtInstr.Andrew Trick2013-08-302-4/+4
| | | | | | Return true for LRGs that end at EarlyClobber or Register slots. llvm-svn: 189642
* mi-sched: improve the generic register pressure comparison.Andrew Trick2013-08-301-14/+12
| | | | | | | Only compare pressure within the same set. When multiple sets are affected, we prioritize the most constrained set. llvm-svn: 189641
* mi-sched: Precompute a PressureDiff for each instruction, adjust for ↵Andrew Trick2013-08-305-72/+270
| | | | | | | | | | | | | liveness later. Created SUPressureDiffs array to hold the per node PDiff computed during DAG building. Added a getUpwardPressureDelta API that will soon replace the old one. Compute PressureDelta here from the precomputed PressureDiffs. Updating for liveness will come next. llvm-svn: 189640
* [PowerPC] Handle selection of compare instructions in fast-isel.Bill Schmidt2013-08-301-0/+18
| | | | | | | Mostly trivial patch adding support for compares. The meat of the work was added with the branch support. llvm-svn: 189639
* Remove bogus debug statement. Sheesh.Bill Schmidt2013-08-301-4/+2
| | | | llvm-svn: 189638
* [PowerPC] Add loads, stores, and related things to fast-isel.Bill Schmidt2013-08-303-7/+776
| | | | | | | | | | | | | | | | | | | | | | | | | This is the next big chunk of fast-isel code. The primary purpose is to implement selection of loads and stores, but there is a lot of drag-along to support this. The common code to analyze addresses for both loads and stores is substantial. It's also necessary to add the materialization code for global values. Related to load-store processing is the code to fold loads into integer extends, since otherwise we generate lots of redundant instructions. We also need to add some overrides to some FastEmit routines to ensure we don't assign GPR 0 to a virtual register when this would change the meaning of an instruction. I added handling selection of a few binary arithmetic instructions, to enable committing some test cases I wrote a while back. Finally, ap couple of miscellaneous changes: * I cleaned up some poor style from a previous patch in PPCISelLowering.cpp, pointed out by David Blaikie. * I enlarged the Addr.Offset field to avoid sign problems with 32-bit offsets. llvm-svn: 189636
* comment typoAndrew Trick2013-08-301-1/+1
| | | | llvm-svn: 189635
* Random cleanup: No need to use a std::vector here, since ↵Bill Wendling2013-08-301-5/+4
| | | | | | createInternalizePass uses an ArrayRef. llvm-svn: 189632
* Don't bother emitting the pubtypes section on darwin since there aren'tEric Christopher2013-08-301-7/+3
| | | | | | any maintained consumers of it on that platform. llvm-svn: 189631
* Reformat slightly.Eric Christopher2013-08-301-4/+4
| | | | llvm-svn: 189630
* Change default # of digits for APFloat::toStringEli Friedman2013-08-291-5/+8
| | | | | | | | | | | | | | | | | This is a re-commit of r189442; I'll follow up with clang changes. The previous default was almost, but not quite enough digits to represent a floating-point value in a manner which preserves the representation when it's read back in. The larger default is much less confusing. I spent some time looking into printing exactly the right number of digits if a precision isn't specified, but it's kind of complicated, and I'm not really sure I understand what APFloat::toString is supposed to output for FormatPrecision != 0 (or maybe the current API specification is just silly, not sure which). I have a WIP patch if anyone is interested. llvm-svn: 189624
* DIBuilder: retain a type when created with a unique identifier.Manman Ren2013-08-291-3/+23
| | | | | | | | | | | | | | | createClassType, createStructType, createUnionType, createEnumerationType, and createForwardDecl will retain a type when created with a unique identifier, to make sure they are treated as used even when all uses are replaced with the identifiers. Use TrackingVH<MDNode> instead of MDNode in AllRetainTypes, since the created node can later be updated. The change will be tested when clients of DIBuilder start to pass in non-empty unique identifier. llvm-svn: 189621
* ARM: Improve pattern for isel mul of vector by scalar.Jim Grosbach2013-08-291-0/+11
| | | | | | | | | | | In addition to recognizing when the multiply's second argument is coming from an explicit VDUPLANE, also look for a plain scalar f32 reference and reference it via the corresponding vector lane. rdar://14870054 llvm-svn: 189619
* Clean up some usage of Triple. The base class has methods for determining ↵Cameron Esfahani2013-08-297-14/+11
| | | | | | if the target is iOS and Linux. llvm-svn: 189604
* Comment and revise the cyclic critical path code.Andrew Trick2013-08-292-72/+116
| | | | | | This should be much more clear now. It's still disabled pending testing. llvm-svn: 189597
* isCharInSet refactoring.Alexander Kornienko2013-08-291-5/+8
| | | | | | | | | | | | | | | | | | Summary: Made UnicodeCharSet a class, perform validity checking inside its constructor instead of each isCharInSet call, use std::binary_search instead of own implementation. This patch comes with a necessary change in clang (sent separately). Reviewers: jordan_rose, klimek Reviewed By: klimek CC: cfe-commits, rsmith Differential Revision: http://llvm-reviews.chandlerc.com/D1534 llvm-svn: 189582
* AVX-512: added extend and truncate instructions.Elena Demikhovsky2013-08-294-29/+245
| | | | llvm-svn: 189580
* Revert: r189565 - Add getUnrollingPreferences to TTIHal Finkel2013-08-293-31/+5
| | | | | | | | | | | | | | | Revert unintentional commit (of an unreviewed change). Original commit message: Add getUnrollingPreferences to TTI Allow targets to customize the default behavior of the generic loop unrolling transformation. This will be used by the PowerPC backend when targeting the A2 core (which is in-order with a deep pipeline), and using more aggressive defaults is important. llvm-svn: 189566
* Add getUnrollingPreferences to TTIHal Finkel2013-08-293-5/+31
| | | | | | | | | Allow targets to customize the default behavior of the generic loop unrolling transformation. This will be used by the PowerPC backend when targeting the A2 core (which is in-order with a deep pipeline), and using more aggressive defaults is important. llvm-svn: 189565
* Use TargetSubtargetInfo::useAA() in DAGCombineHal Finkel2013-08-291-3/+10
| | | | | | | This uses the TargetSubtargetInfo::useAA() function to control the defaults of the -combiner-alias-analysis and -combiner-global-alias-analysis options. llvm-svn: 189564
* Add useAA() to TargetSubtargetInfoHal Finkel2013-08-292-13/+23
| | | | | | | | | | | | | There are several optional (off-by-default) features in CodeGen that can make use of alias analysis. These features are important for generating code for some kinds of cores (for example the (in-order) PPC A2 core). This adds a useAA() function to TargetSubtargetInfo to allow these features to be enabled by default on a per-subtarget basis. Here is the first use of this function: To control the default of the -enable-aa-sched-mi feature. llvm-svn: 189563
* The darwin integrated assembler for X86 in 64-bit mode is not rejectingKevin Enderby2013-08-291-1/+6
| | | | | | | | | | | | 32-bit absolute addressing in instructions likei this: mov $_f, %rsi which is not supported in 64-bit mode. rdar://8827134 llvm-svn: 189543
* Vectorizer/PassManager: I am working on moving the vectorizer out of the ↵Nadav Rotem2013-08-281-46/+18
| | | | | | | | | | | SCC passes. This patch moves the SLP-vectorizer and BB-vectorizer back into SCC passes for two reasons: 1. They are a kind of cannonicalization. 2. The performance measurements show that it is better to keep them in. There should be no functional change if you are not enabling the LateVectorization mode. llvm-svn: 189539
* Handle address spaces in TargetTransformInfoMatt Arsenault2013-08-281-7/+15
| | | | llvm-svn: 189527
* Fix a typo and coding style of a previous commit. No functional change.Juergen Ributzka2013-08-281-3/+2
| | | | llvm-svn: 189526
* Fix typo.Matt Arsenault2013-08-281-2/+2
| | | | llvm-svn: 189524
* Period.David Blaikie2013-08-281-2/+2
| | | | llvm-svn: 189513
* r189495: Pull out some debug logic into a function for legibilityDavid Blaikie2013-08-281-13/+18
| | | | | | Code review feedback from Eric Christopher. llvm-svn: 189512
* Option parsing: support case-insensitive option matching.Rui Ueyama2013-08-281-21/+41
| | | | | | Re-submitting r189416 with fix for Windows build on where strcasecmp is not defined. llvm-svn: 189501
* Disable unrolling in the loop vectorizer when disabled in the pass managerHal Finkel2013-08-282-8/+13
| | | | | | | | | | | | | | | | | When unrolling is disabled in the pass manager, the loop vectorizer should also not unroll loops. This will allow the -fno-unroll-loops option in Clang to behave as expected (even for vectorizable loops). The loop vectorizer's -force-vector-unroll option will (continue to) override the pass-manager setting (including -force-vector-unroll=0 to force use of the internal auto-selection logic). In order to test this, I added a flag to opt (-disable-loop-unrolling) to force disable unrolling through opt (the analog of -fno-unroll-loops in Clang). Also, this fixes a small bug in opt where the loop vectorizer was enabled only after the pass manager populated the queue of passes (the global_alias.ll test needed a slight update to the RUN line as a result of this fix). llvm-svn: 189499
* The integrated darwin assembler can hang in an infinite loop (or get an assert Kevin Enderby2013-08-283-4/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | with a debug build) with this buggy .indirect_symbol directive usage: % cat test.s x: .indirect_symbol _y The assertion is because it is trying to get the symbol index for the symbol _y when it is writing out the indirect symbol table. This line of code in MachObjectWriter::WriteObject() : Write32(Asm.getSymbolData(*it->Symbol).getIndex()); And while there is a symbol _y it does not have any getSymbolData set which is only done in MachObjectWriter::BindIndirectSymbols() for pointer sections or stub sections. I added a check and an error in there to catch this in case something slips through. But to get a better error the parser should detect when a .indirect_symbol directive is used and it is not in a pointer section or stub section. To make that work I moved the handling of the indirect symbol out of the target independent AsmParser code into the DarwinAsmParser code that can check for the proper Mach-O section types. rdar://14825505 llvm-svn: 189497
* PR16995: DebugInfo: Don't overwrite existing member lists when adding ↵David Blaikie2013-08-281-1/+18
| | | | | | | | | template arguments With the added debug assertions this fix is covered by existing Clang tests. (& found some other issues, also fixed) llvm-svn: 189495
* [ARMv8]Joey Gouly2013-08-282-14/+20
| | | | | | | | | | | Fix a few things in one swoop. # Add some negative tests. # Fix some formatting issues. # Add some missing IsThumb / ARMv8 # Fix some outs / ins mistakes. llvm-svn: 189490
* ARM: Use "dmb sy" for barriers on M-class CPUsTim Northover2013-08-281-1/+4
| | | | | | | | The usual default of "dmb ish" (inner-shareable) isn't even a valid instruction on v6M or v7M (well, it does the same thing but software is strongly discouraged from using it) so we should emit a full-system barrier there. llvm-svn: 189483
* [ARMv8] Add a missing IsThumb to t2LDAEXD.Joey Gouly2013-08-281-1/+1
| | | | llvm-svn: 189482
* ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics.Tim Northover2013-08-281-8/+6
| | | | | | | Clang is now generating cleaner IR, so this removes the old variants which should be completely unused. llvm-svn: 189481
* ARM: add patterns for vqdmlal with separate vqdmull and vqaddsTim Northover2013-08-281-0/+38
| | | | | | | | | The vqdmlal and vqdmlls instructions are really just a fused pair consisting of a vqdmull.sN and a vqadd.sN. This adds patterns to LLVM so that we can switch Clang's CodeGen over to generating these instead of the special vqdmlal intrinsics. llvm-svn: 189480
* [mips][msa] Added bnz.df, bnz.v, bz.df, and bz.vDaniel Sanders2013-08-286-2/+225
| | | | | | | | | | | | | These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes, are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as a branch/mov sequence to evaluate to 0 or 1. Note: The resulting code is sub-optimal since it doesnt seem to be possible to feed the result of an intrinsic directly into a brcond. At the moment it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily evaluates the boolean twice. llvm-svn: 189478
* [mips][msa] Added load/store intrinsics.Daniel Sanders2013-08-288-21/+182
| | | | llvm-svn: 189476
* 80 colsAlexey Samsonov2013-08-281-3/+4
| | | | llvm-svn: 189473
* AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABSElena Demikhovsky2013-08-282-23/+466
| | | | llvm-svn: 189472
* [mips][msa] Added move.vDaniel Sanders2013-08-282-0/+28
| | | | llvm-svn: 189471
* [SystemZ] Add support for TMHH, TMHL, TMLH and TMLLRichard Sandiford2013-08-285-10/+76
| | | | | | | | | For now just handles simple comparisons of an ANDed value with zero. The CC value provides enough information to do any comparison for a 2-bit mask, and some nonzero comparisons with more populated masks, but that's all future work. llvm-svn: 189469
* [mips][msa] Added cfcmsa, and ctcmsaDaniel Sanders2013-08-287-0/+106
| | | | | | | | The MSA control registers have been added as reserved registers, and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered into these nodes. llvm-svn: 189468
* [mips][msa] Added f[cs]af, f[cs]or, f[cs]ueq, f[cs]ul[et], f[cs]une, fsun, ↵Daniel Sanders2013-08-281-14/+327
| | | | | | ftrunc_[su], hadd_[su], hsub_[su], sr[al]r, sr[al]ri llvm-svn: 189467
* [SystemZ] Extend memcmp support to all constant lengthsRichard Sandiford2013-08-282-26/+92
| | | | | | This uses the infrastructure added for memcpy and memmove in r189331. llvm-svn: 189458
* Fix use of uninitialized value added in r189400 (found by MemorySanitizer)Alexey Samsonov2013-08-281-4/+3
| | | | llvm-svn: 189456
* Revert r189442 "Change default # of digits for APFloat::toString"Ted Kremenek2013-08-281-8/+5
| | | | | | This is breaking numerous Clang tests on the buildbot. llvm-svn: 189447
* Change default # of digits for APFloat::toStringEli Friedman2013-08-281-5/+8
| | | | | | | | | | | | | | | The previous default was almost, but not quite enough digits to represent a floating-point value in a manner which preserves the representation when it's read back in. The larger default is much less confusing. I spent some time looking into printing exactly the right number of digits if a precision isn't specified, but it's kind of complicated, and I'm not really sure I understand what APFloat::toString is supposed to output for FormatPrecision != 0 (or maybe the current API specification is just silly, not sure which). I have a WIP patch if anyone is interested. llvm-svn: 189442
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